931 resultados para Embedded real-time systems
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The scarcity and diversity of resources among the devices of heterogeneous computing environments may affect their ability to perform services with specific Quality of Service constraints, particularly in dynamic distributed environments where the characteristics of the computational load cannot always be predicted in advance. Our work addresses this problem by allowing resource constrained devices to cooperate with more powerful neighbour nodes, opportunistically taking advantage of global distributed resources and processing power. Rather than assuming that the dynamic configuration of this cooperative service executes until it computes its optimal output, the paper proposes an anytime approach that has the ability to tradeoff deliberation time for the quality of the solution. Extensive simulations demonstrate that the proposed anytime algorithms are able to quickly find a good initial solution and effectively optimise the rate at which the quality of the current solution improves at each iteration, with an overhead that can be considered negligible.
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Dissertação apresentada na Faculdade de Ciências e Tecnologia da Universidade Nova de Lisboa para a obtenção do grau de Mestre em Engenharia Electrotécnica e de Computadores
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“Many-core” systems based on a Network-on-Chip (NoC) architecture offer various opportunities in terms of performance and computing capabilities, but at the same time they pose many challenges for the deployment of real-time systems, which must fulfill specific timing requirements at runtime. It is therefore essential to identify, at design time, the parameters that have an impact on the execution time of the tasks deployed on these systems and the upper bounds on the other key parameters. The focus of this work is to determine an upper bound on the traversal time of a packet when it is transmitted over the NoC infrastructure. Towards this aim, we first identify and explore some limitations in the existing recursive-calculus-based approaches to compute the Worst-Case Traversal Time (WCTT) of a packet. Then, we extend the existing model by integrating the characteristics of the tasks that generate the packets. For this extended model, we propose an algorithm called “Branch and Prune” (BP). Our proposed method provides tighter and safe estimates than the existing recursive-calculus-based approaches. Finally, we introduce a more general approach, namely “Branch, Prune and Collapse” (BPC) which offers a configurable parameter that provides a flexible trade-off between the computational complexity and the tightness of the computed estimate. The recursive-calculus methods and BP present two special cases of BPC when a trade-off parameter is 1 or ∞, respectively. Through simulations, we analyze this trade-off, reason about the implications of certain choices, and also provide some case studies to observe the impact of task parameters on the WCTT estimates.
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Energy resource scheduling is becoming increasingly important, such as the use of more distributed generators and electric vehicles connected to the distribution network. This paper proposes a methodology to be used by Virtual Power Players (VPPs), regarding the energy resource scheduling in smart grids and considering day-ahead, hour-ahead and realtime time horizons. This method considers that energy resources are managed by a VPP which establishes contracts with their owners. The full AC power flow calculation included in the model takes into account network constraints. In this paper, distribution function errors are used to simulate variations between time horizons, and to measure the performance of the proposed methodology. A 33-bus distribution network with large number of distributed resources is used.
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Este documento descreve um modelo de tolerância a falhas para sistemas de tempo-real distribuídos. A sugestão deste modelo tem como propósito a apresentação de uma solu-ção fiável, flexível e adaptável às necessidades dos sistemas de tempo-real distribuídos. A tolerância a falhas é um aspeto extremamente importante na construção de sistemas de tempo-real e a sua aplicação traz inúmeros benefícios. Um design orientado para a to-lerância a falhas contribui para um melhor desempenho do sistema através do melhora-mento de aspetos chave como a segurança, a confiabilidade e a disponibilidade dos sis-temas. O trabalho desenvolvido centra-se na prevenção, deteção e tolerância a falhas de tipo ló-gicas (software) e físicas (hardware) e assenta numa arquitetura maioritariamente basea-da no tempo, conjugada com técnicas de redundância. O modelo preocupa-se com a efi-ciência e os custos de execução. Para isso utilizam-se também técnicas tradicionais de to-lerância a falhas, como a redundância e a migração, no sentido de não prejudicar o tempo de execução do serviço, ou seja, diminuindo o tempo de recuperação das réplicas, em ca-so de ocorrência de falhas. Neste trabalho são propostas heurísticas de baixa complexida-de para tempo-de-execução, a fim de se determinar para onde replicar os componentes que constituem o software de tempo-real e de negociá-los num mecanismo de coordena-ção por licitações. Este trabalho adapta e estende alguns algoritmos que fornecem solu-ções ainda que interrompidos. Estes algoritmos são referidos em trabalhos de investiga-ção relacionados, e são utilizados para formação de coligações entre nós coadjuvantes. O modelo proposto colmata as falhas através de técnicas de replicação ativa, tanto virtual como física, com blocos de execução concorrentes. Tenta-se melhorar ou manter a sua qualidade produzida, praticamente sem introduzir overhead de informação significativo no sistema. O modelo certifica-se que as máquinas escolhidas, para as quais os agentes migrarão, melhoram iterativamente os níveis de qualidade de serviço fornecida aos com-ponentes, em função das disponibilidades das respetivas máquinas. Caso a nova configu-ração de qualidade seja rentável para a qualidade geral do serviço, é feito um esforço no sentido de receber novos componentes em detrimento da qualidade dos já hospedados localmente. Os nós que cooperam na coligação maximizam o número de execuções para-lelas entre componentes paralelos que compõem o serviço, com o intuito de reduzir atra-sos de execução. O desenvolvimento desta tese conduziu ao modelo proposto e aos resultados apresenta-dos e foi genuinamente suportado por levantamentos bibliográficos de trabalhos de in-vestigação e desenvolvimento, literaturas e preliminares matemáticos. O trabalho tem também como base uma lista de referências bibliográficas.
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Heterogeneous multicore platforms are becoming an interesting alternative for embedded computing systems with limited power supply as they can execute specific tasks in an efficient manner. Nonetheless, one of the main challenges of such platforms consists of optimising the energy consumption in the presence of temporal constraints. This paper addresses the problem of task-to-core allocation onto heterogeneous multicore platforms such that the overall energy consumption of the system is minimised. To this end, we propose a two-phase approach that considers both dynamic and leakage energy consumption: (i) the first phase allocates tasks to the cores such that the dynamic energy consumption is reduced; (ii) the second phase refines the allocation performed in the first phase in order to achieve better sleep states by trading off the dynamic energy consumption with the reduction in leakage energy consumption. This hybrid approach considers core frequency set-points, tasks energy consumption and sleep states of the cores to reduce the energy consumption of the system. Major value has been placed on a realistic power model which increases the practical relevance of the proposed approach. Finally, extensive simulations have been carried out to demonstrate the effectiveness of the proposed algorithm. In the best-case, savings up to 18% of energy are reached over the first fit algorithm, which has shown, in previous works, to perform better than other bin-packing heuristics for the target heterogeneous multicore platform.
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The last decade has witnessed a major shift towards the deployment of embedded applications on multi-core platforms. However, real-time applications have not been able to fully benefit from this transition, as the computational gains offered by multi-cores are often offset by performance degradation due to shared resources, such as main memory. To efficiently use multi-core platforms for real-time systems, it is hence essential to tightly bound the interference when accessing shared resources. Although there has been much recent work in this area, a remaining key problem is to address the diversity of memory arbiters in the analysis to make it applicable to a wide range of systems. This work handles diverse arbiters by proposing a general framework to compute the maximum interference caused by the shared memory bus and its impact on the execution time of the tasks running on the cores, considering different bus arbiters. Our novel approach clearly demarcates the arbiter-dependent and independent stages in the analysis of these upper bounds. The arbiter-dependent phase takes the arbiter and the task memory-traffic pattern as inputs and produces a model of the availability of the bus to a given task. Then, based on the availability of the bus, the arbiter-independent phase determines the worst-case request-release scenario that maximizes the interference experienced by the tasks due to the contention for the bus. We show that the framework addresses the diversity problem by applying it to a memory bus shared by a fixed-priority arbiter, a time-division multiplexing (TDM) arbiter, and an unspecified work-conserving arbiter using applications from the MediaBench test suite. We also experimentally evaluate the quality of the analysis by comparison with a state-of-the-art TDM analysis approach and consistently showing a considerable reduction in maximum interference.
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International Conference on Emerging Technologies and Factory Automation (ETFA 2015), Industrial Communication Technologies and Systems, Luxembourg, Luxembourg.
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This work proposes a novel approach for a suitable orientation of antibodies (Ab) on an immunosensing platform, applied here to the determination of 8-hydroxy-2′-deoxyguanosine (8OHdG), a biomarker of oxidative stress that has been associated to chronic diseases, such as cancer. The anti-8OHdG was bound to an amine modified gold support through its Fc region after activation of its carboxylic functions. Non-oriented approaches of Ab binding to the platform were tested in parallel, in order to show that the presented methodology favored Ab/Ag affinity and immunodetection of the antigen. The immunosensor design was evaluated by quartz-crystal microbalance with dissipation, atomic force microscopy, electrochemical impedance spectroscopy (EIS) and square-wave voltammetry. EIS was also a suitable technique to follow the analytical behavior of the device against 8OHdG. The affinity binding between 8OHdG and the antibody immobilized in the gold modified platform increased the charge transfer resistance across the electrochemical set-up. The observed behavior was linear from 0.02 to 7.0 ng/mL of 8OHdG concentrations. The interference from glucose, urea and creatinine was found negligible. An attempt of application to synthetic samples was also successfully conducted. Overall, the presented approach enabled the production of suitably oriented Abs over a gold platform by means of a much simpler process than other oriented-Ab binding approaches described in the literature, as far as we know, and was successful in terms of analytical features and sample application.
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This work proposes a novel approach for a suitable orientation of antibodies (Ab) on an immunosensing platform, applied here to the determination of 8-hydroxy-2’-deoxyguanosine (8OHdG), a biomarker of oxidative stress that has been associated to chronic diseases, such as cancer. The Anti-8OHdG was bound to an amine modified gold support through its Fc region after activation of its carboxylic functions. Non-oriented approaches of Ab binding to the platform were tested in parallel, in order to show that the presented proposal favored Ab/Ag affinity. The immunosensor design was evaluated by Quartz-Crystal microbalance with Dissipation, Atomic Force Microscopy, Electrochemical Impedance Spectroscopy (EIS) and Square-Wave Voltammetry. EIS was also a suitable technique to follow the analytical behavior of the device against 8OHdG. The affinity binding between 8OHdG and the antibody immobilized in the gold modified platform increased the charged transfer resistance across the electrochemical sep-up. The observed behavior was linear from 0.02 to 7.0 ng/mL of 8OHdG concentrations. The interference from Glucose, Urea and Creatinine was found negligible. An attempt of application to synthetic samples was also successfully conducted. Overall, the presented approach enabled the production of suitably oriented Abs over a gold platform by means of a much simpler process than other oriented-Ab binding approaches described in the literature, as far as we know, and was successful in terms of analytical features and sample application.
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Increased levels of plasma oxLDL, which is the oxidized fraction of Low Density Lipoprotein (LDL), are associated with atherosclerosis, an inflammatory disease, and the subsequent development of severe cardiovascular diseases that are today a major cause of death in modern countries. It is therefore important to find a reliable and fast assay to determine oxLDL in serum. A new immunosensor employing three monoclonal antibodies (mAbs) against oxLDL is proposed in this work as a quick and effective way to monitor oxLDL. The oxLDL was first employed to produce anti-oxLDL monoclonal antibodies by hybridoma cells that were previously obtained. The immunosensor was set-up by selfassembling cysteamine (Cyst) on a gold (Au) layer (4 mm diameter) of a disposable screen-printed electrode. Three mAbs were allowed to react with N-hydroxysuccinimide (NHS) and ethyl(dimethylaminopropyl)carbodiimide (EDAC), and subsequently incubated in the Au/Cys. Albumin from bovine serum (BSA) was immobilized further to ensure that other molecules apart from oxLDL could not bind to the electrode surface. All steps were followed by various characterization techniques such as electrochemical impedance spectroscopy (EIS) and square wave voltammetry (SWV). The analytical operation of the immunosensor was obtained by incubating the sensing layer of the device in oxLDL for 15 minutes, prior to EIS and SWV. This was done by using standard oxLDL solutions prepared in foetal calf serum, in order to simulate patient's plasma with circulating oxLDL. A sensitive response was observed from 0.5 to 18.0 mg mL 1 . The device was successfully applied to determine the oxLDL fraction in real serum, without prior dilution or necessary chemical treatment. The use of multiple monoclonal antibodies on a biosensing platform seemed to be a successful approach to produce a specific response towards a complex multi-analyte target, correlating well with the level of oxLDL within atherosclerosis disease, in a simple, fast and cheap way.
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Microcystin-LR (MC-LR) is a dangerous toxin found in environmental waters, quantified by high performance liquid chromatography and/or enzyme-linked immunosorbent assays. Quick, low cost and on-site analysis is thus required to ensure human safety and wide screening programs. This work proposes label-free potentiometric sensors made of solid-contact electrodes coated with a surface imprinted polymer on the surface of Multi-Walled Carbon NanoTubes (CNTs) incorporated in a polyvinyl chloride membrane. The imprinting effect was checked by using non-imprinted materials. The MC-LR sensitive sensors were evaluated, characterized and applied successfully in spiked environmental waters. The presented method offered the advantages of low cost, portability, easy operation and suitability for adaptation to flow methods.
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6th Real-Time Scheduling Open Problems Seminar (RTSOPS 2015), Lund, Sweden.
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International Real-Time Ada Workshop (IRTAW 2015). 20 to 22, Apr, 2015. Pownal, U.S.A..
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13th IEEE/IFIP International Conference on Embedded and Ubiquitous Computing (EUC 2015). 21 to 23, Oct, 2015, Session W1-A: Multiprocessing and Multicore Architectures. Porto, Portugal.