Arrays of gold microelectrodes made from split integrated circuit chips

A simple and inexpensive way to fabricate arrays of gold microelectrodes is proposed. Integrated circuit chips are sawed through their middle, normal to the longest axis, leading to destruction of the silicon circuit and rupture of the gold wires that interconnect it with the external terminals. Polishing the resulting rough surface converts the tips of the wires embedded in the chip halves into arrays of gold microdisks of about 25 mu m diameter. The number of active microelectrodes (MEs), of an array depends on the number of pins in the chip, n, being typically (n/2)-4. These MEs can be used individually or externally interconnected in any combination. X-ray images of the chips and micrographs of the resulting surface of the polished arrays have revealed variable distances between neighbor MEs, which are, however, larger than 10 times the radius of the disks. This feature of the MEs prevents diffusional cross-talk between electrodes. The use of these microdisk electrodes for analytical purposes exhibits sigmoidal voltammograms, and chronoamperometric experiments confirm the nonlinear i vs. t(1/2) plots, typical for processes where radial diffusion prevails. Satisfactory uniformity was observed for the response of each electrode of an array, indicating similarity of geometry and disk areas. The potentialities of these MEs were demonstrated by the determination of cadmium at ppb levels using square wave voltammetry with preconcentration. Due to the relative ease with which these MEs can be manufactured and their good performance in (chemical) analysis, wide applications in electrochemistry and electroanalysis is envisioned.

Electrochemical studies with copper-based alloys: open-circuit potential oscillations in alkaline media

Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

Flow-through cell based on an array of gold microelectrodes obtained from modified integrated circuit chips

The construction of a flow-through cell incorporating an array of gold microelectrodes is described and its application to flow injection analysis with amperometric detection is presented, Simple modification of almost any conventional integrated circuit chip, used as an inexpensive source of pre-assembled gold micro-wires, leads to the rapid and successful preparation of arrays of 8-48 elements, the polymeric encapsulation material from the top face of the chip is removed by abrasion until the gold micro-mires (used to interconnect the silicon circuit to the external contact pins of the chip) are disrupted and their transversal (elliptical) sections become exposed. Once polished, the flat and smooth top surface of the gold microelectrode-array chip (MEAC) is provided with a spacer and fitted under pressure against an acrylic block with the reference and auxiliary electrodes, to form the electrochemical (thin-layer) flow cell, while the contact pins are plugged into a standard IC socket, This design ensures autonomous electric contact with each electrode and allows fast dismantling for polishing or substitution, the performance of flow cells with MEACs was investigated utilizing the technique of reverse pulse amperometry without oxygen removal, A method was established for the determination of the copper concentration in sugar cane spirit, regulated by law for beverages, Samples from industrial producers and small-scale (alembic) brewers were compared, With a 24 MEAC, a detection limit of 30 mu g I-l of copper (4.7 x 10(-7) mol l(-1) of Cu-II for 100 mu l injections) was calculated, Routine operation was established at a frequency of 60-90 determinations per hour, Intercomparison with atomic absorption spectrometric determinations resulted in excellent agreement.

A configurable approach to circuit simulation

This paper presents a configurable architecture which was designed to aid in the simulation of ULSI circuits at the transistor level. Elsewhere [1] this architecture was shown to be able to run such simulations several times as fast as standard circuit simulators such as SPICES. In this paper, after describing the overall idea and the the architecture of the system as a whole, I concentrate on the description of the architecture of the processing elements of the computing array.

Unbalanced Three-Phase Induction Motors Starting and Arc Welding Machines Short-Circuit Modeling

Three-Phase Induction Motors (TIM) and Arc Welding Machines (AWM) are loads of special behavior widely used in industrial and commercial installations, and therefore may contribute significantly to the deterioration of the quality of energy supplied by utilities. This paper proposes a modeling in constant power of the unbalanced TIM starting using Genetic Algorithm (GA) and AWM short-circuit based on their statics characteristics curves. The proposed models are compared with the conventional models in the literature. The results showed the good performance of the proposed models, allowing a more precise analysis of the real requests of these loads.

Determination and statistical treatment of short-circuit currents for faults on the lines of networks of 440 kV CESP system

The distribution of short-circuit current is investigated by means of two methods, one direct and the other analytic; both methods consider uniform probability distribution of line faults. In the direct method, the procedure consists of calculating fault currents at equidistant points along the line, starting from one of the end points and considering the other end open. The magnitude of the current is classified according to Brazilian standards (regulation NBR-7118). The analytic method assumes that the distribution of short-circuit currents through the busbar and the distribution of the line length connected to it are known, as well as the independence of values. The method is designed to determine the probability that fault currents through a line will surpass the pre-established magnitude, thus generating frequency distribution curves of short-circuit currents along the lines.

Evolvable hardware applied to voice recognition

This paper presents some results of the application on Evolvable Hardware (EHW) in the area of voice recognition. Evolvable Hardware is able to change inner connections, using genetic learning techniques, adapting its own functionality to external condition changing. This technique became feasible by the improvement of the Programmable Logic Devices. Nowadays, it is possible to have, in a single device, the ability to change, on-line and in real-time, part of its own circuit. This work proposes a reconfigurable architecture of a system that is able to receive voice commands to execute special tasks as, to help handicapped persons in their daily home routines. The idea is to collect several voice samples, process them through algorithms based on Mel - Ceptrais theory to obtain their numerical coefficients for each sample, which, compose the universe of search used by genetic algorithm. The voice patterns considered, are limited to seven sustained Portuguese vowel phonemes (a, eh, e, i, oh, o, u).

A simplified method for determining the high frequency induction motor equivalent electrical circuit parameters to be used in EMI effect

The aim of this paper is to present a simple method for determining the high frequency parameters of a three-phase induction motor to be used in studies involving variable speed drives with PWM three-phase inverters, in which it is necessary to check the effects caused to the motor by the electromagnetic interference, (EMI) in the differential mode, as well as in the common mode. The motor parameters determination is generally performed in adequate laboratories using accurate instruments, such as very expensive RLC bridges. The method proposed here consists in the identification of the motor equivalent electrical circuit parameters in rated frequency and in high frequency through characteristic tests in the laboratory, together with the use of characteristic equations and curves, shown in the references to be mentioned for determining the motor high frequency parasite capacitances and also through system simulations using dedicated software, like Pspice, determining the characteristic waveforms involved in the differential and common mode phenomena, comparing and validating the procedure through published papers [01].

A multisampling time-domain CMOS imager with synchronous readout circuit

A novel multisampling time-domain architecture for CMOS imagers with synchronous readout and wide dynamic range is proposed. The architecture was implemented in a prototype of imager with 32x32 pixel array fabricated in AMS CMOS 0.35νm and was characterized for sensitivity and color response. The pixel is composed of an n+/psub photodiode, a comparator and a D flip-flop having 16% fill-factor and 30νmx26νm dimensions. The multisampling architecture requires only a 1 bit per pixel memory instead of 8 bits which is typical for time-domain active pixel architectures. The advantage is that the number of transistors in the pixel is low, saving area and providing higher fill-factor. The maximum frame rate is analyzed as a function of number of bits and array size. The analysis shows that it is possible to achieve high frame rates and operation in video mode with 10 bits. Also, we present analysis for the impact of comparator offset voltage in the fixed pattern noise. Copyright 2007 ACM.

Methodology analysis of a computational tool used in electronic circuit design

This paper considers the importance of using a top-down methodology and suitable CAD tools in the development of electronic circuits. The paper presents an evaluation of the methodology used in a computational tool created to support the synthesis of digital to analog converter models by translating between different tools used in a wide variety of applications. This tool is named MS 2SV and works directly with the following two commercial tools: MATLAB/Simulink and SystemVision. Model translation of an electronic circuit is achieved by translating a mixed-signal block diagram developed in Simulink into a lower level of abstraction in VHDL-AMS and the simulation project support structure in SystemVision. The method validation was performed by analyzing the power spectral of the signal obtained by the discrete Fourier transform of a digital to analog converter simulation model. © 2011 IEEE.

Overall and differentiated session ratings of perceived exertion at different time points following a circuit weight training workout

Session ratings of perceived exertion (SRPE) have been considered to provide a quantitative evaluation of the entire exercise session in different types of resistance training. In this study we investigated the ability of SRPE to assess exercise strain in a circuit weight training (CWT) workout and the influence of time lag to report SRPE. Ten healthy male volunteers (22.3±2.8 years, 72.5±6.5kg, and 175±5cm) completed a CWT session involving three circuits of five multiple joint exercises with single sets of 20 repetitions at 30% one repetition maximum (1-RM). Heart rate [63.7-75.0% maximum heart rate (%HRmax)], blood lactate (5.6-7.6mM) as well as overall, chest, and active muscle RPE increased significantly (p<0.05) throughout the CWT, but no significant differences were found between ratings of perceived exertion (RPE) types. Overall, chest and active muscle SRPE were accessed 10 minutes, 20 minutes, and 30 minutes after the workout, with no significant main effects or SRPE type×time interaction being found (p>0.05). Finally, no significant differences (p>0.05) were observed between averaged SRPE and RPE responses (overall: 3.7±0.6 vs. 3.5±0.9; chest: 3.8±0.7 vs. 3.6±0.8; active muscle; 3.7±0.7 vs. 3.5±0.7). These results suggest SRPE, irrespective of the moment at which it is taken, to be a useful tool for assessing global exercise strain in a CWT workout, providing coaches, physicians, and exercisers a practical way for monitoring this type of resistance training. © 2013.

A fast cholinergic modulation of the primary acoustic startle circuit in rats

Cochlear root neurons (CRNs) are the first brainstem neurons which initiate and participate in the full expression of the acoustic startle reflex. Although it has been suggested that a cholinergic pathway from the ventral nucleus of the trapezoid body (VNTB) conveys auditory prepulses to the CRNs, the neuronal origin of the VNTB-CRNs projection and the role it may play in the cochlear root nucleus remain uncertain. To determine the VNTB neuronal type which projects to CRNs, we performed tract-tracing experiments combined with mechanical lesions, and morphometric analyses. Our results indicate that a subpopulation of non-olivocochlear neurons projects directly and bilaterally to CRNs via the trapezoid body. We also performed a gene expression analysis of muscarinic and nicotinic receptors which indicates that CRNs contain a cholinergic receptor profile sufficient to mediate the modulation of CRN responses. Consequently, we investigated the effects of auditory prepulses on the neuronal activity of CRNs using extracellular recordings in vivo. Our results show that CRN responses are strongly inhibited by auditory prepulses. Unlike other neurons of the cochlear nucleus, the CRNs exhibited inhibition that depended on parameters of the auditory prepulse such as intensity and interstimulus interval, showing their strongest inhibition at short interstimulus intervals. In sum, our study supports the idea that CRNs are involved in the auditory prepulse inhibition of the acoustic startle reflex, and confirms the existence of multiple cholinergic pathways that modulate the primary acoustic startle circuit. © 2013 Springer-Verlag Berlin Heidelberg.

Análise dos circuitos de produção, reprodução e subsistência do transporte hidroviário de passageiros nas ilhas da Região Metropolitana de Belém: uma contribuição para a revitalização do setor

O objetivo desta pesquisa é descrever e analisar a funcionalidade do sistema de transporte hidroviário de passageiros nas ilhas da Região Metropolitana de Belém (RMB). Buscou-se uma construção teórica baseada, principalmente, nas abordagens de Milton Santos, Pierre Bourdieu, Associação Nacional de Transportes Públicos e Eduardo Vasconcellos. A partir desse referencial a tese explica que as condições de transporte hidroviário em geral estão relacionadas com teorias de divisão do espaço onde o poder de consumo e renda é o que determina a integração espacial do indivíduo. E que, portanto, o serviço de transporte nas ilhas da RMB, operado pela lógica do mercado, exclui espacialmente quem não tem esse poder. O conhecimento dessa realidade foi baseado em pesquisa de campo em 20 ilhas da RMB. Utilizaram-se as técnicas de observação e entrevista para explicar a dinâmica dos deslocamentos dos ribeirinhos, identificando circuitos de produção, reprodução e subsistência. Os primeiros assemelham-se com a teoria de Milton Santos de circuito superior, representado por Belém, e inferior, representado pelas ilhas. O circuito de subsistência nasce dentro do circuito inferior a partir da forte relação que existe entre as próprias ilhas, sendo uma estratégia de deslocamento dos ribeirinhos para receber auxílios básicos de saúde, educação e transportes. Utilizou-se a análise fatorial para obter um ranking das ilhas segundo as condições de transporte e a análise de regressão para explicar que a demanda por viagens nas ilhas aumenta, basicamente, quando a renda e a população aumentam. As propostas para revitalização do setor do transporte hidroviário resultou na identificação de novas rotas de transporte e melhorias na infraestrutura de trapiches e embarcações.

Electrically detected magnetic resonance modeling and fitting: An equivalent circuit approach

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

Modeling of piezoelectric energy harvesting considering the dependence of the rectifier circuit

Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)