A resolução do problema de despacho ótimo de reativos pelo método da função Lagrangiana-barreira relaxada

This work presents the application of the relaxed barrier-Lagrangian function method to the optimal reactive dispatch problem, which is a nonlinear nonconvex and large problem. In this approach the inequality constraints are treated by the association of modified barrier and primal-dual logarithmic barrier method. Those constraints are transformed in equalities through positive auxiliary variables and are perturbed by the barrier parameter. A Lagrangian function is associated to the modified problem. The first-order necessary conditions are applied generating a non-linear system which is solved by Newton's method. The auxiliary variables perturbation result in an expansion of the feasible set of the original problem, allowing the limits of the inequality constraints to be reach. Numeric tests with the systems CESP 53 buses and the south-southeast Brazilian and the comparative test with the primal-dual logarithmic barrier method indicate that presented method is efficient in the resolution of optimal reactive dispatch problem.

Conservative power theory discussion and evaluation by means of virtual instrumentation

Considering different single and multiphase circuits feeding linear and non-linear loads, this paper presents theoretical discussions and experimental evaluation of the recent Conservative Power Theory (CPT), by means of Virtual Instrumentation concepts. The main goal is to analyze the results of such power theory definitions under nonsinusoidal and unbalanced conditions, pointing out its major advantages, possible drawbacks or relevant aspects for discussion. © 2009 IEEE.

Short-term planning of electric power distribution networks using multiobjective genetic algorithim

The high active and reactive power level demanded by the distribution systems, the growth of consuming centers, and the long lines of the distribution systems result in voltage variations in the busses compromising the quality of energy supplied. To ensure the energy quality supplied in the distribution system short-term planning, some devices and actions are used to implement an effective control of voltage, reactive power, and power factor of the network. Among these devices and actions are the voltage regulators (VRs) and capacitor banks (CBs), as well as exchanging the conductors sizes of distribution lines. This paper presents a methodology based on the Non-Dominated Sorting Genetic Algorithm (NSGA-II) for optimized allocation of VRs, CBs, and exchange of conductors in radial distribution systems. The Multiobjective Genetic Algorithm (MGA) is aided by an inference process developed using fuzzy logic, which applies specialized knowledge to achieve the reduction of the search space for the allocation of CBs and VRs.

Robust control applied to power flow control in single-phase inverter with LCL filter, using droop control and D-stability

This paper proposes a new methodology to control the power flow between a distributed generator (DG) and the electrical power distribution grid. It is used the droop voltage control to manage the active and reactive power. Through this control a sinusoidal voltage reference is generated to be tracked by voltage loop and this loop generates the current reference for the current loop. The proposed control introduces feed-forward states improving the control performance in order to obtain high quality for the current injected to the grid. The controllers were obtained through the linear matrix inequalities (LMI) using the D-stability analysis to allocate the closed-loop controller poles. Therefore, the results show quick transient response with low oscillations. Thus, this paper presents the proposed control technique, the main simulation results and a prototype with 1000VA was developed in the laboratory in order to demonstrate the feasibility of the proposed control. © 2012 IEEE.

Proposta de parametrização para o fluxo de carga continuado visando redução de perdas na transmissão e o aumento da margem estática de estabilidade de tensão

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

Planejamento de reativos em sistemas elétricos de potência multi-área através de modelos estocásticos

Pós-graduação em Engenharia Elétrica - FEIS

Energetic exploitation from a hybrid PV-wind power micro-generation rural electrification

Hybrid system micro-generation integration of PV-wind power is presented by a form of energy in which problems resulting from variability in the intensity of wind and solar intensity are possible mitigation either by complementation between one source to another or the largest stability configured by the generate the system. Based on this context, this work aims to assessing the performance of a hybrid system PV-wind power energy small of a rural property for their electrification. The study has been developed at the Rural Laboratory Powering from Engineering Department of UNESP. In order to present this research, a hybrid system has been installed PV-wind power, composed of one 400Wp windmill and a 300 Wp PV-system. The results obtained allowed us to evaluate the solar and wind energy supplied ranked among 285 and 360 kWh electric power generated by the PV-wind power hybrid system stood between 25,5 and 31 kWh. At is to say achieving yield of approximately than 10% during one year observation period, i.e., it was concluded that the performance of the hybrid system depended essentially the energy received and generated by the PV-system and that there was complementation between generating wind power and PV-systems with regard to time of day and the annual seasons by confirming the technical feasibility of this kind system of micro-generation in small rural properties.

Fluxo de potência continuado baseado em equações de injeção de corrente expressas em coordenadas polares

Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES)

Improved low-voltage-ride-through capability of fixed-speed wind turbines using decentralised control of STATCOM with energy storage system

The design and implementation of a new control scheme for reactive power compensation, voltage regulation and transient stability enhancement for wind turbines equipped with fixed-speed induction generators (IGs) in large interconnected power systems is presented in this study. The low-voltage-ride-through (LVRT) capability is provided by extending the range of the operation of the controlled system to include typical post-fault conditions. A systematic procedure is proposed to design decentralised multi-variable controllers for large interconnected power systems using the linear quadratic (LQ) output-feedback control design method and the controller design procedure is formulated as an optimisation problem involving rank-constrained linear matrix inequality (LMI). In this study, it is shown that a static synchronous compensator (STATCOM) with energy storage system (ESS), controlled via robust control technique, is an effective device for improving the LVRT capability of fixed-speed wind turbines.

Algebraic-graph method for identification of islanding in power system grids

In this paper, a new algebraic-graph method for identification of islanding in power system grids is proposed. The proposed method identifies all the possible cases of islanding, due to the loss of a equipment, by means of a factorization of the bus-branch incidence matrix. The main features of this new method include: (i) simple implementation, (ii) high speed, (iii) real-time adaptability, (iv) identification of all islanding cases and (v) identification of the buses that compose each island in case of island formation. The method was successfully tested on large-scale systems such as the reduced south Brazilian system (45 buses/72 branches) and the south-southeast Brazilian system (810 buses/1340 branches). (C) 2011 Elsevier Ltd. All rights reserved.

Analysis of charge-transport properties in GST materials for next generation phase-change memory devices

The quest for universal memory is driving the rapid development of memories with superior all-round capabilities in non-volatility, high speed, high endurance and low power. The memory subsystem accounts for a significant cost and power budget of a computer system. Current DRAM-based main memory systems are starting to hit the power and cost limit. To resolve this issue the industry is improving existing technologies such as Flash and exploring new ones. Among those new technologies is the Phase Change Memory (PCM), which overcomes some of the shortcomings of the Flash such as durability and scalability. This alternative non-volatile memory technology, which uses resistance contrast in phase-change materials, offers more density relative to DRAM, and can help to increase main memory capacity of future systems while remaining within the cost and power constraints. Chalcogenide materials can suitably be exploited for manufacturing phase-change memory devices. Charge transport in amorphous chalcogenide-GST used for memory devices is modeled using two contributions: hopping of trapped electrons and motion of band electrons in extended states. Crystalline GST exhibits an almost Ohmic I(V) curve. In contrast amorphous GST shows a high resistance at low biases while, above a threshold voltage, a transition takes place from a highly resistive to a conductive state, characterized by a negative differential-resistance behavior. A clear and complete understanding of the threshold behavior of the amorphous phase is fundamental for exploiting such materials in the fabrication of innovative nonvolatile memories. The type of feedback that produces the snapback phenomenon is described as a filamentation in energy that is controlled by electron–electron interactions between trapped electrons and band electrons. The model thus derived is implemented within a state-of-the-art simulator. An analytical version of the model is also derived and is useful for discussing the snapback behavior and the scaling properties of the device.

Measurements of C-reactive protein in serum and lactate dehydrogenase in serum and synovial fluid of patients with osteoarthritis

Diagnosis of osteoarthritis (OA) is based upon the clinical orthopaedic examination and the radiographic assessment, both of which can be non-specific and insensitive in early joint disease. The aim of our study was to investigate if there is an increase in serum levels of C-reactive protein (CRP) in degenerative joint disease (DJD) and if CRP could be used to help diagnose OA. We also wished to investigate whether it was possible to distinguish a joint with clinically and radiographically confirmed OA from a healthy joint by comparing lactate dehydrogenase (LDH) levels within the synovial fluid and the serum. We have shown a difference in synovial LDH levels between diseased and healthy joints (P<0.0001). There was also a significant difference between LDH in arthritic synovial fluid and serum, with no correlation between the values. Despite the fact that the values of our clinical patients tended to be higher than the values of our control group (P=0.05) all measured values were within the normal limits of previous publications. From these data, we conclude that single measurements of serum CRP do not permit detection of OA in clinical patients and that serum LDH is not a reliable marker for osteoarthritis. LDH levels in the synovial fluid could be of diagnostic value for identifying osteoarthritis.

Enabling the Next Generation of Spaceborne Quadrupole Mass Spectrometers

The quadrupole mass spectrometer (QMS) has over 30 years of spaceflight heritage in making important neutral gas and low energy ion observations. Given their geometrical constraints, these instruments are currently operated at the extreme limit of their capabilities. However, a technique called higher order auxiliary excitation provides a set of novel, robust, electronics-based solutions for improving the performance of these sensors. By driving the quadrupole rods with an additional frequency nearly twice that of the normal RF operating frequency, substantially increased abundance sensitivity, maximum attainable mass resolution, and peak stability can be achieved through operation of voltage scan lines through the center of formed upper stability islands. Such improvements are modeled using numerical simulations of ion trajectories in a quadrupole field with and without applied higher order auxiliary excitation. When compared to a traditional QMS with a mass range up to 500Da, sensors can be designed with the same precision electronics to have expected mass ranges beyond 1500Da with a power increase of less than twice that of its heritage implementations.

A SIMULATION STUDY OF THE SIZE AND POWER OF SOME TWO-SAMPLE TESTS FOR UNEQUALLY CENSORED SURVIVAL DATA (RANK TESTS, LOGRANK, PROPORTIONAL HAZARDS, WILCOXON TESTS, EXPONENTIAL DISTRIBUTION)

Sizes and power of selected two-sample tests of the equality of survival distributions are compared by simulation for small samples from unequally, randomly-censored exponential distributions. The tests investigated include parametric tests (F, Score, Likelihood, Asymptotic), logrank tests (Mantel, Peto-Peto), and Wilcoxon-Type tests (Gehan, Prentice). Equal sized samples, n = 18, 16, 32 with 1000 (size) and 500 (power) simulation trials, are compared for 16 combinations of the censoring proportions 0%, 20%, 40%, and 60%. For n = 8 and 16, the Asymptotic, Peto-Peto, and Wilcoxon tests perform at nominal 5% size expectations, but the F, Score and Mantel tests exceeded 5% size confidence limits for 1/3 of the censoring combinations. For n = 32, all tests showed proper size, with the Peto-Peto test most conservative in the presence of unequal censoring. Powers of all tests are compared for exponential hazard ratios of 1.4 and 2.0. There is little difference in power characteristics of the tests within the classes of tests considered. The Mantel test showed 90% to 95% power efficiency relative to parametric tests. Wilcoxon-type tests have the lowest relative power but are robust to differential censoring patterns. A modified Peto-Peto test shows power comparable to the Mantel test. For n = 32, a specific Weibull-exponential comparison of crossing survival curves suggests that the relative powers of logrank and Wilcoxon-type tests are dependent on the scale parameter of the Weibull distribution. Wilcoxon-type tests appear more powerful than logrank tests in the case of late-crossing and less powerful for early-crossing survival curves. Guidelines for the appropriate selection of two-sample tests are given. ^

On-Chip Thermal Monitoring: Design, Placement and Interconnection of Temperature Sensors

La temperatura es una preocupación que juega un papel protagonista en el diseño de circuitos integrados modernos. El importante aumento de las densidades de potencia que conllevan las últimas generaciones tecnológicas ha producido la aparición de gradientes térmicos y puntos calientes durante el funcionamiento normal de los chips. La temperatura tiene un impacto negativo en varios parámetros del circuito integrado como el retardo de las puertas, los gastos de disipación de calor, la fiabilidad, el consumo de energía, etc. Con el fin de luchar contra estos efectos nocivos, la técnicas de gestión dinámica de la temperatura (DTM) adaptan el comportamiento del chip en función en la información que proporciona un sistema de monitorización que mide en tiempo de ejecución la información térmica de la superficie del dado. El campo de la monitorización de la temperatura en el chip ha llamado la atención de la comunidad científica en los últimos años y es el objeto de estudio de esta tesis. Esta tesis aborda la temática de control de la temperatura en el chip desde diferentes perspectivas y niveles, ofreciendo soluciones a algunos de los temas más importantes. Los niveles físico y circuital se cubren con el diseño y la caracterización de dos nuevos sensores de temperatura especialmente diseñados para los propósitos de las técnicas DTM. El primer sensor está basado en un mecanismo que obtiene un pulso de anchura variable dependiente de la relación de las corrientes de fuga con la temperatura. De manera resumida, se carga un nodo del circuito y posteriormente se deja flotando de tal manera que se descarga a través de las corrientes de fugas de un transistor; el tiempo de descarga del nodo es la anchura del pulso. Dado que la anchura del pulso muestra una dependencia exponencial con la temperatura, la conversión a una palabra digital se realiza por medio de un contador logarítmico que realiza tanto la conversión tiempo a digital como la linealización de la salida. La estructura resultante de esta combinación de elementos se implementa en una tecnología de 0,35 _m. El sensor ocupa un área muy reducida, 10.250 nm2, y consume muy poca energía, 1.05-65.5nW a 5 muestras/s, estas cifras superaron todos los trabajos previos en el momento en que se publicó por primera vez y en el momento de la publicación de esta tesis, superan a todas las implementaciones anteriores fabricadas en el mismo nodo tecnológico. En cuanto a la precisión, el sensor ofrece una buena linealidad, incluso sin calibrar; se obtiene un error 3_ de 1,97oC, adecuado para tratar con las aplicaciones de DTM. Como se ha explicado, el sensor es completamente compatible con los procesos de fabricación CMOS, este hecho, junto con sus valores reducidos de área y consumo, lo hacen especialmente adecuado para la integración en un sistema de monitorización de DTM con un conjunto de monitores empotrados distribuidos a través del chip. Las crecientes incertidumbres de proceso asociadas a los últimos nodos tecnológicos comprometen las características de linealidad de nuestra primera propuesta de sensor. Con el objetivo de superar estos problemas, proponemos una nueva técnica para obtener la temperatura. La nueva técnica también está basada en las dependencias térmicas de las corrientes de fuga que se utilizan para descargar un nodo flotante. La novedad es que ahora la medida viene dada por el cociente de dos medidas diferentes, en una de las cuales se altera una característica del transistor de descarga |la tensión de puerta. Este cociente resulta ser muy robusto frente a variaciones de proceso y, además, la linealidad obtenida cumple ampliamente los requisitos impuestos por las políticas DTM |error 3_ de 1,17oC considerando variaciones del proceso y calibrando en dos puntos. La implementación de la parte sensora de esta nueva técnica implica varias consideraciones de diseño, tales como la generación de una referencia de tensión independiente de variaciones de proceso, que se analizan en profundidad en la tesis. Para la conversión tiempo-a-digital, se emplea la misma estructura de digitalización que en el primer sensor. Para la implementación física de la parte de digitalización, se ha construido una biblioteca de células estándar completamente nueva orientada a la reducción de área y consumo. El sensor resultante de la unión de todos los bloques se caracteriza por una energía por muestra ultra baja (48-640 pJ) y un área diminuta de 0,0016 mm2, esta cifra mejora todos los trabajos previos. Para probar esta afirmación, se realiza una comparación exhaustiva con más de 40 propuestas de sensores en la literatura científica. Subiendo el nivel de abstracción al sistema, la tercera contribución se centra en el modelado de un sistema de monitorización que consiste de un conjunto de sensores distribuidos por la superficie del chip. Todos los trabajos anteriores de la literatura tienen como objetivo maximizar la precisión del sistema con el mínimo número de monitores. Como novedad, en nuestra propuesta se introducen nuevos parámetros de calidad aparte del número de sensores, también se considera el consumo de energía, la frecuencia de muestreo, los costes de interconexión y la posibilidad de elegir diferentes tipos de monitores. El modelo se introduce en un algoritmo de recocido simulado que recibe la información térmica de un sistema, sus propiedades físicas, limitaciones de área, potencia e interconexión y una colección de tipos de monitor; el algoritmo proporciona el tipo seleccionado de monitor, el número de monitores, su posición y la velocidad de muestreo _optima. Para probar la validez del algoritmo, se presentan varios casos de estudio para el procesador Alpha 21364 considerando distintas restricciones. En comparación con otros trabajos previos en la literatura, el modelo que aquí se presenta es el más completo. Finalmente, la última contribución se dirige al nivel de red, partiendo de un conjunto de monitores de temperatura de posiciones conocidas, nos concentramos en resolver el problema de la conexión de los sensores de una forma eficiente en área y consumo. Nuestra primera propuesta en este campo es la introducción de un nuevo nivel en la jerarquía de interconexión, el nivel de trillado (o threshing en inglés), entre los monitores y los buses tradicionales de periféricos. En este nuevo nivel se aplica selectividad de datos para reducir la cantidad de información que se envía al controlador central. La idea detrás de este nuevo nivel es que en este tipo de redes la mayoría de los datos es inútil, porque desde el punto de vista del controlador sólo una pequeña cantidad de datos |normalmente sólo los valores extremos| es de interés. Para cubrir el nuevo nivel, proponemos una red de monitorización mono-conexión que se basa en un esquema de señalización en el dominio de tiempo. Este esquema reduce significativamente tanto la actividad de conmutación sobre la conexión como el consumo de energía de la red. Otra ventaja de este esquema es que los datos de los monitores llegan directamente ordenados al controlador. Si este tipo de señalización se aplica a sensores que realizan conversión tiempo-a-digital, se puede obtener compartición de recursos de digitalización tanto en tiempo como en espacio, lo que supone un importante ahorro de área y consumo. Finalmente, se presentan dos prototipos de sistemas de monitorización completos que de manera significativa superan la características de trabajos anteriores en términos de área y, especialmente, consumo de energía. Abstract Temperature is a first class design concern in modern integrated circuits. The important increase in power densities associated to recent technology evolutions has lead to the apparition of thermal gradients and hot spots during run time operation. Temperature impacts several circuit parameters such as speed, cooling budgets, reliability, power consumption, etc. In order to fight against these negative effects, dynamic thermal management (DTM) techniques adapt the behavior of the chip relying on the information of a monitoring system that provides run-time thermal information of the die surface. The field of on-chip temperature monitoring has drawn the attention of the scientific community in the recent years and is the object of study of this thesis. This thesis approaches the matter of on-chip temperature monitoring from different perspectives and levels, providing solutions to some of the most important issues. The physical and circuital levels are covered with the design and characterization of two novel temperature sensors specially tailored for DTM purposes. The first sensor is based upon a mechanism that obtains a pulse with a varying width based on the variations of the leakage currents on the temperature. In a nutshell, a circuit node is charged and subsequently left floating so that it discharges away through the subthreshold currents of a transistor; the time the node takes to discharge is the width of the pulse. Since the width of the pulse displays an exponential dependence on the temperature, the conversion into a digital word is realized by means of a logarithmic counter that performs both the timeto- digital conversion and the linearization of the output. The structure resulting from this combination of elements is implemented in a 0.35_m technology and is characterized by very reduced area, 10250 nm2, and power consumption, 1.05-65.5 nW at 5 samples/s, these figures outperformed all previous works by the time it was first published and still, by the time of the publication of this thesis, they outnumber all previous implementations in the same technology node. Concerning the accuracy, the sensor exhibits good linearity, even without calibration it displays a 3_ error of 1.97oC, appropriate to deal with DTM applications. As explained, the sensor is completely compatible with standard CMOS processes, this fact, along with its tiny area and power overhead, makes it specially suitable for the integration in a DTM monitoring system with a collection of on-chip monitors distributed across the chip. The exacerbated process fluctuations carried along with recent technology nodes jeop-ardize the linearity characteristics of the first sensor. In order to overcome these problems, a new temperature inferring technique is proposed. In this case, we also rely on the thermal dependencies of leakage currents that are used to discharge a floating node, but now, the result comes from the ratio of two different measures, in one of which we alter a characteristic of the discharging transistor |the gate voltage. This ratio proves to be very robust against process variations and displays a more than suficient linearity on the temperature |1.17oC 3_ error considering process variations and performing two-point calibration. The implementation of the sensing part based on this new technique implies several issues, such as the generation of process variations independent voltage reference, that are analyzed in depth in the thesis. In order to perform the time-to-digital conversion, we employ the same digitization structure the former sensor used. A completely new standard cell library targeting low area and power overhead is built from scratch to implement the digitization part. Putting all the pieces together, we achieve a complete sensor system that is characterized by ultra low energy per conversion of 48-640pJ and area of 0.0016mm2, this figure outperforms all previous works. To prove this statement, we perform a thorough comparison with over 40 works from the scientific literature. Moving up to the system level, the third contribution is centered on the modeling of a monitoring system consisting of set of thermal sensors distributed across the chip. All previous works from the literature target maximizing the accuracy of the system with the minimum number of monitors. In contrast, we introduce new metrics of quality apart form just the number of sensors; we consider the power consumption, the sampling frequency, the possibility to consider different types of monitors and the interconnection costs. The model is introduced in a simulated annealing algorithm that receives the thermal information of a system, its physical properties, area, power and interconnection constraints and a collection of monitor types; the algorithm yields the selected type of monitor, the number of monitors, their position and the optimum sampling rate. We test the algorithm with the Alpha 21364 processor under several constraint configurations to prove its validity. When compared to other previous works in the literature, the modeling presented here is the most complete. Finally, the last contribution targets the networking level, given an allocated set of temperature monitors, we focused on solving the problem of connecting them in an efficient way from the area and power perspectives. Our first proposal in this area is the introduction of a new interconnection hierarchy level, the threshing level, in between the monitors and the traditional peripheral buses that applies data selectivity to reduce the amount of information that is sent to the central controller. The idea behind this new level is that in this kind of networks most data are useless because from the controller viewpoint just a small amount of data |normally extreme values| is of interest. To cover the new interconnection level, we propose a single-wire monitoring network based on a time-domain signaling scheme that significantly reduces both the switching activity over the wire and the power consumption of the network. This scheme codes the information in the time domain and allows a straightforward obtention of an ordered list of values from the maximum to the minimum. If the scheme is applied to monitors that employ TDC, digitization resource sharing is achieved, producing an important saving in area and power consumption. Two prototypes of complete monitoring systems are presented, they significantly overcome previous works in terms of area and, specially, power consumption.