Improved switching frequency variation control of hysteresis controlled voltage source inverter-fed IM drives using current error space vector

A constant switching frequency current error space vector-based hysteresis controller for two-level voltage source inverter-fed induction motor (IM) drives is proposed in this study. The proposed controller is capable of driving the IM in the entire speed range extending to the six-step mode. The proposed controller uses the parabolic boundary, reported earlier, for vector selection in a sector, but uses simple, fast and self-adaptive sector identification logic for sector change detection in the entire modulation range. This new scheme detects the sector change using the change in direction of current error along the axes jA, jB and jC. Most of the previous schemes use an outer boundary for sector change detection. So the current error goes outside the boundary six times during sector change, in one cycle,, introducing additional fifth and seventh harmonic components in phase current. This may cause sixth harmonic torque pulsations in the motor and spread in the harmonic spectrum of phase voltage. The proposed new scheme detects the sector change fast and accurately eliminating the chance of introducing additional fifth and seventh harmonic components in phase current and provides harmonic spectrum of phase voltage, which exactly matches with that of constant switching frequency voltage-controlled space vector pulse width modulation (VC-SVPWM)-based two-level inverter-fed drives.

The RATAS-project, in the Light of 25 Years of Development Towards Computer-Integrated Construction

In smaller countries where the key players in construction IT development tend to know each other personally and where public R&D funding is concentrated to a few channels, IT roadmaps and strategies would seem to have a better chance of influencing development than in the bigger industrial countries. In this paper Finland and the RATAS-project is presented as a historical case illustrating such impact. RATAS was initiated as a construction IT roadmap project in 1985, involving many of the key organisations and companies active in construction sector development. Several of the individuals who took an active part in the project have played an important role in later developments both in Finland and on the international scene. The central result of RATAS was the identification of what is nowadays called Building Information Modelling (BIM) technology as the central issue in getting IT into efficient use in the construction sector. BIM, which earlier was referred to as building product modelling, has been a key ingredient in many roadmaps since and the subject of international standardisation efforts such as STEP and IAI/IFCs. The RATAS project can in hindsight be seen as a forerunner with an impact which also transcended national borders.

An Integrated Design Procedure for High Frequency AC Inductors for Inverters

Inductors are important energy storage elements that are used as filters in switching power converters. The operating efficiency of power inductors depend on the initial design choices and they remain as one of the most inefficient elements in a power converter. The focus of this paper is to explore the inductor design procedure from the point of efficiency and operating temperature. A modified form of the area product approach is used as starting point for the inductor design. The equations which estimate the power loss in core and copper winding are described. The surface temperature of the inductor is modelled using heat transfer equations for radiation and natural convection. All design assumptions are verified by actual experimental data and results show a good match with the analysis.

A Hardware Grid Simulator to Test Grid-Connected Inverter Systems.

Grid-connected systems when put to use at the site would experience scenarios like voltage sag, voltage swell, frequency deviations and unbalance which are common in the real world grid. When these systems are tested at laboratory, these scenarios do not exist and an almost stiff voltage source is what is usually seen. But, to qualify the grid-connected systems to operate at the site, it becomes essential to test them under the grid conditions mentioned earlier. The grid simulator is a hardware that can be programmed to generate some of the typical conditions experienced by the grid-connected systems at site. It is an inverter that is controlled to act like a voltage source in series with a grid impedance. The series grid impedance is emulated virtually within the inverter control rather than through physical components, thus avoiding the losses and the need for bulky reactive components. This paper describes the design of a grid simulator. Control implementation issues are highlighted in the experimental results.

Elimination of common mode voltage and fifth and seventh harmonics in a multilevel inverter fed IM drive using 12-sided polygonal voltage spacephasor

A multilevel inverter with 12-sided polygonal voltage space vector structure is proposed in this paper. The present scheme provides elimination of common mode voltage variation and 5(th) and 7(th) order harmonics in the entire operating range of the drive. The proposed multi level structure is achieved by cascading only the conventional two-level inverters with asymmetrical DC link voltages. The bandwidths problems associated with conventional hexagonal voltage space vector structure current controllers, due to the presence of 5(th) and 7(th) harmonics, in the over modulation region, is absent in the present 12-sided structure. So a linear voltage control up to 12-step operation is possible, from the present twelve sided scheme, with less current control complexity. An open-end winding structure is used for the induction motor drive.

Time Scale Separated Nonlinear Partial Integrated Guidance and Control of Interceptors in the Terminal Phase

The paper proposes a time scale separated partial integrated guidance and control of an interceptor for engaging high speed targets in the terminal phase. In this two loop design, the outer loop is an optimal control formulation based on nonlinear model predictive spread control philosophies. It gives the commanded pitch and yaw rates whereas necessary roll-rate command is generated from a roll-stabilization loop. The inner loop tracks the outer loop commands using the dynamicinversion philosophy. However, unlike conventional designs, in both the loops the Six degree of freedom (Six-DOF) interceptor model is used directly. This intelligent manipulation preserves the inherent time scale separation property between the translational and rotational dynamics, and hence overcomes the deficiency of current IGC designs, while preserving its benefits. Six-DOF simulation studies have been carried out accounting for three dimensional engagement geometry. Different comparison studies were also conducted to measure the performance of the algorithm.

Al/SiC carriers for microwave integrated circuits by a new technique of pressureless infiltration

Materials with high thermal conductivity and thermal expansion coefficient matching with that of Si or GaAs are being used for packaging high density microcircuits due to their ability of faster heat dissipation. Al/SiC is gaining wide acceptance as electronic packaging material due to the fact that its thermal expansion coefficient can be tailored to match with that of Si or GaAs by varying the Al:SiC ratio while maintaining the thermal conductivity more or less the same. In the present work, Al/SiC microwave integrated circuit (MIC) carriers have been fabricated by pressureless infiltration of Al-alloy into porous SiC preforms in air. This new technique provides a cheaper alternative to pressure infiltration or pressureless infiltration in nitrogen in producing Al/SiC composites for electronic packaging applications. Al-alloy/65vol% SiC composite exhibited a coefficient of thermal expansion of 7 x 10(-6) K-1 (25 degrees C-100 degrees C) and a thermal conductivity of 147 Wm(-1) K-1 at 30 degrees C. The hysteresis observed in thermal expansion coefficient of the composite in the temperature range 100 degrees C-400 degrees C has been attributed to the presence of thermal residual stresses in the composite. Thermal diffusivity of the composite measured over the temperature range from 30 degrees C to 400 degrees C showed a 55% decrease in thermal diffusivity with temperature. Such a large decrease in thermal diffusivity with temperature could be due to the presence of micropores, microcracks, and decohesion of the Al/SiC interfaces in the microstructure (all formed during cooling from the processing temperature). The carrier showed satisfactory performance after integrating it into a MIC.

Performance evaluation of an integrated solar water heater as an option for building energy conservation

Since a majority of residential and industrial building hot water needs are around 50 degrees C, an integrated solar water heater could provide a bulk source that blends collection and storage into one unit. This paper describes the design, construction and performance test results of one such water-heating device. The test unit has an absorber area of 1.3 m(2) and can hold 1701 of water, of which extractable volume per day is 1001. Its performance was evaluated under various typical operating conditions. Every morning at about 7:00 a.m., 1001 of hot water were drawn from the sump and replaced with cold water from the mains. Although, during most of the days, the peak temperatures of water obtained are between 50 and 60 degrees C, the next morning temperatures were lower at 45-50 degrees C. Daytime collection efficiencies of about 60% and overall efficiencies of about 40% were obtained. Tests were conducted with and without stratification. Night radiation losses were reduced by use of a screen insulation.

DTC Technique for Induction Machine based Integrated Starter-Generator of an Automobile

This paper mainly concentrates on the application of the direct torque control (DTC) technique for the induction machine based integrated startergenerator (ISG) for automobile applications. It also discusses in brief about the higher DC bus voltage requirements in the automobiles i.e. present 14V system vs. 42V system to meet the power requirements, modes of operation of ISG, electric machine and the drive selection for the ISG,description of DTC technique, simulation and experimental results, and implementation.

A Simple Five-Level Inverter Topology for Induction Motor Drive Using Conventional Two-Level Inverters and Flying Capacitor Technique

This paper proposes a new five-level inverter topology for open-end winding induction motor (IM) drive. The popular existing circuit configurations for five-level inverter include the NPC inverter and flying capacitor topologies. Compared to the NPC inverter, the proposed topology eliminates eighteen clamping diodes having different voltage ratings in the present circuit. Moreover it requires only one capacitor bank per phase, whereas flying capacitor schemes for five level topologies require six capacitor banks per phase. The proposed topology is realized by feeding the phase winding of an open-end induction motor with two-level inverters in series with flying capacitors. The flying capacitor voltages are balanced using the switching state redundancy for full modulation range. The proposed inverter scheme is capable of producing two-level to five-level pulse width modulated voltage across the phase winding depending on the modulation range. Additionally, in case of any switch failure in the flying capacitor connection, the proposed inverter topology can be operated as a three-level inverter for full modulation range. The proposed scheme is experimentally verified on a four pole, 5hp induction motor drive.

A Five-Level Inverter Scheme for a Four-Pole Induction Motor Drive by Feeding the Identical Voltage-Profile Windings From Both Sides

This paper presents a five-level inverter scheme with four two-level inverters for a four-pole induction motor (IM) drive. In a conventional three-phase four-pole IM, there exists two identical voltage-profile winding coil groups per phase around the armature, which are connected in series and spatially apart by two pole pitches. In this paper, these two identical voltage-profile pole-pair winding coils in each phase of the IM are disconnected and fed from four two-level inverters from four sides of the windings with one-fourth dc-link voltage as compared to a conventional five-level neutral-point-clamped inverter. The scheme presented in this paper does not require any special design modification for the induction machine. For this paper, a four-pole IM drive is used, and the scheme can be easily extended to IMs with more than four poles. The proposed scheme is experimentally verified on a four-pole 5-hp IM drive.

Impact of energy quantisation in single electron transistor island on hybrid complementary metal oxide semiconductor-single electron transistor integrated circuits

For the first time, the impact of energy quantisation in single electron transistor (SET) island on the performance of hybrid complementary metal oxide semiconductor (CMOS)-SET transistor circuits has been studied. It has been shown through simple analytical models that energy quantisation primarily increases the Coulomb Blockade area and Coulomb Blockade oscillation periodicity of the SET device and thus influences the performance of hybrid CMOS-SET circuits. A novel computer aided design (CAD) framework has been developed for hybrid CMOS-SET co-simulation, which uses Monte Carlo (MC) simulator for SET devices along with conventional SPICE for metal oxide semiconductor devices. Using this co-simulation framework, the effects of energy quantisation have been studied for some hybrid circuits, namely, SETMOS, multiband voltage filter and multiple valued logic circuits. Although energy quantisation immensely deteriorates the performance of the hybrid circuits, it has been shown that the performance degradation because of energy quantisation can be compensated by properly tuning the bias current of the current-biased SET devices within the hybrid CMOS-SET circuits. Although this study is primarily done by exhaustive MC simulation, effort has also been put to develop first-order compact model for SET that includes energy quantisation effects. Finally, it has been demonstrated that one can predict the SET behaviour under energy quantisation with reasonable accuracy by slightly modifying the existing SET compact models that are valid for metallic devices having continuous energy states.

An Integrated Model of Designing

Current design models and frameworks describe various overlapping fragments of designing. However, little effort exists in consolidating these fragments into an integrated model. We propose a model of designing that integrates product and process facets of designing by combining activities, outcomes, requirements, and solutions. Validation of the model using video protocols of design sessions demonstrates that all the constructs are used naturally by designers but often not to the expected level, which hinders the variety and resulting novelty of the concepts developed in these sessions. To resolve this, a prescriptive framework for supporting design for variety and novelty is proposed and plans for its implementation are created. DOI: 10.1115/1.3467011]