888 resultados para Systems engineering -- TFC


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Stealthy attackers move patiently through computer networks - taking days, weeks or months to accomplish their objectives in order to avoid detection. As networks scale up in size and speed, monitoring for such attack attempts is increasingly a challenge. This paper presents an efficient monitoring technique for stealthy attacks. It investigates the feasibility of proposed method under number of different test cases and examines how design of the network affects the detection. A methodological way for tracing anonymous stealthy activities to their approximate sources is also presented. The Bayesian fusion along with traffic sampling is employed as a data reduction method. The proposed method has the ability to monitor stealthy activities using 10-20% size sampling rates without degrading the quality of detection.

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Rotational moulding is a method to produce hollow plastic articles. Heating is normally carried out by placing the mould into a hot air oven where the plastic material in the mould is heated. The most common cooling media are water and forced air. Due to the inefficient nature of conventional hot air ovens most of the energy supplied by the oven does not go to heat the plastic and as a consequence the procedure has very long cycle times. Direct oil heating is an effective alternative in order to achieve better energy efficiency and cycle times. This research work has combined this technology with new innovative design of mould, applying the advantages of electroforming and rapid prototyping. Complex cavity geometries are manufactured by electroforming from a rapid prototyping mandrel. The approach involves conformal heating and cooling channels , where the oil flows into a parallel channel to the electroformed cavity (nickel or copper). Because of this the mould enables high temperature uniformity with direct heating and cooling of the electroformed shell, Uniform heating and cooling is important not only for good quality parts but also for good uniform wall thickness distribution in the rotationally moulded part. The experimental work with the manufactured prototype mould has enabled analysis of the thermal uniformity in the cavity, under different temperatures. Copyright © 2008 by ASME.

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The measurement of fast changing temperature fluctuations is a challenging problem due to the inherent limited bandwidth of temperature sensors. This results in a measured signal that is a lagged and attenuated version of the input. Compensation can be performed provided an accurate, parameterised sensor model is available. However, to account for the influence of the measurement environment and changing conditions such as gas velocity, the model must be estimated in-situ. The cross-relation method of blind deconvolution is one approach for in-situ characterisation of sensors. However, a drawback with the method is that it becomes positively biased and unstable at high noise levels. In this paper, the cross-relation method is cast in the discrete-time domain and a bias compensation approach is developed. It is shown that the proposed compensation scheme is robust and yields unbiased estimates with lower estimation variance than the uncompensated version. All results are verified using Monte-Carlo simulations.

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To maintain the pace of development set by Moore's law, production processes in semiconductor manufacturing are becoming more and more complex. The development of efficient and interpretable anomaly detection systems is fundamental to keeping production costs low. As the dimension of process monitoring data can become extremely high anomaly detection systems are impacted by the curse of dimensionality, hence dimensionality reduction plays an important role. Classical dimensionality reduction approaches, such as Principal Component Analysis, generally involve transformations that seek to maximize the explained variance. In datasets with several clusters of correlated variables the contributions of isolated variables to explained variance may be insignificant, with the result that they may not be included in the reduced data representation. It is then not possible to detect an anomaly if it is only reflected in such isolated variables. In this paper we present a new dimensionality reduction technique that takes account of such isolated variables and demonstrate how it can be used to build an interpretable and robust anomaly detection system for Optical Emission Spectroscopy data.

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Los desarrollos tecnológicos y las siempre cambiantes realidades de la organización se han convertido en agentes que han obligado a los diseñadores a repensar la estructura de la red. El incremento en el número de usuarios y en el número de aplicaciones que utilizan la red incrementó el tráfico a volúmenes nunca antes sospechados, se hizo entonces necesario concebir su estructura como una estructura jerárquica y modular, con diferentes requerimientos de capacidad y desempeño en cada nivel, y obligó a entender su diseño como un proceso. En este artículo nos proponemos presentar la evolución que ha tenido la arquitectura de una red para responder a los frecuentes cambios a los que se ven expuestas las organizaciones en las que existen.

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En este trabajo el término arquitectura se refiere principalmente a la estructura lógica de sus componentes de software. Sin embargo, cuando se requiera, otros aspectos tales como elhardware y el sistema operativo se tienen en cuenta. El objeto del sistema resultante es brindar dos servicios de telemedicina otorrinolaringológica a practicantes en medicina o a doctores en locaciones remotas. En general, el difícil acceso a la prácticay la dificultad de acceder a servicios médicos en locaciones geográficamente remotas son situaciones comunes en América Latina. De acuerdo con esto, un sistema de soporte sería degran ayuda. Los servicios sugeridos, entrenamiento remoto utilizando simulación virtual y soporte remoto a la toma de decisiones, deben estar soportados por una arquitecturaapropiada a la internet. Este documento presenta primero una introducción al proyecto. Seguidamente se describe la novedad del trabajo. A continuación se detallan los servicios y la arquitectura propuestos. Finalmente, se presentan los resultados y una serie de conclusiones y pasos a seguir.

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Dada la gran importancia que ha tomado el paradigma orientado a objetos en la ingeniería de software y al papel central que juega la reusabilidad dentro de éste, se hacen necesarias la precisión y formalización de conceptos claves como cohesión, acoplamiento y modularidad. En este trabajo se propone una formalización matemática de esos conceptos claves basada en la topología algebraica y que nos conduce a unos criterios formales de diseño modular que facilitan la medición de los conceptos.

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Contemporary integrated circuits are designed and manufactured in a globalized environment leading to concerns of piracy, overproduction and counterfeiting. One class of techniques to combat these threats is circuit obfuscation which seeks to modify the gate-level (or structural) description of a circuit without affecting its functionality in order to increase the complexity and cost of reverse engineering. Most of the existing circuit obfuscation methods are based on the insertion of additional logic (called “key gates”) or camouflaging existing gates in order to make it difficult for a malicious user to get the complete layout information without extensive computations to determine key-gate values. However, when the netlist or the circuit layout, although camouflaged, is available to the attacker, he/she can use advanced logic analysis and circuit simulation tools and Boolean SAT solvers to reveal the unknown gate-level information without exhaustively trying all the input vectors, thus bringing down the complexity of reverse engineering. To counter this problem, some ‘provably secure’ logic encryption algorithms that emphasize methodical selection of camouflaged gates have been proposed previously in literature [1,2,3]. The contribution of this paper is the creation and simulation of a new layout obfuscation method that uses don't care conditions. We also present proof-of-concept of a new functional or logic obfuscation technique that not only conceals, but modifies the circuit functionality in addition to the gate-level description, and can be implemented automatically during the design process. Our layout obfuscation technique utilizes don’t care conditions (namely, Observability and Satisfiability Don’t Cares) inherent in the circuit to camouflage selected gates and modify sub-circuit functionality while meeting the overall circuit specification. Here, camouflaging or obfuscating a gate means replacing the candidate gate by a 4X1 Multiplexer which can be configured to perform all possible 2-input/ 1-output functions as proposed by Bao et al. [4]. It is important to emphasize that our approach not only obfuscates but alters sub-circuit level functionality in an attempt to make IP piracy difficult. The choice of gates to obfuscate determines the effort required to reverse engineer or brute force the design. As such, we propose a method of camouflaged gate selection based on the intersection of output logic cones. By choosing these candidate gates methodically, the complexity of reverse engineering can be made exponential, thus making it computationally very expensive to determine the true circuit functionality. We propose several heuristic algorithms to maximize the RE complexity based on don’t care based obfuscation and methodical gate selection. Thus, the goal of protecting the design IP from malicious end-users is achieved. It also makes it significantly harder for rogue elements in the supply chain to use, copy or replicate the same design with a different logic. We analyze the reverse engineering complexity by applying our obfuscation algorithm on ISCAS-85 benchmarks. Our experimental results indicate that significant reverse engineering complexity can be achieved at minimal design overhead (average area overhead for the proposed layout obfuscation methods is 5.51% and average delay overhead is about 7.732%). We discuss the strengths and limitations of our approach and suggest directions that may lead to improved logic encryption algorithms in the future. References: [1] R. Chakraborty and S. Bhunia, “HARPOON: An Obfuscation-Based SoC Design Methodology for Hardware Protection,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 28, no. 10, pp. 1493–1502, 2009. [2] J. A. Roy, F. Koushanfar, and I. L. Markov, “EPIC: Ending Piracy of Integrated Circuits,” in 2008 Design, Automation and Test in Europe, 2008, pp. 1069–1074. [3] J. Rajendran, M. Sam, O. Sinanoglu, and R. Karri, “Security Analysis of Integrated Circuit Camouflaging,” ACM Conference on Computer Communications and Security, 2013. [4] Bao Liu, Wang, B., "Embedded reconfigurable logic for ASIC design obfuscation against supply chain attacks,"Design, Automation and Test in Europe Conference and Exhibition (DATE), 2014 , vol., no., pp.1,6, 24-28 March 2014.

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This paper presents the conceptualization and use of a virtual classroom in the course EIF-200 Fundamentos de Informática, first course in the Information Systems Engineering career of the Universidad Nacional of Costa Rica. The virtual classroom is seen as a complement to the class and is conceived as a space that allows to centralize teaching resources, thereby promoting the  democratization of knowledge among students and teachers. Furthermore, this concept of virtual classroom helps to reduce the culture of individualism, present many times in university teaching practices, and contributes to create new opportunities to learn from other colleagues within a culture of reflection, analysis and respectful dialogue aimed to improve the teaching practices.

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En este artículo se presentan los mecanismos y procesos necesarios que realizan los enrutadores para ofrecer calidad de servicio en redes de paquetes y se hace especial énfasis en el estudio del estado del arte en lo referente a los algoritmos de planificación utilizados en este tipo de redes.

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La calidad de servicio se ha convertido en un tema de vital importancia para sus proveedores, pero su análisis ha estado orientado principalmente a la configuración en los dispositivos de interconectividad. El artículo presenta el análisis de los datos obtenidos en una serie de simulaciones realizadas en el núcleo de una red NGN con tecnología MPLS, donde de manera conjunta se han configurado mecanismos de calidad de servicio con configuraciones específicas dentro de la red de núcleo. Adicionalmente se presentan los análisis de los datos obtenidos en un montaje experimental de laboratorio de similares características al esquema simulado.

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Los mercados asociados a los servicios de voz móvil a móvil, brindados por operadoras del Sistema Móvil Avanzado en Latinoamérica, han estado sujetos a procesos regulatorios motivados por la dominancia en el mercado de un operador, buscando obtener óptimas condiciones de competencia. Específicamente en Ecuador, la Superintendencia de Telecomunicaciones (Organismo Técnico de Control de Telecomunicaciones) desarrolló un modelo para identificar acciones de regulación que puedan proporcionar al mercado efectos sostenibles de competencia en el largo plazo. Este artículo trata sobre la aplicación de la ingeniería de control para desarrollar un modelo integral del mercado, empleando redes neuronales para la predicción de trarifas de cada operador y un modelo de lógica difusa para predecir la demanda. Adicionalmente, se presenta un modelo de inferencia de lógica difusa para reproducir las estrategias de mercadeo de los operadores y la influencia sobre las tarifas. Dichos modelos permitirían la toma adecuada de decisiones y fueron validados con datos reales.

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En la actualidad, todos los servicios convergen en una Red de Próxima Generación [NGN]. Asimismo, las exigencias de calidad de servicio [QoS], por los requerimientos de los usuarios, son más estrictas, lo que hace necesario plantear procedimientos de QoS que garanticen una operación eficaz en el transporte de los servicios más críticos y de tiempo real ¿como la voz¿, garantizando la disminución de los problemas de latencia, jitter, pérdida de paquetes y eco. Los operadores de Telecomunicaciones deben aplicar las regulaciones emitidas por la Comisión de Regulación de Comunicaciones de Colombia [CRC] y ajustarse a las recomendaciones Y.1540 y Y.1541 de la Unión Internacional de Telecomunicaciones [UIT]. Este documento presenta un procedimiento para aplicar mecanismos de QoS en una NGN en el acceso xDSL con el fin de mantener un nivel de QoS en Voz sobre IP (VoIP) que permita su provisión, con eficiencia económica y técnica, en favor tanto del cliente, como del operador de telecomunicaciones.