980 resultados para Power Semiconductor Devices


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Germanium was of great interest in the 1950’s when it was used for the first transistor device. However, due to the water soluble and unstable oxide it was surpassed by silicon. Today, as device dimensions are shrinking the silicon oxide is no longer suitable due to gate leakage and other low-κ dielectrics such as Al2O3 and HfO2 are being used. Germanium (Ge) is a promising material to replace or integrate with silicon (Si) to continue the trend of Moore’s law. Germanium has better intrinsic mobilities than silicon and is also silicon fab compatible so it would be an ideal material choice to integrate into silicon-based technologies. The progression towards nanoelectronics requires a lot of in depth studies. Dynamic TEM studies allow observations of reactions to allow a better understanding of mechanisms and how an external stimulus may affect a material/structure. This thesis details in situ TEM experiments to investigate some essential processes for germanium nanowire (NW) integration into nanoelectronic devices; i.e. doping and Ohmic contact formation. Chapter 1 reviews recent advances in dynamic TEM studies on semiconductor (namely silicon and germanium) nanostructures. The areas included are nanowire/crystal growth, germanide/silicide formation, irradiation, electrical biasing, batteries and strain. Chapter 2 details the study of ion irradiation and the damage incurred in germanium nanowires. An experimental set-up is described to allow for concurrent observation in the TEM of a nanowire following sequential ion implantation steps. Grown nanowires were deposited on a FIB labelled SiN membrane grid which facilitated HRTEM imaging and facile navigation to a specific nanowire. Cross sections of irradiated nanowires were also performed to evaluate the damage across the nanowire diameter. Experiments were conducted at 30 kV and 5 kV ion energies to study the effect of beam energy on nanowires of varied diameters. The results on nanowires were also compared to the damage profile in bulk germanium with both 30 kV and 5 kV ion beam energies. Chapter 3 extends the work from chapter 2 whereby nanowires are annealed post ion irradiation. In situ thermal annealing experiments were conducted to observe the recrystallization of the nanowires. A method to promote solid phase epitaxial growth is investigated by irradiating only small areas of a nanowire to maintain a seed from which the epitaxial growth can initiate. It was also found that strain in the nanowire greatly effects defect formation and random nucleation and growth. To obtain full recovery of the crystal structure of a nanowire, a stable support which reduces strain in the nanowire is essential as well as containing a seed from which solid phase epitaxial growth can initiate. Chapter 4 details the study of nickel germanide formation in germanium nanostructures. Rows of EBL (electron beam lithography) defined Ni-capped germanium nanopillars were extracted in FIB cross sections and annealed in situ to observe the germanide formation. Chapter 5 summarizes the key conclusions of each chapter and discusses an outlook on the future of germanium nanowire studies to facilitate their future incorporation into nanodevices.

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As a device, the laser is an elegant conglomerate of elementary physical theories and state-of-the-art techniques ranging from quantum mechanics, thermal and statistical physics, material growth and non-linear mathematics. The laser has been a commercial success in medicine and telecommunication while driving the development of highly optimised devices specifically designed for a plethora of uses. Due to their low-cost and large-scale predictability many aspects of modern life would not function without the lasers. However, the laser is also a window into a system that is strongly emulated by non-linear mathematical systems and are an exceptional apparatus in the development of non-linear dynamics and is often used in the teaching of non-trivial mathematics. While single-mode semiconductor lasers have been well studied, a unified comparison of single and two-mode lasers is still needed to extend the knowledge of semiconductor lasers, as well as testing the limits of current model. Secondly, this work aims to utilise the optically injected semiconductor laser as a tool so study non-linear phenomena in other fields of study, namely ’Rogue waves’ that have been previously witnessed in oceanography and are suspected as having non-linear origins. The first half of this thesis includes a reliable and fast technique to categorise the dynamical state of optically injected two mode and single mode lasers. Analysis of the experimentally obtained time-traces revealed regions of various dynamics and allowed the automatic identification of their respective stability. The impact of this method is also extended to the detection regions containing bi-stabilities. The second half of the thesis presents an investigation into the origins of Rogue Waves in single mode lasers. After confirming their existence in single mode lasers, their distribution in time and sudden appearance in the time-series is studied to justify their name. An examination is also performed into the existence of paths that make Rogue Waves possible and the impact of noise on their distribution is also studied.

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This paper presents an investigation on air compressibility in the air chamber and its effects on the power conversion of oscillating water column (OWC) devices. As it is well known that for practical OWC plants, their air chambers may be large enough for accommodating significant air compressibility, the “spring effect,” an effect that is frequently and simply regarded to store and release energy during the reciprocating process of a wave cycle. Its insight effects on the device’s performance and power conversion, however, have not been studied in detail. This research will investigate the phenomena with a special focus on the effects of air compressibility on wave energy conversion. Air compressibility itself is a complicated nonlinear process in nature, but it can be linearised for numerical simulations under certain assumptions for frequency domain analysis. In this research work, air compressibility in the OWC devices is first linearised and further coupled with the hydrodynamics of the OWC. It is able to show mathematically that in frequency-domain, air compressibility can increase the spring coefficients of both the water body motion and the device motion (if it is a floating device), and enhance the coupling effects between the water body and the structure. Corresponding to these changes, the OWC performance, the capture power, and the optimised Power Take-off (PTO) damping coefficient in the wave energy conversion can be all modified due to air compressibility. To validate the frequency-domain results and understand the problems better, the more accurate time-domain simulations with fewer assumptions have been used for comparison. It is shown that air compressibility may significantly change the dynamic responses and the capacity of converting wave energy of the OWC devices if the air chamber is very large.

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Several studies in the past have revealed that network end user devices are left powered up 24/7 even when idle just for the sake of maintaining Internet connectivity. Network devices normally support low power states but are kept inactive due to their inability to maintain network connectivity. The Network Connectivity Proxy (NCP) has recently been proposed as an effective mechanism to impersonate network connectivity on behalf of high power devices and enable them to sleep when idle without losing network presence. The NCP can efficiently proxy basic networking protocol, however, proxying of Internet based applications have no absolute solution due to dynamic and non-predictable nature of the packets they are sending and receiving periodically. This paper proposes an approach for proxying Internet based applications and presents the basic software architectures and capabilities. Further, this paper also practically evaluates the proposed framework and analyzes expected energy savings achievable under-different realistic conditions.

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Oscillating wave surge converters are a promising technology to harvest ocean wave energy in the near shore region. Although research has been going on for many years, the characteristics of the wave action on the structure and especially the phase relation between the driving force and wave quantities like velocity or surface elevation have not been investigated in detail. The main reason for this is the lack of suitable methods. Experimental investigations using tank tests do not give direct access to overall hydrodynamic loads, only damping torque of a power take off system can be measured directly. Non-linear computational fluid dynamics methods have only recently been applied in the research of this type of devices. This paper presents a new metric named wave torque, which is the total hydrodynamic torque minus the still water pitch stiffness at any given angle of rotation. Changes in characteristics of that metric over a wave cycle and for different power take off settings are investigated using computational fluid dynamics methods. Firstly, it is shown that linearised methods cannot predict optimum damping in typical operating states of OWSCs. We then present phase relationships between main kinetic parameters for different damping levels. Although the flap seems to operate close to resonance, as predicted by linear theory, no obvious condition defining optimum damping is found.

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In many countries wind energy has become an indispensable part of the electricity generation mix. The opportunity for ground based wind turbine systems are becoming more and more constrained due to limitations on turbine hub heights, blade lengths and location restrictions linked to environmental and permitting issues including special areas of conservation and social acceptance due to the visual and noise impacts. In the last decade there have been numerous proposals to harness high altitude winds, such as tethered kites, airfoils and dirigible based rotors. These technologies are designed to operate above the neutral atmospheric boundary layer of 1,300 m, which are subject to more powerful and persistent winds thus generating much higher electricity capacities. This paper presents an in-depth review of the state-of-the-art of high altitude wind power, evaluates the technical and economic viability of deploying high altitude wind power as a resource in Northern Ireland and identifies the optimal locations through considering wind data and geographical constraints. The key findings show that the total viable area over Northern Ireland for high altitude wind harnessing devices is 5109.6 km2, with an average wind power density of 1,998 W/m2 over a 20-year span, at a fixed altitude of 3,000 m. An initial budget for a 2MW pumping kite device indicated a total cost £1,751,402 thus proving to be economically viable with other conventional wind-harnessing devices.

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Organic-inorganic nanocomposites combine unique properties of both the constituents in one material. Among this group of materials, clay based as well as ZnO, TiO2 nanocomposites have been found to have diverse applications. Optoelectronic devices require polymerinorganic systems to meet certain desired properties. Dielectric properties of conventional polymers like poly(ethylene-co-vinyl acetate) (EVA) and polystyrene (PS) may also be tailor tuned with the incorporation of inorganic fillers in very small amounts. Electrical conductivity and surface resistivity of polymer matrices are found to improve with inorganic nanofillers. II-VI semiconductors and their nano materials have attracted material scientists because of their unique optical properties of photoluminescence, UV photodetection and light induced conductivity. Cadmium selenide (CdSe), zinc selenide (ZnSe) and zinc oxide (ZnO) are some of the most promising members of the IIVI semiconductor family, used in light-emitting diodes, nanosensors, non-linear optical (NLO) absorption etc. EVA and PS materials were selected as the matrices in the present study because they are commercially used polymers and have not been the subject of research for opto-electronic properties with semiconductor nanomaterials

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Les convertisseurs de longueur d’onde sont essentiels pour la réalisation de réseaux de communications optiques à routage en longueur d’onde. Dans la littérature, les convertisseurs de longueur d’onde basés sur le mélange à quatre ondes dans les amplificateurs optiques à semi-conducteur constituent une solution extrêmement intéressante, et ce, en raison de leurs nombreuses caractéristiques nécessaires à l’implémentation de tels réseaux de communications. Avec l’émergence des systèmes commerciaux de détection cohérente, ainsi qu’avec les récentes avancées dans le domaine du traitement de signal numérique, il est impératif d’évaluer la performance des convertisseurs de longueur d’onde, et ce, dans le contexte des formats de modulation avancés. Les objectifs de cette thèse sont : 1) d’étudier la faisabilité des convertisseurs de longueur d’onde basés sur le mélange à quatre ondes dans les amplificateurs optiques à semi-conducteur pour les formats de modulation avancés et 2) de proposer une technique basée sur le traitement de signal numérique afin d’améliorer leur performance. En premier lieu, une étude expérimentale de la conversion de longueur d’onde de formats de modulation d’amplitude en quadrature (quadrature amplitude modulation - QAM) est réalisée. En particulier, la conversion de longueur d’onde de signaux 16-QAM à 16 Gbaud et 64-QAM à 5 Gbaud dans un amplificateur optique à semi-conducteur commercial est réalisée sur toute la bande C. Les résultats démontrent qu’en raison des distorsions non-linéaires induites sur le signal converti, le point d’opération optimal du convertisseur de longueur d’onde est différent de celui obtenu lors de la conversion de longueur d’onde de formats de modulation en intensité. En effet, dans le contexte des formats de modulation avancés, c’est le compromis entre la puissance du signal converti et les non-linéarités induites qui détermine le point d’opération optimal du convertisseur de longueur d’onde. Les récepteurs cohérents permettent l’utilisation de techniques de traitement de signal numérique afin de compenser la détérioration du signal transmis suite à sa détection. Afin de mettre à profit les nouvelles possibilités offertes par le traitement de signal numérique, une technique numérique de post-compensation des distorsions induites sur le signal converti, basée sur une analyse petit-signal des équations gouvernant la dynamique du gain à l’intérieur des amplificateurs optiques à semi-conducteur, est développée. L’efficacité de cette technique est démontrée à l’aide de simulations numériques et de mesures expérimentales de conversion de longueur d’onde de signaux 16-QAM à 10 Gbaud et 64-QAM à 5 Gbaud. Cette méthode permet d’améliorer de façon significative les performances du convertisseur de longueur d’onde, et ce, principalement pour les formats de modulation avancés d’ordre supérieur tel que 64-QAM. Finalement, une étude expérimentale exhaustive de la technique de post-compensation des distorsions induites sur le signal converti est effectuée pour des signaux 64-QAM. Les résultats démontrent que, même en présence d’un signal à bruité à l’entrée du convertisseur de longueur d’onde, la technique proposée améliore toujours la qualité du signal reçu. De plus, une étude du point d’opération optimal du convertisseur de longueur d’onde est effectuée et démontre que celui-ci varie en fonction des pertes optiques suivant la conversion de longueur d’onde. Dans un réseau de communication optique à routage en longueur d’onde, le signal est susceptible de passer par plusieurs étages de conversion de longueur d’onde. Pour cette raison, l’efficacité de la technique de post-compensation est démontrée, et ce pour la première fois dans la littérature, pour deux étages successifs de conversion de longueur d’onde de signaux 64-QAM à 5 Gbaud. Les résultats de cette thèse montrent que les convertisseurs de longueur d’ondes basés sur le mélange à quatre ondes dans les amplificateurs optiques à semi-conducteur, utilisés en conjonction avec des techniques de traitement de signal numérique, constituent une technologie extrêmement prometteuse pour les réseaux de communications optiques modernes à routage en longueur d’onde.

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Cognitive radio (CR) is fast emerging as a promising technology that can meet the machine-to machine (M2M) communication requirements for spectrum utilization and power control for large number of machines/devices expected to be connected to the Internet-of Things (IoT). Power control in CR as a secondary user can been modelled as a non-cooperative game cost function to quantify and reduce its effects of interference while occupying the same spectrum as primary user without adversely affecting the required quality of service (QoS) in the network. In this paper a power loss exponent that factors in diverse operating environments for IoT is employed in the non-cooperative game cost function to quantify the required power of transmission in the network. The approach would enable various CRs to transmit with lesser power thereby saving battery consumption or increasing the number of secondary users thereby optimizing the network resources efficiently.

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The semiconductor nanowire has been widely studied over the past decade and identified as a promising nanotechnology building block with application in photonics and electronics. The flexible bottom-up approach to nanowire growth allows for straightforward fabrication of complex 1D nanostructures with interesting optical, electrical, and mechanical properties. III-V nanowires in particular are useful because of their direct bandgap, high carrier mobility, and ability to form heterojunctions and have been used to make devices such as light-emitting diodes, lasers, and field-effect transistors. However, crystal defects are widely reported for III-V nanowires when grown in the common out-of-plane <111>B direction. Furthermore, commercialization of nanowires has been limited by the difficulty of assembling nanowires with predetermined position and alignment on a wafer-scale. In this thesis, planar III-V nanowires are introduced as a low-defect and integratable nanotechnology building block grown with metalorganic chemical vapor deposition. Planar GaAs nanowires grown with gold seed particles self-align along the <110> direction on the (001) GaAs substrate. Transmission electron microscopy reveals that planar GaAs nanowires are nearly free of crystal defects and grow laterally and epitaxially on the substrate surface. The nanowire morphology is shown to be primarily controlled through growth temperature and an ideal growth window of 470 +\- 10 °C is identified for planar GaAs nanowires. Extension of the planar growth mode to other materials is demonstrated through growth of planar InAs nanowires. Using a sacrificial layer, the transfer of planar GaAs nanowires onto silicon substrates with control over the alignment and position is presented. A metal-semiconductor field-effect transistor fabricated with a planar GaAs nanowire shows bulk-like low-field electron transport characteristics with high mobility. The aligned planar geometry and excellent material quality of planar III-V nanowires may lead to highly integrated III-V nanophotonics and nanoelectronics.

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In order to power our planet for the next century, clean energy technologies need to be developed and deployed. Photovoltaic solar cells, which convert sunlight into electricity, are a clear option; however, they currently supply 0.1% of the US electricity due to the relatively high cost per Watt of generation. Thus, our goal is to create more power from a photovoltaic device, while simultaneously reducing its price. To accomplish this goal, we are creating new high efficiency anti-reflection coatings that allow more of the incident sunlight to be converted to electricity, using simple and inexpensive coating techniques that enable reduced manufacturing costs. Traditional anti-reflection coatings (consisting of thin layers of non-absorbing materials) rely on the destructive interference of the reflected light, causing more light to enter the device and subsequently get absorbed. While these coatings are used on nearly all commercial cells, they are wavelength dependent and are deposited using expensive processes that require elevated temperatures, which increase production cost and can be detrimental to some temperature sensitive solar cell materials. We are developing two new classes of anti-reflection coatings (ARCs) based on textured dielectric materials: (i) a transparent, flexible paper technology that relies on optical scattering and reduced refractive index contrast between the air and semiconductor and (ii) silicon dioxide (SiO2) nanosphere arrays that rely on collective optical resonances. Both techniques improve solar cell absorption and ultimately yield high efficiency, low cost devices. For the transparent paper-based ARCs, we have recently shown that they improve solar cell efficiencies for all angles of incident illumination reducing the need for costly tracking of the sun’s position. For a GaAs solar cell, we achieved a 24% improvement in the power conversion efficiency using this simple coating. Because the transparent paper is made from an earth abundant material (wood pulp) using an easy, inexpensive and scalable process, this type of ARC is an excellent candidate for future solar technologies. The coatings based on arrays of dielectric nanospheres also show excellent potential for inexpensive, high efficiency solar cells. The fabrication process is based on a Meyer rod rolling technique, which can be performed at room-temperature and applied to mass production, yielding a scalable and inexpensive manufacturing process. The deposited monolayer of SiO2 nanospheres, having a diameter of 500 nm on a bare Si wafer, leads to a significant increase in light absorption and a higher expected current density based on initial simulations, on the order of 15-20%. With application on a Si solar cell containing a traditional anti-reflection coating (Si3N4 thin-film), an additional increase in the spectral current density is observed, 5% beyond what a typical commercial device would achieve. Due to the coupling between the spheres originated from Whispering Gallery Modes (WGMs) inside each nanosphere, the incident light is strongly coupled into the high-index absorbing material, leading to increased light absorption. Furthermore, the SiO2 nanospheres scatter and diffract light in such a way that both the optical and electrical properties of the device have little dependence on incident angle, eliminating the need for solar tracking. Because the layer can be made with an easy, inexpensive, and scalable process, this anti-reflection coating is also an excellent candidate for replacing conventional technologies relying on complicated and expensive processes.

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Current space exploration has transpired through the use of chemical rockets, and they have served us well, but they have their limitations. Exploration of the outer solar system, Jupiter and beyond will most likely require a new generation of propulsion system. One potential technology class to provide spacecraft propulsion and power systems involve thermonuclear fusion plasma systems. In this class it is well accepted that d-He3 fusion is the most promising of the fuel candidates for spacecraft applications as the 14.7 MeV protons carry up to 80% of the total fusion power while ‘s have energies less than 4 MeV. The other minor fusion products from secondary d-d reactions consisting of 3He, n, p, and 3H also have energies less than 4 MeV. Furthermore there are two main fusion subsets namely, Magnetic Confinement Fusion devices and Inertial Electrostatic Confinement (or IEC) Fusion devices. Magnetic Confinement Fusion devices are characterized by complex geometries and prohibitive structural mass compromising spacecraft use at this stage of exploration. While generating energy from a lightweight and reliable fusion source is important, another critical issue is harnessing this energy into usable power and/or propulsion. IEC fusion is a method of fusion plasma confinement that uses a series of biased electrodes that accelerate a uniform spherical beam of ions into a hollow cathode typically comprised of a gridded structure with high transparency. The inertia of the imploding ion beam compresses the ions at the center of the cathode increasing the density to the point where fusion occurs. Since the velocity distributions of fusion particles in an IEC are essentially isotropic and carry no net momentum, a means of redirecting the velocity of the particles is necessary to efficiently extract energy and provide power or create thrust. There are classes of advanced fuel fusion reactions where direct-energy conversion based on electrostatically-biased collector plates is impossible due to potential limits, material structure limitations, and IEC geometry. Thermal conversion systems are also inefficient for this application. A method of converting the isotropic IEC into a collimated flow of fusion products solves these issues and allows direct energy conversion. An efficient traveling wave direct energy converter has been proposed and studied by Momota , Shu and further studied by evaluated with numerical simulations by Ishikawa and others. One of the conventional methods of collimating charged particles is to surround the particle source with an applied magnetic channel. Charged particles are trapped and move along the lines of flux. By introducing expanding lines of force gradually along the magnetic channel, the velocity component perpendicular to the lines of force is transferred to the parallel one. However, efficient operation of the IEC requires a null magnetic field at the core of the device. In order to achieve this, Momota and Miley have proposed a pair of magnetic coils anti-parallel to the magnetic channel creating a null hexapole magnetic field region necessary for the IEC fusion core. Numerically, collimation of 300 eV electrons without a stabilization coil was demonstrated to approach 95% at a profile corresponding to Vsolenoid = 20.0V, Ifloating = 2.78A, Isolenoid = 4.05A while collimation of electrons with stabilization coil present was demonstrated to reach 69% at a profile corresponding to Vsolenoid = 7.0V, Istab = 1.1A, Ifloating = 1.1A, Isolenoid = 1.45A. Experimentally, collimation of electrons with stabilization coil present was demonstrated experimentally to be 35% at 100 eV and reach a peak of 39.6% at 50eV with a profile corresponding to Vsolenoid = 7.0V, Istab = 1.1A, Ifloating = 1.1A, Isolenoid = 1.45A and collimation of 300 eV electrons without a stabilization coil was demonstrated to approach 49% at a profile corresponding to Vsolenoid = 20.0V, Ifloating = 2.78A, Isolenoid = 4.05A 6.4% of the 300eV electrons’ initial velocity is directed to the collector plates. The remaining electrons are trapped by the collimator’s magnetic field. These particles oscillate around the null field region several hundred times and eventually escape to the collector plates. At a solenoid voltage profile of 7 Volts, 100 eV electrons are collimated with wall and perpendicular component losses of 31%. Increasing the electron energy beyond 100 eV increases the wall losses by 25% at 300 eV. Ultimately it was determined that a field strength deriving from 9.5 MAT/m would be required to collimate 14.7 MeV fusion protons from d-3He fueled IEC fusion core. The concept of the proton collimator has been proven to be effective to transform an isotropic source into a collimated flow of particles ripe for direct energy conversion.

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Conventional Si complementary-metal-oxide-semiconductor (CMOS) scaling is fast approaching its limits. The extension of the logic device roadmap for future enhancements in transistor performance requires non-Si materials and new device architectures. III-V materials, due to their superior electron transport properties, are well poised to replace Si as the channel material beyond the 10nm technology node to mitigate the performance loss of Si transistors from further reductions in supply voltage to minimise power dissipation in logic circuits. However several key challenges, including a high quality dielectric/III-V gate stack, a low-resistance source/drain (S/D) technology, heterointegration onto a Si platform and a viable III-V p-metal-oxide-semiconductor field-effect-transistor (MOSFET), need to be addressed before III-Vs can be employed in CMOS. This Thesis specifically addressed the development and demonstration of planar III-V p-MOSFETs, to complement the n-MOSFET, thereby enabling an all III-V CMOS technology to be realised. This work explored the application of InGaAs and InGaSb material systems as the channel, in conjunction with Al2O3/metal gate stacks, for p-MOSFET development based on the buried-channel flatband device architecture. The body of work undertaken comprised material development, process module development and integration into a robust fabrication flow for the demonstration of p-channel devices. The parameter space in the design of the device layer structure, based around the III-V channel/barrier material options of Inx≥0.53Ga1-xAs/In0.52Al0.48As and Inx≥0.1Ga1-xSb/AlSb, was systematically examined to improve hole channel transport. A mobility of 433 cm2/Vs, the highest room temperature hole mobility of any InGaAs quantum-well channel reported to date, was obtained for the In0.85Ga0.15As (2.1% strain) structure. S/D ohmic contacts were developed based on thermally annealed Au/Zn/Au metallisation and validated using transmission line model test structures. The effects of metallisation thickness, diffusion barriers and de-oxidation conditions were examined. Contacts to InGaSb-channel structures were found to be sensitive to de-oxidation conditions. A fabrication process, based on a lithographically-aligned double ohmic patterning approach, was realised for deep submicron gate-to-source/drain gap (Lside) scaling to minimise the access resistance, thereby mitigating the effects of parasitic S/D series resistance on transistor performance. The developed process yielded gaps as small as 20nm. For high-k integration on GaSb, ex-situ ammonium sulphide ((NH4)2S) treatments, in the range 1%-22%, for 10min at 295K were systematically explored for improving the electrical properties of the Al2O3/GaSb interface. Electrical and physical characterisation indicated the 1% treatment to be most effective with interface trap densities in the range of 4 - 10×1012cm-2eV-1 in the lower half of the bandgap. An extended study, comprising additional immersion times at each sulphide concentration, was further undertaken to determine the surface roughness and the etching nature of the treatments on GaSb. A number of p-MOSFETs based on III-V-channels with the most promising hole transport and integration of the developed process modules were successfully demonstrated in this work. Although the non-inverted InGaAs-channel devices showed good current modulation and switch-off characteristics, several aspects of performance were non-ideal; depletion-mode operation, modest drive current (Id,sat=1.14mA/mm), double peaked transconductance (gm=1.06mS/mm), high subthreshold swing (SS=301mV/dec) and high on-resistance (Ron=845kΩ.μm). Despite demonstrating substantial improvement in the on-state metrics of Id,sat (11×), gm (5.5×) and Ron (5.6×), inverted devices did not switch-off. Scaling gate-to-source/drain gap (Lside) from 1μm down to 70nm improved Id,sat (72.4mA/mm) by a factor of 3.6 and gm (25.8mS/mm) by a factor of 4.1 in inverted InGaAs-channel devices. Well-controlled current modulation and good saturation behaviour was observed for InGaSb-channel devices. In the on-state In0.3Ga0.7Sb-channel (Id,sat=49.4mA/mm, gm=12.3mS/mm, Ron=31.7kΩ.μm) and In0.4Ga0.6Sb-channel (Id,sat=38mA/mm, gm=11.9mS/mm, Ron=73.5kΩ.μm) devices outperformed the InGaAs-channel devices. However the devices could not be switched off. These findings indicate that III-V p-MOSFETs based on InGaSb as opposed to InGaAs channels are more suited as the p-channel option for post-Si CMOS.

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As the semiconductor industry struggles to maintain its momentum down the path following the Moore's Law, three dimensional integrated circuit (3D IC) technology has emerged as a promising solution to achieve higher integration density, better performance, and lower power consumption. However, despite its significant improvement in electrical performance, 3D IC presents several serious physical design challenges. In this dissertation, we investigate physical design methodologies for 3D ICs with primary focus on two areas: low power 3D clock tree design, and reliability degradation modeling and management. Clock trees are essential parts for digital system which dissipate a large amount of power due to high capacitive loads. The majority of existing 3D clock tree designs focus on minimizing the total wire length, which produces sub-optimal results for power optimization. In this dissertation, we formulate a 3D clock tree design flow which directly optimizes for clock power. Besides, we also investigate the design methodology for clock gating a 3D clock tree, which uses shutdown gates to selectively turn off unnecessary clock activities. Different from the common assumption in 2D ICs that shutdown gates are cheap thus can be applied at every clock node, shutdown gates in 3D ICs introduce additional control TSVs, which compete with clock TSVs for placement resources. We explore the design methodologies to produce the optimal allocation and placement for clock and control TSVs so that the clock power is minimized. We show that the proposed synthesis flow saves significant clock power while accounting for available TSV placement area. Vertical integration also brings new reliability challenges including TSV's electromigration (EM) and several other reliability loss mechanisms caused by TSV-induced stress. These reliability loss models involve complex inter-dependencies between electrical and thermal conditions, which have not been investigated in the past. In this dissertation we set up an electrical/thermal/reliability co-simulation framework to capture the transient of reliability loss in 3D ICs. We further derive and validate an analytical reliability objective function that can be integrated into the 3D placement design flow. The reliability aware placement scheme enables co-design and co-optimization of both the electrical and reliability property, thus improves both the circuit's performance and its lifetime. Our electrical/reliability co-design scheme avoids unnecessary design cycles or application of ad-hoc fixes that lead to sub-optimal performance. Vertical integration also enables stacking DRAM on top of CPU, providing high bandwidth and short latency. However, non-uniform voltage fluctuation and local thermal hotspot in CPU layers are coupled into DRAM layers, causing a non-uniform bit-cell leakage (thereby bit flip) distribution. We propose a performance-power-resilience simulation framework to capture DRAM soft error in 3D multi-core CPU systems. In addition, a dynamic resilience management (DRM) scheme is investigated, which adaptively tunes CPU's operating points to adjust DRAM's voltage noise and thermal condition during runtime. The DRM uses dynamic frequency scaling to achieve a resilience borrow-in strategy, which effectively enhances DRAM's resilience without sacrificing performance. The proposed physical design methodologies should act as important building blocks for 3D ICs and push 3D ICs toward mainstream acceptance in the near future.

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Regulated Transformer Rectifier Units contain several power electronic boards to facilitate AC to DC power conversion. As these units become smaller, the number of devices on each board increases while their distance from each other decreases, making active cooling essential to maintaining reliable operation. Although it is widely accepted that liquid is a far superior heat transfer medium to air, the latter is still capable of yielding low device operating temperatures with proper heat sink and airflow design. The purpose of this study is to describe the models and methods used to design and build the thermal management system for one of the power electronic boards in a compact, high power regulated transformer rectifier unit. Maximum device temperature, available pressure drop and manufacturability were assessed when selecting the final design for testing. Once constructed, the thermal management system’s performance was experimentally verified at three different power levels.