975 resultados para smart grids


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A superconducting fault current limiter (SFCL) in series with a downstream circuit breaker could provide a viable solution to controlling fault current levels in electrical distribution networks. In order to integrate the SFCL into power grids, we need a way to conveniently predict the performance of the SFCL in a given scenario. In this paper, short circuit analysis based on the electromagnetic transient program was used to investigate the operational behavior of the SFCL installed in an electrical distribution grid. System studies show that the SFCL can not only limit the fault current to an acceptable value, but also mitigate the voltage sag. The transient recovery voltage (TRV) could be remarkably damped and improved by the presence of the SFCL after the circuit breaker is opened to clear the fault. © 2007 British Crown Copyright.

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Firms and other organizations use Technology Roadmapping (TRM) extensively as a framework for supporting research and development of future technologies and products that could sustain a competitive advantage. While the importance of technology strategy has received more attention in recent years, few research studies have examined how roadmapping processes are used to explore the potential convergence of products and services that may be developed in the future. The aim of this paper is to introduce an integrated roadmapping process for services, devices and technologies capable of implementing a smart city development R&D project in Korea. The paper applies a QFD (Quality Function Deployment) method to establish interconnections between services and devices, and between devices and technologies. The method is illustrated by a detailed case study, which shows how different types of roadmap can be coordinated with each other to produce a clear representation of the technological changes and uncertainties associated with the strategic planning of complex innovations. © 2012 Elsevier Inc.

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Ideally, one would like to perform image search using an intuitive and friendly approach. Many existing image search engines, however, present users with sets of images arranged in some default order on the screen, typically the relevance to a query, only. While this certainly has its advantages, arguably, a more flexible and intuitive way would be to sort images into arbitrary structures such as grids, hierarchies, or spheres so that images that are visually or semantically alike are placed together. This paper focuses on designing such a navigation system for image browsers. This is a challenging task because arbitrary layout structure makes it difficult - if not impossible - to compute cross-similarities between images and structure coordinates, the main ingredient of traditional layouting approaches. For this reason, we resort to a recently developed machine learning technique: kernelized sorting. It is a general technique for matching pairs of objects from different domains without requiring cross-domain similarity measures and hence elegantly allows sorting images into arbitrary structures. Moreover, we extend it so that some images can be preselected for instance forming the tip of the hierarchy allowing to subsequently navigate through the search results in the lower levels in an intuitive way. Copyright 2010 ACM.

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This paper looks at active control of the normal shock wave/turbulent boundary layer interaction (SBLI) using smart flap actuators. The actuators are manufactured by bonding piezoelectric material to an inert substrate to control the bleed/suction rate through a plenum chamber. The cavity provides communication of signals across the shock, allowing rapid thickening of the boundary layer approaching the shock, which splits into a series of weaker shocks forming a lambda shock foot, reducing wave drag. Active control allows optimum control of the interaction, as it would be capable of positioning the control region around the original shock position and control the rate of mass transfer. © 2004 by the American Institute of Aeronautics and Astronautics, Inc. All rights reserved.

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This paper proposes smart universal multiple-valued (MV) logic gates by transferring single electrons (SEs). The logic gates are based on MOSFET based SE turnstiles that can accurately transfer SEs with high speed at high temperature. The number of electrons transferred per cycle by the SE turnstile is a quantized function of its gate voltage, and this characteristic is fully exploited to compactly finish MV logic operations. First, we build arbitrary MV literal gates by using pairs of SE turnstiles. Then, we propose universal MV logic-to-value conversion gates and MV analog-digital conversion circuits. We propose a SPICE model to describe the behavior of the MOSFET based SE turnstile. We simulate the performances of the proposed gates. The MV logic gates have small number of transistors and low power dissipations.

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Hybrid integration of GaAs/AlGaAs multiple quantum well self electro-optic effect device (SEED) arrays are demonstrated flip-chip bonded directly onto 1 mu m silicon CMOS circuits. The GaAs/AlGaAs MQW devices are designed for 850 nm operation. Some devices are used as input light detectors and others serve as output light modulators. The measurement results under applied biases show good optoelectronic characteristics of elements in SEED arrays. Nearly the same reflection spectrum is obtained for the different devices at an array and the contrast ratio is more than 1.2:1 after flip-chip bonding and packaging. The transimpedance receiver-transmitter circuit can be operated at a frequency of 300 MHz.

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This paper proposes a smart frequency presetting technique for fast lock-in LC-PLL frequency synthesizer. The technique accurately presets the frequency of VCO with small initial frequency error and greatly reduces the lock-in time. It can automatically compensate preset frequency variation with process and temperature. A 2.4GHz synthesizer with 1MHz reference input was implemented in 0.35 mu m CMOS process. The chip core area is 0.4mm(2). Output frequency of VCO ranges from 2390 to 2600MHz. The measured results show that the typical lock-in time is 3 mu s. The phase noise is -112dBc/Hz at 600KHz offset from center frequency. The test chip consumes current of 22mA that includes the consumption of the I/O buffers.

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Password authentication has been adopted as one of the most commonly used solutions in network environment to protect resources from unauthorized access. Recently, Lee–Kim–Yoo [S.W. Lee, H.S. Kim, K.Y. Yoo, Improvement of Chien et al.'s remote user authentication scheme using smart cards, Computer Standards & Interfaces 27 (2) (2005) 181–183] and Lee-Chiu [N.Y. Lee, Y.C. Chiu, Improved remote authentication scheme with smart card, Computer Standards & Interfaces 27 (2) (2005) 177–180] respectively proposed a smart card based password authentication scheme. We show that these two schemes are both subject to forgery attacks provided that the information stored in the smart card is disclosed by the adversary. We also propose an improved scheme with formal security proof.

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于2010-11-23批量导入

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The investigations on GaAs/AlGaAs multiple quantum well self electro-optic effect device (SEED) arrays for optoelectronic smart pixels are reported. The hybrid integration of GaAs/AlGaAs multiple quantum well devices flip-chip bonding directly over 1 mu m silicon CMOS circuits are demonstrated. The GaAs/AlGaAs multiple quantum well devices are designed for 850nm operation. The measurement results under applied biases show the good optoelectronic characteristics of elements in SEED arrays. The 4x4 optoelectronic crossbar structure consisting of hybrid CMOS-SEED smart pixels have been designed, which could be potentially used in optical interconnects for multiple processors.

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Hybrid integration of GaAs/AlGaAs multiple quantum well self electro-optic effect device (SEED) arrays are demonstrated flip-chip bonded directly onto 1 mu m silicon CMOS circuits. The GaAs/AlGaAs MQW devices are designed for 850 nm operation. Some devices are used as input light detectors and others serve as output light modulators. The measurement results under applied biases show good optoelectronic characteristics of elements in SEED arrays. Nearly the same reflection spectrum is obtained for the different devices at an array and the contrast ratio is more than 1.2:1 after flip-chip bonding and packaging. The transimpedance receiver-transmitter circuit can be operated at a frequency of 300 MHz.

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We have demonstrated a smart polymeric transducer and aptamer/intercalating dye system that allows the label-free detection of protein with high sensitivity and selectivity.

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A smart biodegradable cationic polymer (CBA-PEI) based on the disulfide bond-containing cross-linker cystamine bisacrylamide (CBA) and low molecular weight branched polyethylenimine (1800-Da, PEI1800) was successfully synthesized by Michael addition reaction in our recent study. Furthermore, a series of copolymers (CBA-PEI-PEG) with different PEGylation degree were obtained by the mPEG-SPA (5000-Da) reacting with CBA-PEI at various weight ratios directly. The molecular structures of the resulting polymers CBA-PEI and CBA-PEI-PEG were evaluated by nuclear magnetic resonance spectroscopy (H-1-NMR) and capillary viscosity measurements, all of which had successfully verified formation of the copolymers. The polymer/DNA complexes based on CBA-PEI and CBA-PEI-PEG were measured by dynamic light scattering and gel retardation assay. The results showed that the particle size and zeta potential of complexes were reduced with increasing amount of PEG grafting, even no particle formation. The particle size of CBA-PEI/DNA complexes was in range of 103.1 to 129.1 nm, and the zeta potential was in range of 14.2 to 24.3 mV above the 2:1 weight ratio. In the same measure condition, the particle size of CBA-PEI-PEG complexes was reduced to a range of 32.2 to 55 nm, and the zeta potential was in range of 9.3 to 13.8 mV at the 2:1 weight ratio.