Electrical and optical interconnects for high-performance computing

Technology scaling has enabled drastic growth in the computational and storage capacity of integrated circuits (ICs). This constant growth drives an increasing demand for high-bandwidth communication between and within ICs. In this dissertation we focus on low-power solutions that address this demand. We divide communication links into three subcategories depending on the communication distance. Each category has a different set of challenges and requirements and is affected by CMOS technology scaling in a different manner. We start with short-range chip-to-chip links for board-level communication. Next we will discuss board-to-board links, which demand a longer communication range. Finally on-chip links with communication ranges of a few millimeters are discussed.

Electrical signaling is a natural choice for chip-to-chip communication due to efficient integration and low cost. IO data rates have increased to the point where electrical signaling is now limited by the channel bandwidth. In order to achieve multi-Gb/s data rates, complex designs that equalize the channel are necessary. In addition, a high level of parallelism is central to sustaining bandwidth growth. Decision feedback equalization (DFE) is one of the most commonly employed techniques to overcome the limited bandwidth problem of the electrical channels. A linear and low-power summer is the central block of a DFE. Conventional approaches employ current-mode techniques to implement the summer, which require high power consumption. In order to achieve low-power operation we propose performing the summation in the charge domain. This approach enables a low-power and compact realization of the DFE as well as crosstalk cancellation. A prototype receiver was fabricated in 45nm SOI CMOS to validate the functionality of the proposed technique and was tested over channels with different levels of loss and coupling. Measurement results show that the receiver can equalize channels with maximum 21dB loss while consuming about 7.5mW from a 1.2V supply. We also introduce a compact, low-power transmitter employing passive equalization. The efficacy of the proposed technique is demonstrated through implementation of a prototype in 65nm CMOS. The design achieves up to 20Gb/s data rate while consuming less than 10mW.

An alternative to electrical signaling is to employ optical signaling for chip-to-chip interconnections, which offers low channel loss and cross-talk while providing high communication bandwidth. In this work we demonstrate the possibility of building compact and low-power optical receivers. A novel RC front-end is proposed that combines dynamic offset modulation and double-sampling techniques to eliminate the need for a short time constant at the input of the receiver. Unlike conventional designs, this receiver does not require a high-gain stage that runs at the data rate, making it suitable for low-power implementations. In addition, it allows time-division multiplexing to support very high data rates. A prototype was implemented in 65nm CMOS and achieved up to 24Gb/s with less than 0.4pJ/b power efficiency per channel. As the proposed design mainly employs digital blocks, it benefits greatly from technology scaling in terms of power and area saving.

As the technology scales, the number of transistors on the chip grows. This necessitates a corresponding increase in the bandwidth of the on-chip wires. In this dissertation, we take a close look at wire scaling and investigate its effect on wire performance metrics. We explore a novel on-chip communication link based on a double-sampling architecture and dynamic offset modulation technique that enables low power consumption and high data rates while achieving high bandwidth density in 28nm CMOS technology. The functionality of the link is demonstrated using different length minimum-pitch on-chip wires. Measurement results show that the link achieves up to 20Gb/s of data rate (12.5Gb/s/$\mu$m) with better than 136fJ/b of power efficiency.

Broadband optical amplification near 1300 nm in bismuth-doped germanate glass

In this paper, we present the broadband optical amplification in bismuth-doped germanate glass, at the second telecommunication window when excited with 808 nm and 980 nm laser diodes, respectively. The amplification range is from 1272 nm to 1348 nm wavelength, which is within the O-band of silica fiber communication. This bismuth-doped glass can be used as ultra broadband amplification material for wavelength-division-multiplexing (WDM) at the second telecommunication window.

High Er3+ concentration low refractive index fluorophosphate glass for evanescent wave optical amplifiers

This is about the first reported laser glass with very low no, high Er3+ concentration and no quenching. In this work, a series of high Er3+ concentration (10.6-12.2 x 10(20) ions/cm(3)), low refractive index (n(1550) < 1.47) and relatively high fluorescence lifetime (6.8-12.6 ms) fluorophosphate glasses were made. A cw-pumping evanescent wave optical amplifier experiment was performed with it, and a relative gain of around 2dB at 1550 nm wavelength was achieved while the noise level was almost unchanged. To our knowledge, this is the first successful relative gain in evanescent wave optical amplifiers (EWOA) demonstrated with cw pumping. It is a valuable study of specially designed fluorophosphate glass suitable for EWOA communication experiment. (C) 2008 Elsevier B.V. All rights reserved.

Experimental demonstration of femtosecond switching of a fully packaged all-optical switch

We experimentally demonstrate femtosecond switching of a fully packaged hybrid-integrated Mach-Zehnder switch. A record switching window of 620fs at fult-width-half-maximum is achieved. © 2004 Optical Society of America.