Computational engineering design for micro-scale combustion devices: A thermally improved configuration

A multi-objective design optimisation study has been carried out with the objectives to improve the overall efficiency of the device and to reduce the fuel consumption for the proposed micro-scale combustor design configuration. In a previous study we identified the topology of the combustion chamber that produced improved behaviour of the device in terms of the above design criteria. We now extend our design approach, and we propose a new configuration by the addition of a micro-cooling channel that will improve the thermal behaviour of the design as previously suggested in literature. Our initial numerical results revealed an improvement of 2.6% in the combustion efficiency when we applied the micro-cooling channel to an optimum design configuration we identified from our earlier multi-objective optimisation study, and under the same operating conditions. The computational modelling of the combustion process is implemented in the commercial computational fluid dynamics package ANSYS-CFX using Finite Rate Chemistry and a single step hydrogen-air reaction. With this model we try to balance good accuracy of the combustion solution and at the same time practicality within the context of an optimisation process. The whole design system comprises also the ANSYS-ICEM CFD package for the automatic geometry and mesh generation and the Multi-Objective Tabu Search algorithm for the design space exploration. We model the design problem with 5 geometrical parameters and 3 operational parameters subject to 5 design constraints that secure practicality and feasibility of the new optimum design configurations. The final results demonstrate the reliability and efficiency of the developed computational design system and most importantly we assess the practicality and manufacturability of the revealed optimum design configurations of micro-combustor devices. Copyright © 2013 by ASME.

Engineering design of a bioprocess for the production of natural red colourants by submerged fermentation of the thermophilic fungus Penicillium purpurogenum GH2

The development of a new bioprocess requires several steps from initial concept to a practical and feasible application. Industrial applications of fungal pigments will depend on: (i) safety of consumption, (ii) stability of the pigments to the food processing conditions required by the products where they will be incorporated and (iii) high production yields so that production costs are reasonable. Of these requirements the first involves the highest research costs and the practical application of this type of processes may face several hurdles until final regulatory approval as a new food ingredient. Therefore, before going through expensive research to have them accepted as new products, the process potential should be assessed early on, and this brings forward pigment stability studies and process optimisation goals. Only ingredients that are usable in economically feasible conditions should progress to regulatory approval. This thesis covers these two aspects, stability and process optimisation, for a potential new ingredient; natural red colour, produced by microbial fermentation. The main goal was to design, optimise and scale-up the production process of red pigments by Penicillium purpurogenum GH2. The approach followed to reach this objective was first to establish that pigments produced by Penicillium purpurogenum GH2 are sufficiently stable under different processing conditions (thermal and non-thermal) that can be found in food and textile industries. Once defined that pigments were stable enough, the work progressed towards process optimisation, aiming for the highest productivity using submerged fermentation as production culture. Optimum production conditions defined at flask scale were used to scale up the pigment production process to a pilot reactor scale. Finally, the potential applications of the pigments were assessed. Based on this sequence of specific targets, the thesis was structured in six parts, containing a total of nine chapters. Engineering design of a bioprocess for the production of natural red colourants by submerged fermentation of the thermophilic fungus Penicillium purpurogenum GH2.

Fire safety engineering and ship design using advanced fire and evacuation simulation

When designing a new passenger ship or modifying an existing design, how do we ensure that the proposed design and crew emergency procedures are safe from an evacuation resulting from fire or other incident? In the wake of major maritime disasters such as the Scandinavian Star, Herald of Free Enterprise, Estonia and in light of the growth in the number of high density, high-speed ferries and large capacity cruise ships, issues concerning the evacuation of passengers and crew at sea are receiving renewed interest. Fire and evacuation models with features such as the ability to realistically simulate the spread of heat and smoke and the human response to fire as well as the capability to model human performance in heeled orientations linked to a virtual reality environment that produces realistic visualisations of the modelled scenarios are now available and can be used to aid the engineer in assessing ship design and procedures. This paper describes the maritimeEXODUS ship evacuation and the SMARTFIRE fire simulation model and provides an example application demonstrating the use of the models in performing fire and evacuation analysis for a large passenger ship partially based on the requirements of MSC circular 1033

Engineering design knowledge management in de-centralised virtual enterprises

The problems of collaborative engineering design and knowledge management at the conceptual stage in a network of dissimilar enterprises was investigated. This issue in engineering design is a result of the supply chain and virtual enterprise (VE) oriented industry that demands faster time to market and accurate cost/manufacturing analysis from conception. The solution consisted of a de-centralised super-peer net architecture to establish and maintain communications between enterprises in a VE. In the solution outlined below, the enterprises are able to share knowledge in a common format and nomenclature via the building-block shareable super-ontology that can be tailored on a project by project basis, whilst maintaining the common nomenclature of the ‘super-ontology’ eliminating knowledge interpretation issues. The two-tier architecture layout of the solution glues together the peer-peer and super-ontologies to form a coherent system for both internal and virtual enterprise knowledge management and product development.

A framework to integrate design knowledge reuse and requirements management in engineering design

This paper presents a framework to integrate requirements management and design knowledge reuse. The research approach begins with a literature review in design reuse and requirements management to identify appropriate methods within each domain. A framework is proposed based on the identified requirements. The framework is then demonstrated using a case study example: vacuum pump design. Requirements are presented as a component of the integrated design knowledge framework. The proposed framework enables the application of requirements management as a dynamic process, including capture, analysis and recording of requirements. It takes account of the evolving requirements and the dynamic nature of the interaction between requirements and product structure through the various stages of product development.

6-T SRAM cell design with nanoscale double-gate SOI MOSFETs: impact of source/drain engineering and circuit topology

The impact of source/drain engineering on the performance of a six-transistor (6-T) static random access memory (SRAM) cell, based on 22 nm double-gate (DG) SOI MOSFETs, has been analyzed using mixed-mode simulation, for three different circuit topologies for low voltage operation. The trade-offs associated with the various conflicting requirements relating to read/write/standby operations have been evaluated comprehensively in terms of eight performance metrics, namely retention noise margin, static noise margin, static voltage/current noise margin, write-ability current, write trip voltage/current and leakage current. Optimal design parameters with gate-underlap architecture have been identified to enhance the overall SRAM performance, and the influence of parasitic source/drain resistance and supply voltage scaling has been investigated. A gate-underlap device designed with a spacer-to-straggle (s/sigma) ratio in the range 2-3 yields improved SRAM performance metrics, regardless of circuit topology. An optimal two word-line double-gate SOI 6-T SRAM cell design exhibits a high SNM similar to 162 mV, I-wr similar to 35 mu A and low I-leak similar to 70 pA at V-DD = 0.6 V, while maintaining SNM similar to 30% V-DD over the supply voltage (V-DD) range of 0.4-0.9 V.

Source/drain extension region engineering in nanoscale double gate SOI MOSFETs: Novel design methodology for low-voltage analog applications

The present paper proposes for the first time, a novel design methodology based on the optimization of source/drain extension (SDE) regions to significantly improve the trade-off between intrinsic voltage gain (A(vo)) and cut-off frequency (f(T)) in nanoscale double gate (DG) devices. Our results show that an optimally designed 25 nm gate length SDE region engineered DG MOSFET operating at drain current of 10 mu A/mu m, exhibits up to 65% improvement in intrinsic voltage gain and 85% in cut-off frequency over devices designed with abrupt SIDE regions. The influence of spacer width, lateral source/drain doping gradient and symmetric as well as asymmetrically designed SDE regions on key analog figures of merit (FOM) such as transconductance (g(m)), transconductance-to-current ratio (g(m)/I-ds), Early voltage (V-EA), output conductance (g(ds)) and gate capacitances are examined in detail. The present work provides new opportunities for realizing future low-voltage/low-power analog circuits with nanoscale SDE engineered DG MOSFETs. (C) 2007 Elsevier B.V. All rights reserved.

Engineering source/drain extension regions in nanoscale double gate (DG) SOI MOSFETs: Analytical model and design considerations

In this paper, we propose for the first time, an analytical model for short channel effects in nanoscale source/drain extension region engineered double gate (DG) SOI MOSFETs. The impact of (i) lateral source/drain doping gradient (d), (ii) spacer width (s), (iii) spacer to doping gradient ratio (s/d) and (iv) silicon film thickness (T-si), on short channel effects - threshold voltage (V-th) and subthreshold slope (S), on-current (I-on), off-current (I-on) and I-on/I-off is extensively analysed by using the analytical model and 2D device simulations. The results of the analytical model confirm well with simulated data over the entire range of spacer widths, doping gradients and effective channel lengths. Results show that lateral source/drain doping gradient along with spacer width can not only effectively control short channel effects, thus presenting low off-current, but can also be optimised to achieve high values of on-currents. The present work provides valuable design insights in the performance of nanoscale DG Sol devices with optimal source/drain engineering and serves as a tool to optimise important device and technological parameters for 65 nm technology node and below. (c) 2006 Elsevier Ltd. All rights reserved.