Improving TCP Performance on CSMA/CA Connections

In IP networks, most of packets, that have been dropped, are recovered after the expiration of retransmission timeouts. These can result in unnecessary retransmissions and needless reduction of congestion window. An inappropriate retransmission timeout has a huge impact on TCP performance. In this paper we have proved that CSMA/CA mechanism can cause TCP retransmissions due to CSMA/CA effects. For this we have observed three wireless connections that use CSMA/CA: with good link quality, poor link quality and in presence of cross traffic. The measurements have been performed using real devices. Through tracking of each transmitted packet it is possible to analyze the relation between one-way delay and packet loss probability and the cumulative distribution of distances between peaks of OWDs. The distribution of OWDs and the distances between peaks of OWDs are the most important parameters of tuning TCP retransmission timeout on CSMA/CA networks. A new perspective through investigating the dynamical relation between one-way delay and packet loss ratio depending on the link quality to enhance the TCP performance has been provided.

Parallel Architecture Prototype for 60 GHz High Data Rate Wireless Single Carrier Receiver

Nowadays a huge attention of the academia and research teams is attracted to the potential of the usage of the 60 GHz frequency band in the wireless communications. The use of the 60GHz frequency band offers great possibilities for wide variety of applications that are yet to be implemented. These applications also imply huge implementation challenges. Such example is building a high data rate transceiver which at the same time would have very low power consumption. In this paper we present a prototype of Single Carrier -SC transceiver system, illustrating a brief overview of the baseband design, emphasizing the most important decisions that need to be done. A brief overview of the possible approaches when implementing the equalizer, as the most complex module in the SC transceiver, is also presented. The main focus of this paper is to suggest a parallel architecture for the receiver in a Single Carrier communication system. This would provide higher data rates that the communication system canachieve, for a price of higher power consumption. The suggested architecture of such receiver is illustrated in this paper,giving the results of its implementation in comparison with its corresponding serial implementation.

A Model of Video Traffic Transmission in IP Networks

Telecommunications and network technology is now the driving force that ensures continued progress of world civilization. Design of new and expansion of existing network infrastructures requires improving the quality of service(QoS). Modeling probabilistic and time characteristics of telecommunication systems is an integral part of modern algorithms of administration of quality of service. At present, for the assessment of quality parameters except simulation models analytical models in the form of systems and queuing networks are widely used. Because of the limited mathematical tools of models of these classes the corresponding parameter estimation of parameters of quality of service are inadequate by definition. Especially concerning the models of telecommunication systems with packet transmission of multimedia real-time traffic.

Efficiency Comparison of DFT/IDFT Algorithms by Evaluating Diverse Hardware Implementations

In this paper we investigate various algorithms for performing Fast Fourier Transformation (FFT)/Inverse Fast Fourier Transformation (IFFT), and proper techniques for maximizing the FFT/IFFT execution speed, such as pipelining or parallel processing, and use of memory structures with pre-computed values (look up tables -LUT) or other dedicated hardware components (usually multipliers). Furthermore, we discuss the optimal hardware architectures that best apply to various FFT/IFFT algorithms, along with their abilities to exploit parallel processing with minimal data dependences of the FFT/IFFT calculations. An interesting approach that is also considered in this paper is the application of the integrated processing-in-memory Intelligent RAM (IRAM) chip to high speed FFT/IFFT computing. The results of the assessment study emphasize that the execution speed of the FFT/IFFT algorithms is tightly connected to the capabilities of the FFT/IFFT hardware to support the provided parallelism of the given algorithm. Therefore, we suggest that the basic Discrete Fourier Transform (DFT)/Inverse Discrete Fourier Transform (IDFT) can also provide high performances, by utilizing a specialized FFT/IFFT hardware architecture that can exploit the provided parallelism of the DFT/IDF operations. The proposed improvements include simplified multiplications over symbols given in polar coordinate system, using sinе and cosine look up tables, and an approach for performing parallel addition of N input symbols.

Efficiency Comparison of DFT/IDFT Algorithms by Evaluating Diverse Hardware : Implementations,Parallelization Prospectsand Possible Improvements

In this paper we investigate various algorithms for performing Fast Fourier Transformation (FFT)/Inverse Fast Fourier Transformation (IFFT), and proper techniquesfor maximizing the FFT/IFFT execution speed, such as pipelining or parallel processing, and use of memory structures with pre-computed values (look up tables -LUT) or other dedicated hardware components (usually multipliers). Furthermore, we discuss the optimal hardware architectures that best apply to various FFT/IFFT algorithms, along with their abilities to exploit parallel processing with minimal data dependences of the FFT/IFFT calculations. An interesting approach that is also considered in this paper is the application of the integrated processing-in-memory Intelligent RAM (IRAM) chip to high speed FFT/IFFT computing. The results of the assessment study emphasize that the execution speed of the FFT/IFFT algorithms is tightly connected to the capabilities of the FFT/IFFT hardware to support the provided parallelism of the given algorithm. Therefore, we suggest that the basic Discrete Fourier Transform (DFT)/Inverse Discrete Fourier Transform (IDFT) can also provide high performances, by utilizing a specialized FFT/IFFT hardware architecture that can exploit the provided parallelism of the DFT/IDF operations. The proposed improvements include simplified multiplications over symbols given in polar coordinate system, using sinе and cosine look up tables,and an approach for performing parallel addition of N input symbols.

Assessment of the VoIP Transmission Quality over Digital Power Line Carrier Channels

This article is devoted to the research of VoIP transmission quality over Digital Power Line Carrier channels. Assessment of quality transmission is performed using E-model. Paper considers the possibility of joint using of Digital Power Line carrier equipment with different architecture in one network. As a result of the research, the rule for constructing of multi-segment Digital Power Line Carrier channels was formulated. This rule allows minimizing the transmission delay and saving frequency resources of high voltage Power Line Carrier range.

Comparison of Contemporary Protocols for High-speed Data Transport via 10 Gbps WAN Connections

This work is dedicated to comparison of open source as well as proprietary transport protocols for highspeed data transmission via IP networks. The contemporary common TCP needs significant improvement since it was developed as general-purpose transport protocol and firstly introduced four decades ago. In nowadays networks, TCP fits not all communication needs that society has. Caused of it another transport protocols have been developed and successfully used for e.g. Big Data movement. In scope of this research the following protocols have been investigated for its efficiency on 10Gbps links: UDT, RBUDP, MTP and RWTP. The protocols were tested under different impairments such as Round Trip Time up to 400 ms and packet losses up to 2%. Investigated parameters are the data rate under different conditions of the network, the CPU load by sender andreceiver during the experiments, size of feedback data, CPU usage per Gbps and the amount of feedback data per GiByte of effectively transmitted data. The best performance and fair resources consumption was observed by RWTP. From the opensource projects, the best behavior is showed by RBUDP.

A Wireless Mesh Network NS-3 Simulation Model: Implementation and Performance Comparison With a Real Test-Bed

Wireless mesh networks present an attractive communication solution for various research and industrial projects. However, in many cases, the appropriate preliminary calculations which allow predicting the network behavior have to be made before the actual deployment. For such purposes, network simulation environments emulating the real network operation are often used. Within this paper, a behavior comparison of real wireless mesh network (based on 802.11s amendment) and the simulated one has been performed. The main objective of this work is to measure performance parameters of a real 802.11s wireless mesh network (average UDP throughput and average one-way delay) and compare the derived results with characteristics of a simulated wireless mesh network created with the NS-3 network simulation tool. Then, the results from both networks are compared and the corresponding conclusion is made. The corresponding results were derived from simulation model and real-worldtest-bed, showing that the behavior of both networks is similar. It confirms that the NS-3 simulation model is accurate and can be used in further research studies.

The Research of Increase of Channel Efficiency for IP Traffic Transmission over Digital Power Line Carrier Channels

This article is devoted to the research of channel efficiency for IP-traffic transmission over Digital Power Line Carrier channels. The application of serial WAN connections and header compression as methods to increase channel efficiency is considered. According to the results of the research an effective solution for network traffic transmission in DPLC networks was proposed.

Proceedings of the 1st International Conference on Applied Innovations in IT

This volume contains publications of the 1st International Conference on Applied Innovations in IT (ICAIIT), which took place in Koethen March 25th 2013. The conference is devoted to problems of applied research in the fields of mechanical and economical engineering, auotmation and communications as well as of data mining. The research results can be of interest for researchers and development engineers, who deal with theoretical base and the application of the knowledge in the respective areas.

Selbstparametrierende Steuerung für den Guss von Sanitärkeramik

In der Firma KERAMAG wird für den Guss von Sanitärkeramik das Hohlgussverfahren angewendet. Bei diesem Gießverfahren treten Fehlerbilder auf, die die Qualität negativ beeinflussen. Ziel der vorliegenden Arbeit ist den Gießprozess zu optimieren, damit sich die komplexen physikalischen Eigenschaften des Schlickers weniger stark auf den technologischen Ablauf des Gießprozesses auswirken. Dazu wird eine intelligente Softwarelösung (automatische Eingießsteuerung)erarbeitet, die die herkömmliche elektromechanische Steuerung ablöst. Als erstes werden der Aufbau und die Funktionsweise der herkömmlichen Gießanlage analysiertund die Einflüsse auf den technologischen Ablauf des Gießprozess untersucht. Aus dengewonnenen Erkenntnissen der Analyse werden Lösungsansätze zur Optimierung desGießprozesses abgeleitet. Mit den Anforderungen die sich aus den Lösungsansätzen ergebenen, wird eine geeigneteHardware für die Steuerungskomponenten des Automatisierungssytems ausgewählt. Auf Grundlage der ermittelten Steuerungsaufgaben wird mit SIMATIC-STEP7 ein Automatisierungsprojekt erstellt. Dabei sind die behandelten Schwerpunkte die „Selbstparametrierung und Optimierung der Eingießkurve“ und die „gleitende Skalierung der Analogausgangsgröße des Proportional-Druckregelventils“. Die vorgeschlagenen Lösungen werden an einer Gießanlage installiert und es wird der Nachweis erbracht, dass die Aufgabenstellung vollständig umgesetzt werden konnte.

Oberflächenmodifizierung von Verpackungsfolien durch Nano-strukturierung und deren lebensmittelspezifische Charakterisierung

Die fortschreitende Substitution verschiedener Verpackungsmaterialien durch Polymerfolien führt zu immer neuen Anforderungsprofilen an diese Materialgruppe. Durch zusätzliche Oberflächen-modifikationen der Verpackungsfolien mittels Beschichtungen, Plasmabehandlungen oder Prägung können neben den bereits hervorragenden mechanischen und optischen Eigenschaften weitere Effekte wie Lotuseffekt, Antifouling- und Antifogeigenschaften sowie andere erzielt werden. Besonders der Lotuseffekt, welcher in der Pflanzenwelt für die Aufnahme von Schmutzpartikeln verantwortlich ist und als Schutzmechanismus wirkt, nimmt in der Polymerforschung immer mehr an Bedeutung zu. Durch diesen Effekt soll es möglich werden teure Lebensmittel wie zum Beispiel Aromen ganzheitlich aus Polymerverpackungen zu entnehmen, sodass kein Tropfen in der Verpackung haften bleibt.Im Rahmen der Masterarbeit soll die Oberflächenmodifizierung von Verpackungsfolien durch Nanostrukturierung und deren lebensmittelspezifische Charakterisierung untersucht werden. Ausgehend von einer bereits vorhandenen Heißprägeeinrichtung sollen verschiedene Polyethylenfolien strukturiert und untersucht werden. Die Oberflächenstrukturierung erfolgt dabei mittels nanoporösen Prägestempeln. Die Parameter der Heißprägung wie Größe der Prägestruktur, der Prägedruck, die Prägezeit und -temperatur sollen dabei systematisch untersucht und optimiert werden. Die Bestimmung der Oberflächenmorphologie sowie der Transparenz und Glanz der nanostrukturierten Verpackungsfolien soll mittels Licht- und Rasterelektronenmikroskopie sowie optischer Spektroskopie erfolgen. Ziel ist, eine Verpackung zu erhalten, die trotz der Oberflächenmodifizierung nicht an ihrer Lichtdurchlässigkeit und Ihrem Glanz verliert, um den Verbraucher das Lebensmittel bestmöglich zu präsentiren.

Untersuchung des Einsatzes von elektronischen Leistungsstellern an den Hauptantrieben des Wirbelschichtkessels im IKW Wählitz unter den Gesichtspunkten der Steigerung der Effizienz und dem Erhalt der Verfügbarkeit

Die Bachelorarbeit befasst sich mit der theoretischen Untersuchung, Einsparpotentiale auf dem Gebiet des Elektroenergieverbrauchs am MIBRAG Standort Kraftwerk Wählitz (Sachsen-Anhalt)aufzudecken. Dabei soll der Schwerpunkt auf der Betrachtung der elektrotechnischen Hauptverbraucher liegen. Aus Gründen der Verbesserung der Energieeffizienz und somit des Erhalts der Wettbewerbsfähigkeit des Unternehmens ist eine Untersuchung über den Einsatz von elektronischen Leistungsstellern an den Hauptantrieben des Wirbelschichtkessels im Industriekraftwerk Wählitz (IKW) durchzuführen und zu bewerten.

Konzeption, Umsetzung und Evaluation eines Manöverassistenzsystems mit haptischer Fahrerunterstützung

Magdeburg, Univ., Fak. für Elektrotechnik und Informationstechnik, Diss., 2014

Visual recognition systems in a car passenger compartment with the focus on facial driver identification

Magdeburg, Univ., Fak. für Informatik, Diss., 2014