939 resultados para Constraint programming


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This paper develops a technique for improving the region of attraction of a robust variable horizon model predictive controller. It considers a constrained discrete-time linear system acted upon by a bounded, but unknown time-varying state disturbance. Using constraint tightening for robustness, it is shown how the tightening policy, parameterised as direct feedback on the disturbance, can be optimised to increase the volume of an inner approximation to the controller's true region of attraction. Numerical examples demonstrate the benefits of the policy in increasing region of attraction volume and decreasing the maximum prediction horizon length. © 2012 IEEE.

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A multi-channel complex machine tool (MCCM) is a versatile machining system equipped with more than two spindles and turrets for both turning and milling operations. Despite the potential of such a tool, the value of the hardware is largely dependent on how the machine tools are effectively programmed for machining. In this paper we consider a shop-floor programming system based on ISO 14649 (called e-CAM), the international standard for the interface between computer-aided manufacture (CAM) and computer numerical control (CNC). To be deployed in practical industrial usage a great deal of research has to be carried out. In this paper we present: 1) Design consideration for an e-CAM system, 2) The architecture design of e-CAM, 3) Major algorithms to fulfill the modules defined in the architecture, and 4) Implementation details.

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This paper describes a two-step packing algorithm for LUT clusters of which the LUT input multipliers are depopulated. In the first step, a greedy algorithm is used to search for BLE locations and cluster inputs. If the greedy algorithm fails, the second step with network flow programming algorithm is employed. Numerical results illustrate that our two-step packing algorithm obtains better packing density than one-step greedy packing algorithm.

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In this paper we present a methodology and its implementation for the design and verification of programming circuit used in a family of application-specific FPGAs that share a common architecture. Each member of the family is different either in the types of functional blocks contained or in the number of blocks of each type. The parametrized design methodology is presented here to achieve this goal. Even though our focus is on the programming circuitry that provides the interface between the FPGA core circuit and the external programming hardware, the parametrized design method can be generalized to the design of entire chip for all members in the FPGA family. The method presented here covers the generation of the design RTL files and the support files for synthesis, place-and-route layout and simulations. The proposed method is proven to work smoothly within the complete chip design methodology. We will describe the implementation of this method to the design of the programming circuit in details including the design flow from the behavioral-level design to the final layout as well as the verification. Different package options and different programming modes are included in the description of the design. The circuit design implementation is based on SMIC 0.13-micron CMOS technology.

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The formal specification language LFC was designed to support formal specification acquisition. However, it is yet suited to be used as a meta-language for specifying programming language processing. This paper introduces LFC as a meta-language, and compares it with ASF+SDF, an algebraic specification formalism that can also be used to programming languages.

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标准约束优化问题的等式或不等式约束之间是逻辑“与”关系,目前已经有很多高效、收敛的优化算法.但是,在实际应用中有很多更一般的约束优化问题,其等式或不等式约束之间不仅包含逻辑“与”关系,而且还包含逻辑“或”关系,现有的针对标准约束优化问题的各种算法不再适用,给出一种新的数学变换方法,把具有逻辑“或”关系的不等式约束转换为一组具有逻辑“与”关系的不等式,并应用到实时单调速率调度算法的可调度性判定充要条件中,把实时系统设计表示成混合布尔型整数规划问题,利用经典的分支定界法求解.实验部分指出了各种方法的优缺点.