Welcome to the new world disorder: conflict and transformation in Ian McEwan’s saturday

Ian McEwan‘s novel Saturday deals with the complex issues of conflict and transformation in the age of terrorism. The plot presents one internal dilemma and several interpersonal altercations that occur within a mere twenty-four hours: a) Perowne (the protagonist) vs. himself, in face of his ambivalent thoughts regarding British military participation in the war in the Middle East; b) The protagonist vs. Baxter, a ruffian from East End, in the context of a car accident; c) Perowne vs. a fellow anaesthetist, Jay Strauss, during a squash game; d) Perowne‘s daughter, Daisy vs. her grandfather, John Grammaticus, both poets and rivals; e) Perowne‘s family vs. Baxter, who intrudes the protagonist‘s house. In this paper, I exemplify, analyse and discuss how: a) Understanding the causes of what we call evil constitutes an important step towards mutual understanding; b) Both science and arts (which Perowne considers, at first, irrelevant) are important elements in the process of transformation; c) Both personal and interpersonal conflicts are intrinsic to human nature — but they also propitiate healthy changes in behaviour and opinion, through reflection. In order to do so, I resort to Saturday, and to the work of several specialists in the field of conflict management.

The impact of safety politics in the current globalization context

The globalization is a process of economical, social, cultural and political integration motivated by the needs generated by a consumption-orientated society and a set of factors that have led to its development, such as reducing transport costs, the technological advancement and the development of communication networks. However, the phenomenon of globalization has been accompanied by increasing levels of insecurity as a result of various types of threats and transnational crimes that the International Community seeks to control and minimize. Throughout this work, we examined how the globalization process has been developing and how nations are able to maintain security levels consistent with their economical status and social development, without disturbing the normal course of organizations’ economical activity and the well-being of people. From the investigation developed we concluded that, besides the confirmation that economic integration and the opening of markets have influence on internal consumption, market globalization and migrations have been causing modifications in the consumption habits. We also concluded that the security measures implemented by States or by the International Community affect international trade, but do not imply disproportionate costs or significant delays in transactions. Likewise, we concluded that the control measures implemented in international trade are sufficient to ensure the safety of the people and nations, enabling us to confirm two of the three conjectures raised in this study.

Effects of early life permethrin exposure on spatial working memory and on monoamine levels in different brain areas of pre-senescent rats

Pesticide exposure during brain development could represent an important risk factor for the onset of neurodegenerative diseases. Previous studies investigated the effect of permethrin (PERM) administered at 34 mg/kg, a dose close to the no observable adverse effect level (NOAEL) from post natal day (PND) 6 to PND 21 in rats. Despite the PERM dose did not elicited overt signs of toxicity (i.e. normal body weight gain curve), it was able to induce striatal neurodegeneration (dopamine and Nurr1 reduction, and lipid peroxidation increase). The present study was designed to characterize the cognitive deficits in the current animal model. When during late adulthood PERM treated rats were tested for spatial working memory performances in a T-maze-rewarded alternation task they took longer to choose for the correct arm in comparison to age matched controls. No differences between groups were found in anxiety-like state, locomotor activity, feeding behavior and spatial orientation task. Our findings showing a selective effect of PERM treatment on the T-maze task point to an involvement of frontal cortico-striatal circuitry rather than to a role for the hippocampus. The predominant disturbances concern the dopamine (DA) depletion in the striatum and, the serotonin (5-HT) and noradrenaline (NE) unbalance together with a hypometabolic state in the medial prefrontal cortex area. In the hippocampus, an increase of NE and a decrease of DA were observed in PERM treated rats as compared to controls. The concentration of the most representative marker for pyrethroid exposure (3-phenoxybenzoic acid) measured in the urine of rodents 12 h after the last treatment was 41.50 µ/L and it was completely eliminated after 96 h.

Software transactional memory as a building block for parallel embedded realtime systems

The recent trends of chip architectures with higher number of heterogeneous cores, and non-uniform memory/non-coherent caches, brings renewed attention to the use of Software Transactional Memory (STM) as a fundamental building block for developing parallel applications. Nevertheless, although STM promises to ease concurrent and parallel software development, it relies on the possibility of aborting conflicting transactions to maintain data consistency, which impacts on the responsiveness and timing guarantees required by embedded real-time systems. In these systems, contention delays must be (efficiently) limited so that the response times of tasks executing transactions are upper-bounded and task sets can be feasibly scheduled. In this paper we assess the use of STM in the development of embedded real-time software, defending that the amount of contention can be reduced if read-only transactions access recent consistent data snapshots, progressing in a wait-free manner. We show how the required number of versions of a shared object can be calculated for a set of tasks. We also outline an algorithm to manage conflicts between update transactions that prevents starvation.

WCET analysis considering contention on memory bus in COTS-based multicores

The usage of COTS-based multicores is becoming widespread in the field of embedded systems. Providing realtime guarantees at design-time is a pre-requisite to deploy real-time systems on these multicores. This necessitates the consideration of the impact of the contention due to shared low-level hardware resources on the Worst-Case Execution Time (WCET) of the tasks. As a step towards this aim, this paper first identifies the different factors that make the WCET analysis a challenging problem in a typical COTS-based multicore system. Then, we propose and prove, a mathematically correct method to determine tight upper bounds on the WCET of the tasks, when they are co-scheduled on different cores.

Response time analysis of COTS-Based multicores considering the contention on the shared memory bus

The current industry trend is towards using Commercially available Off-The-Shelf (COTS) based multicores for developing real time embedded systems, as opposed to the usage of custom-made hardware. In typical implementation of such COTS-based multicores, multiple cores access the main memory via a shared bus. This often leads to contention on this shared channel, which results in an increase of the response time of the tasks. Analyzing this increased response time, considering the contention on the shared bus, is challenging on COTS-based systems mainly because bus arbitration protocols are often undocumented and the exact instants at which the shared bus is accessed by tasks are not explicitly controlled by the operating system scheduler; they are instead a result of cache misses. This paper makes three contributions towards analyzing tasks scheduled on COTS-based multicores. Firstly, we describe a method to model the memory access patterns of a task. Secondly, we apply this model to analyze the worst case response time for a set of tasks. Although the required parameters to obtain the request profile can be obtained by static analysis, we provide an alternative method to experimentally obtain them by using performance monitoring counters (PMCs). We also compare our work against an existing approach and show that our approach outperforms it by providing tighter upper-bound on the number of bus requests generated by a task.

Finding an upper bound on the increase in execution time due to contention on the memory bus in COTS-based multicore systems

Contention on the memory bus in COTS based multicore systems is becoming a major determining factor of the execution time of a task. Analyzing this extra execution time is non-trivial because (i) bus arbitration protocols in such systems are often undocumented and (ii) the times when the memory bus is requested to be used are not explicitly controlled by the operating system scheduler; they are instead a result of cache misses. We present a method for finding an upper bound on the extra execution time of a task due to contention on the memory bus in COTS based multicore systems. This method makes no assumptions on the bus arbitration protocol (other than assuming that it is work-conserving).

Managing contention of software transactional memory in real-time systems

The foreseen evolution of chip architectures to higher number of, heterogeneous, cores, with non-uniform memory and non-coherent caches, brings renewed attention to the use of Software Transactional Memory (STM) as an alternative to lock-based synchronisation. However, STM relies on the possibility of aborting conflicting transactions to maintain data consistency, which impacts on the responsiveness and timing guarantees required by real-time systems. In these systems, contention delays must be (efficiently) limited so that the response times of tasks executing transactions are upperbounded and task sets can be feasibly scheduled. In this paper we defend the role of the transaction contention manager to reduce the number of transaction retries and to help the real-time scheduler assuring schedulability. For such purpose, the contention management policy should be aware of on-line scheduling information.

Diversity in Teams: Source of Conflict or Source of Creativity? Investigating Hidden Mental Models

The workforce in organizations today is becoming increasingly diverse. Consequently the role of diversity management is heavily discussed with respect to the question how diversity influences the productivity of a group. Empirical studies show that on one hand there is a potential for increasing productivity but on the other hand it might be as well that conflicts arise due to the heterogeneity of the group. Usually according empirical studies are based on interviews, questionnaires and/or observations. These methods imply that answers are highly selective and filtered. In order to make the invisible visible, to have access to mental models of team members the paper will present an empirical study on the self-understanding of groups based on an innovative research method, called “mind-scripting”.

Impacto dos sistemas colaborativos nas organizações: estudo de casos de adopção e utilização de sistemas workflow

Dissertação apresentada na Universidade do Minho com vista à obtenção do grau de Doutor em Tecnologias e Sistemas de Informação (Engenharia e Gestão de Sistemas de Informação)

In-situ X-ray diffraction studies during growth of Ni-Ti shape memory alloy films and their complementary ex-situ characterization

Shape Memory Alloy (SMA) Ni-Ti films have attracted much interest as functional and smart materials due to their unique properties. However, there are still important issues unresolved like formation of film texture and its control as well as substrate effects. Thus, the main challenge is not only the control of the microstructure, including stoichiometry and precipitates, but also the identification and control of the preferential orientation since it is a crucial factor in determining the shape memory behaviour. The aim of this PhD thesis is to study the optimisation of the deposition conditions of films of Ni-Ti in order to obtain the material fully crystallized at the end of the deposition, and to establish a clear relationship between the substrates and texture development. In order to achieve this objective, a two-magnetron sputter deposition chamber has been used allowing to heat and to apply a bias voltage to the substrate. It can be mounted into the six-circle diffractometer of the Rossendorf Beamline (ROBL) at the European Synchrotron Radiation Facility (ESRF), Grenoble, France, enabling an in-situ characterization by X-ray diffraction(XRD) of the films during their growth and annealing. The in-situ studies enable us to identify the different steps of the structural evolution during deposition with a set of parameters as well as to evaluate the effect of changing parameters on the structural characteristics of the deposited film. Besides the in-situ studies, other complementary ex-situ characterization techniques such as XRD at a laboratory source, Rutherford backscattering spectroscopy(RBS), Auger electron spectroscopy (AES), cross-sectional transmission electron microscopy (X-TEM), scanning electron microscopy (SEM), and electrical resistivity (ER) measurements during temperature cycling have been used for a fine structural characterization. In this study, mainly naturally and thermally oxidized Si(100) substrates, TiN buffer layers with different thicknesses (i.e. the TiN topmost layer crystallographic orientation is thickness dependent) and MgO(100) single crystals were used as substrates. The chosen experimental procedure led to a controlled composition and preferential orientation of the films. The type of substrate plays an important role for the texture of the sputtered Ni-Ti films and according to the ER results, the distinct crystallographic orientations of the Ni-Ti films influence their phase transformation characteristics.

Consistent state software transactional memory

Dissertação apresentada na Faculdade de Ciências e Tecnologia da Universidade Nova de Lisboa para a obtenção do Grau de Mestre em Engenharia Informática

Speculative execution by using software transactional memory

Dissertação apresentada na Faculdade de Ciências e Tecnologia da Universidade Nova de Lisboa para a obtenção do Grau de Mestre em Engenharia Informática.

Write-erase and read paper memory transistor

Applied Physics Letters, Vol.93, issue 20