980 resultados para GATE DIELECTRICS GD2O3


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Europium-doped Gd2O3 with an average size of similar to15 nm was coated on the surface of preformed silica nanospheres by the wet chemical method. SEM and TEM photographs showed that SiO2/Gd2O3:Eu core-shell submicrospheres are obtained. XRD patterns indicated that the Gd2O3:Eu shell is crystalline after heat treatment. FTIR and XPS spectra showed that the Gd2O3:Eu shell is linked to the silica surface by forming a Si-O-Gd bond. Photoluminescence studies showed that the luminescent properties are still retained after coating on an inert silica core; additionally, we noted that the emitting peaks are broadened, which results from size effects and interface effects of nanocrystal.

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Silica coating on Gd2O3:Eu particles was obtained by a simple method, e.g. solid-state reaction at room temperature. The urea homogeneous precipitation method was used to synthesize the Gd2O3:Eu cores. Transmission electron microscopy (TEM) shows that the core particles are spherical with submicrometer size which is the soft agglomerates with nanometer crystallites. The TEM morphology of coated particles shows that a thin film is coated on the surface of Gd2O3:Eu cores. Scanning electron microscopy (SEM) and energy-dispersive spectrometer (EDS) analysis indicate that the coating of silica can be used to avoid agglomeration of Gd2O3:Eu particles to obtain smaller particles. X-ray photoelectron spectra (XPS) show that silica is coated on the surface of core particles by forming the chemical bond. Photoluminescence (PL) spectra conform that Gd2O3:Eu phosphors remain well-luminescent properties by the silica coating.

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A uniform nanolayer of europium-doped Gd2O3 was coated on the surface of preformed submicron silica spheres by a Pechini sol-gel process. The resulted SiO2@Gd2O3:Eu3+ core-shell structured phosphors were characterized by X-ray diffraction (XRD), Fourier transform infrared spectroscopy (FT-IR), field emission scanning electron microscopy (FESEM), transmission electron microscopy (TEM), photoluminescence (PL) spectra as well as kinetic decays. The XRD results show that the Gd2O3:Eu3+ layers start to crystallize on the SiO2 spheres after annealing at 400 degrees C and the crystallinity increases with raising the annealing temperature. The core-shell phosphors possess perfect spherical shape with narrow size distribution (average size: 640 nm) and non-agglomeration. The thickness of the Gd2O3:Eu3+ shells on the SiO2 cores can be adjusted by changing the deposition cycles (70 nm for three deposition cycles). Under short UV excitation, the obtained SiO2@Gd2O3:Eu3+ particles show a strong red emission with D-5(0)-F-7(2) (610 nm) of Eu3+ as the most prominent group.The PL intensity of Eu3+ increases with increasing the annealing temperature and the number of coating cycles.

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We report the fabrication of organic thin-film transistors (OTFTs) with copper phthalocyanine (CuPc) as the semiconductor and calcium fluoride (CaF2) as the gate dielectric on the glass substrate. The fabricated transistors show a gate voltage dependent carrier field effect mobility that ranges from 0.001 to 0.5 cm(2) V-1 s(-1). In the devices, the CaF2 dielectric is formed by thermal evaporation; thus OTFTs with a top-gate structure can be fabricated. This provides a convenient way to produce high-performance OTFTs on a large scale and should be useful for the integration of organic displays.

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Y2O3:Sm and Gd2O3:Sm powder phosphors were prepared by carbonate coprecipitation method. The purified crystalline phases of Y2O3:Sm and Gd2O3:SM were obtained at 600degreesC, and the crystallinity increases with increase in annealing temperature. Both samples contain aggregated phosphor particles. An energy transfer (ET) from Y2O3 and Gd2O3 hosts to sm(3+) has been observed, and the ET efficiency in the latter is higher than that in the former because an energy migration process like Gd3+-(Gd3+)(n)-Sm3+ has occurred in the latter. Furthermore, an upconversion luminescence from the (4)G(5/2) level of Sm3+ has been observed in both Y2O3 and Gd2O3 under the excitation of 936 nm infrared, whose mechanisms are proposed. Both the up and downconversion emission intensities of Sm3+ in Gd2O3 are stronger than those in Y2O3.

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Nanocrystalline Gd2O3:A (A = Eu3+, Dy3+, Sm3+, Er3+) phosphor films and their patterning were fabricated by a Pechini sol-gel process combined with a soft lithography. X-ray diffraction (XRD), atomic force microscopy (AFM), scanning electron microscopy (SEM) and optical microscopy, UV/vis transmission and photoluminescence (PL) spectra as well as lifetimes were used to characterize the resulting films. The results of XRD indicated that the films began to crystallize at 500 degreesC and that the crystallinity increased with the elevation of annealing temperatures. Uniform and crack free non-patterned phosphor films were obtained by optimizing the composition of the coating sol, which mainly consisted of grains with an average size of 70 nm and a thickness of 550 nm. Using micro-molding in capillaries technique, we obtained homogeneous and defects-free patterned gel and crystalline phosphor films with different stripe widths (5, 10, 20 and 50 mum). Significant shrinkage (50%) was observed in the patterned films during the heat treatment process. The doped rare earth ions (A) showed their characteristic emission in crystalline Gd2O3 phosphor films due to an efficient energy transfer from Gd2O3 host to them. Both the lifetimes and PL intensity of the rare earth ions increased with increasing the annealing temperature from 500 to 900 degreesC, and the optimum concentrations for Eu3+, Dy3+, sm(3+), Er3+ were determined to be 5, 0.25, 1 and 1.5 mol% of Gd3+ in Gd2O3 films, respectively.

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Ru(bpy)(3)(2+) electrochemiluminescence (ECL) method and electrocatalysis method were first used to study the ion-gate behavior of supported lipid bilayer membrane (sBLM). We found that sBLM, made of dimethyldioctadecylammonium bromide (a kind of synthetic lipid), showed ion-gate behavior for the permeation of Ru(bpy)(3)(2+) in the presence of perchlorate anion. There existed a threshold concentration (0.1 muM) of perchlorate anion for ion-gate opening. Below the threshold the ion-gate was closed. Above the threshold, the number of opened ion-gate sites increased with the increase of perchlorate anion concentration and leveled off at concentrations higher than 1200 muM. Based on it, a new sensor for perchlorate was developed. Furthermore, the opening and closing of the ion-gate behavior was reversible, which means the sensor can repeatedly be used.

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Atomic layer deposition (ALD) is now used in semiconductor fabrication lines to deposit nanometre-thin oxide films, and has thus enabled the introduction of high-permittivity dielectrics into the CMOS gate stack. With interest increasing in transistors based on high mobility substrates, such as GaAs, we are investigating the surface treatments that may improve the interface characteristics. We focus on incubation periods of ALD processes on III-V substrates. We have applied first principles Density Functional Theory (DFT) to investigate detailed chemistry of these early stages of growth, specifically substrate and ALD precursor interaction. We have modelled the ‘clean-up’ effect by which organometallic precursors: trimethylaluminium (TMA) or hafnium and titanium amides clean arsenic oxides off the GaAs surface before ALD growth of dielectric commences and similar effect on Si3N4 substrate. Our simulations show that ‘clean-up’ of an oxide film strongly depends on precursor ligand, its affinity to the oxide and the redox character of the oxide. The predominant pathway for a metalloid oxide such as arsenic oxide is reduction, producing volatile molecules or gettering oxygen from less reducible oxides. An alternative pathway is non-redox ligand exchange, which allows non-reducible oxides (e.g. SiO2) to be cleaned-up. First principles study shows also that alkylamides are more susceptible to decomposition rather than migration on the oxide surface. This improved understanding of the chemical principles underlying ‘clean-up’ allows us to rationalize and predict which precursors will perform the reaction. The comparison is made between selection of metal chlorides, methyls and alkylamides precursors.

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The continued advancement of metal oxide semiconductor field effect transistor (MOSFET) technology has shifted the focus from Si/SiO2 transistors towards high-κ/III-V transistors for high performance, faster devices. This has been necessary due to the limitations associated with the scaling of the SiO2 thickness below ~1 nm and the associated increased leakage current due to direct electron tunnelling through the gate oxide. The use of these materials exhibiting lower effective charge carrier mass in conjunction with the use of a high-κ gate oxide allows for the continuation of device scaling and increases in the associated MOSFET device performance. The high-κ/III-V interface is a critical challenge to the integration of high-κ dielectrics on III-V channels. The interfacial chemistry of the high-κ/III-V system is more complex than Si, due to the nature of the multitude of potential native oxide chemistries at the surface with the resultant interfacial layer showing poor electrical insulating properties when high-κ dielectrics are deposited directly on these oxides. It is necessary to ensure that a good quality interface is formed in order to reduce leakage and interface state defect density to maximise channel mobility and reduce variability and power dissipation. In this work, the ALD growth of aluminium oxide (Al2O3) and hafnium oxide (HfO2) after various surface pre-treatments was carried out, with the aim of improving the high-κ/III-V interface by reducing the Dit – the density of interface defects caused by imperfections such as dangling bonds, dimers and other unsatisfied bonds at the interfaces of materials. A brief investigation was performed into the structural and electrical properties of Al2O3 films deposited on In0.53Ga0.47As at 200 and 300oC via a novel amidinate precursor. Samples were determined to experience a severe nucleation delay when deposited directly on native oxides, leading to diminished functionality as a gate insulator due to largely reduced growth per cycle. Aluminium oxide MOS capacitors were prepared by ALD and the electrical characteristics of GaAs, In0.53Ga0.47As and InP capacitors which had been exposed to pre-pulse treatments from triethyl gallium and trimethyl indium were examined, to determine if self-cleaning reactions similar to those of trimethyl aluminium occur for other alkyl precursors. An improved C-V characteristic was observed for GaAs devices indicating an improved interface possibly indicating an improvement of the surface upon pre-pulsing with TEG, conversely degraded electrical characteristics observed for In0.53Ga0.47As and InP MOS devices after pre-treatment with triethyl gallium and trimethyl indium respectively. The electrical characteristics of Al2O3/In0.53Ga0.47As MOS capacitors after in-situ H2/Ar plasma treatment or in-situ ammonium sulphide passivation were investigated and estimates of interface Dit calculated. The use of plasma reduced the amount of interface defects as evidenced in the improved C-V characteristics. Samples treated with ammonium sulphide in the ALD chamber were found to display no significant improvement of the high-κ/III-V interface. HfO2 MOS capacitors were fabricated using two different precursors comparing the industry standard hafnium chloride process with deposition from amide precursors incorporating a ~1nm interface control layer of aluminium oxide and the structural and electrical properties investigated. Capacitors furnished from the chloride process exhibited lower hysteresis and improved C-V characteristics as compared to that of hafnium dioxide grown from an amide precursor, an indication that no etching of the film takes place using the chloride precursor in conjunction with a 1nm interlayer. Optimisation of the amide process was carried out and scaled samples electrically characterised in order to determine if reduced bilayer structures display improved electrical characteristics. Samples were determined to exhibit good electrical characteristics with a low midgap Dit indicative of an unpinned Fermi level

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Recent studies have shown that in addition to the transcriptional circadian clock, many organisms, including Arabidopsis, have a circadian redox rhythm driven by the organism's metabolic activities. It has been hypothesized that the redox rhythm is linked to the circadian clock, but the mechanism and the biological significance of this link have only begun to be investigated. Here we report that the master immune regulator NPR1 (non-expressor of pathogenesis-related gene 1) of Arabidopsis is a sensor of the plant's redox state and regulates transcription of core circadian clock genes even in the absence of pathogen challenge. Surprisingly, acute perturbation in the redox status triggered by the immune signal salicylic acid does not compromise the circadian clock but rather leads to its reinforcement. Mathematical modelling and subsequent experiments show that NPR1 reinforces the circadian clock without changing the period by regulating both the morning and the evening clock genes. This balanced network architecture helps plants gate their immune responses towards the morning and minimize costs on growth at night. Our study demonstrates how a sensitive redox rhythm interacts with a robust circadian clock to ensure proper responsiveness to environmental stimuli without compromising fitness of the organism.

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This is the first paper to describe performance assessment of triple and double gate FinFETs for High Performance (HP), Low Operating Power (LOP) and Low Standby Power (LSTP) logic technologies is investigated. The impact of gate work-function, spacer width, lateral source/drain doping gradient, fin aspect ratio, fin thickness on device performance, has been analysed in detail and guidelines are presented to meet ITRS specification at 65 and 45 nm nodes. Optimal design of lateral source/drain doping profile can not only effectively control short channel effects, yielding low off-current, but also achieve low values of intrinsic gate delay.

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Nonlocal gate operation is based on sharing an ancillary pair of qubits in perfect entanglement. When the ancillary pair is partially entangled, the efficiency of gate operation drops. Using general transformations, we devise probabilistic nonlocal gates, which perform the nonlocal operation conclusively when the ancillary pair is only partially entangled. We show that a controlled purification protocol can be implemented by the probabilistic nonlocal operation.