Selektives Lasersintern von teilkristallinen Thermoplasten

Da eine flexible Fertigung im Bereich von Losgrößen zwischen 1-1000 Stück in vielen Wirtschaftszweigen vermehrt an Bedeutung gewinnt, steigt das Interesse an Verfahren wie dem Selektiven Lasersintern. Dennoch sollen die Eigenschaften von in Serie eingesetzten Werkstoffen erreicht werden. Aufgrund der bestehenden werkstofflichen Restriktionen auf Polyamid 12 wird aktuell an der Verarbeitung anderer teilkristalliner Thermoplaste geforscht. In diesem Beitrag werden die sich in der Markteinführung befindlichen Werkstoffe vorgestellt und basierend auf der Verarbeitung weiterer Thermoplaste die bestehende Modellvorstellung zum Lasersintern erweitert.

Modellgestützte und hierarchische Prozesskettenbetrachtung für die additive Fertigung

Additive Fertigungsverfahren eignen sich für die wirtschaftliche Herstellung von Bauteilen im Bereich kleiner bis mittlerer Stückzahlen, da keine Formen oder Spezialwerkzeuge notwendig sind. Die erzielbaren Eigenschaften sind oftmals bereits ausreichend, um einen Einsatz auch in Serienanwendungen zu ermöglichen. Verbunden mit den Vorteilen der Technologie bezüglich einer hohen Flexibilität, sowohl während der Konstruktion als auch der Fertigung, können sich durch eine konsequente Nutzung finanzielle Einsparmöglichkeiten entlang des gesamten Produktlebenszyklus ergeben. Bezüglich der Wirtschaftlichkeit der Verfahren herrscht oftmals noch Unklarheit, da geeignete Methoden fehlen, um diese zu bewerten. Bestehende Methoden und Werkzeuge zur Bewertung der Wirtschaftlichkeit konventioneller Fertigungsverfahren sind dabei für die additive Fertigung nicht direkt nutzbar. In dem Artikel wird eine Methode zur modellgestützten Abbildung einer gesamten additiven Fertigungskette vorgestellt, welche auch die Wechselwirkungen zwischen den einzelnen Prozesskettengliedern berücksichtigen soll. Eine konkrete Aussage bezüglich der Wirtschaftlichkeit der additiven Fertigung soll somit ermöglicht werden.

Performance enhancement of large industrial wastewater stabilization ponds

A 6-month-long, bench-scale simulation of an industrial wastewater stabilization pond (WSP) system was conducted to evaluate responses to several potential performance-enhancing treatments. The industrial WSP system consists of an anaerobic primary (1ry) WSP treating high-strength wastewater, followed by facultative secondary (2ry) and aerobic tertiary (3ry) WSPs in series treating lower-strength wastewater. The 1ry WSP was simulated with four glass aquaria which were fed with wastewater from the actual WSP system. The treatments examined were phosphorus supplementation (PHOS), phosphorus supplementation with pH control (PHOS+ALK), and phosphorus supplementation with pH control and effluent recycle (PHOS+ALK+RCY). The supplementary phosphorus treatment alone did not yield any significant change versus the CONTROL 1ry model pond. The average carbon to phosphorus ratio of the feed wastewater received from the WSP system was already 100:0.019 (i.e., 2,100 mg/l: 0.4 mg/l). The pH-control treatments (PHOS+ALK and PHOS+ALK+RCY) produced significant results, with 9 to 12 percent more total organic carbon (TOC) removal, 43 percent more volatile organic acid (VOA) generation, 78 percent more 2-ethoxyethanol and 14 percent more bis(2-chloroethyl)ether removal, and from 100- to 10,000-fold increases in bacterial enzyme activity and heterotrophic bacterial numbers. Recycling a 10-percent portion of the effluent yielded less variability for certain physicochemical parameters in the PHOS+ALK+RCY 1ry model pond, but overall there was no statistically-detectable improvement in performance versus no recycle. The 2ry and 3ry WSPs were also simulated in the laboratory to monitor the effect and fate of increased phosphorus loadings, as might occur if supplemental phosphorus were added to the 1ry WSP. Noticeable increases in algal growth were observed at feed phosphorus concentrations of 0.5 mg/l; however, there were no significant changes in the monitored physicochemical parameters. The effluent phosphorus concentrations from both the 2ry and 3ry model ponds did increase notably when feed phosphorus concentrations were increased from 0.5 to 1.0 mg/l. ^

A proposed parameterization of interface discontinuity factors depending on neighborhood for pin-by-pin diffusion computations for LWR

There exists an interest in performing full core pin-by-pin computations for present nuclear reactors. In such type of problems the use of a transport approximation like the diffusion equation requires the introduction of correction parameters. Interface discontinuity factors can improve the diffusion solution to nearly reproduce a transport solution. Nevertheless, calculating accurate pin-by-pin IDF requires the knowledge of the heterogeneous neutron flux distribution, which depends on the boundary conditions of the pin-cell as well as the local variables along the nuclear reactor operation. As a consequence, it is impractical to compute them for each possible configuration. An alternative to generate accurate pin-by-pin interface discontinuity factors is to calculate reference values using zero-net-current boundary conditions and to synthesize afterwards their dependencies on the main neighborhood variables. In such way the factors can be accurately computed during fine-mesh diffusion calculations by correcting the reference values as a function of the actual environment of the pin-cell in the core. In this paper we propose a parameterization of the pin-by-pin interface discontinuity factors allowing the implementation of a cross sections library able to treat the neighborhood effect. First results are presented for typical PWR configurations.

Design of envelope amplifier based on interleaved multiphase buck converter with minimum time control for RF application

In this paper, an interleaved multiphase buck converter with minimum time control strategy for envelope amplifiers in high efficiency RF power amplifiers is proposed. The solution for the envelope amplifier is to combine the proposed converter with a linear regulator in series. High efficiency of envelope amplifier can be obtained through modulating the supply voltage of the linear regulator. Instead of tracking the envelope, the buck converter has discrete output voltage that corresponding to particular duty cycles which achieve total ripple cancellation. The transient model for minimum time control is explained, and the calculation of transient times that are pre-calculated and inserted into a lookup table is presented. The filter design trade-off that limits capability of envelope modulation is also discussed. The experimental results verify the fast voltage transient obtained with a 4-phase buck prototype.

Multiphase Buck Converter with Minimum Time Control Strategy for RF Envelope Modulation

Power amplifier supplied with constant supply voltage has very low efficiency in the transmitter. A DC-DC converter in series with a linear regulator can be used to obtain voltage modulation. Since this converter should be able to change the output voltage very fast, a multiphase buck converter with a minimum time control strategy is proposed. To modulate supply voltage of the envelope amplifier, the multiphase converter works with some particular duty cycle (i/n, i=1, 2 ... n, n is the number of phase) to generate discrete output voltages, and in these duty cycles the output current ripple can be completely cancelled. The transition times for the minimum time are pre-calculated and inserted in a look-up table. The theoretical background, the system model that is necessary in order to calculate the transition times and the experimental results obtained with a 4-phase buck prototype are given

Novel Inductor‐less Conversion Strategy Based on Multiphase Transformer‐Coupled Converters: Analysis, Design and Applications

There are many the requirements that modern power converters should fulfill. Most of the applications where these converters are used, demand smaller converters with high efficiency, improved power density and a fast dynamic response. For instance, loads like microprocessors demand aggressive current steps with very high slew rates (100A/mus and higher); besides, during these load steps, the supply voltage of the microprocessor should be kept within tight limits in order to ensure its correct performance. The accomplishment of these requirements is not an easy task; complex solutions like advanced topologies - such as multiphase converters- as well as advanced control strategies are often needed. Besides, it is also necessary to operate the converter at high switching frequencies and to use capacitors with high capacitance and low ESR. Improving the dynamic response of power converters does not rely only on the control strategy but also the power topology should be suited to enable a fast dynamic response. Moreover, in later years, a fast dynamic response does not only mean accomplishing fast load steps but output voltage steps are gaining importance as well. At least, two applications that require fast voltage changes can be named: Low power microprocessors. In these devices, the voltage supply is changed according to the workload and the operating frequency of the microprocessor is changed at the same time. An important reduction in voltage dependent losses can be achieved with such changes. This technique is known as Dynamic Voltage Scaling (DVS). Another application where important energy savings can be achieved by means of changing the supply voltage are Radio Frequency Power Amplifiers. For example, RF architectures based on ‘Envelope Tracking’ and ‘Envelope Elimination and Restoration’ techniques can take advantage of voltage supply modulation and accomplish important energy savings in the power amplifier. However, in order to achieve these efficiency improvements, a power converter with high efficiency and high enough bandwidth (hundreds of kHz or even tens of MHz) is necessary in order to ensure an adequate supply voltage. The main objective of this Thesis is to improve the dynamic response of DC-DC converters from the point of view of the power topology. And the term dynamic response refers both to the load steps and the voltage steps; it is also interesting to modulate the output voltage of the converter with a specific bandwidth. In order to accomplish this, the question of what is it that limits the dynamic response of power converters should be answered. Analyzing this question leads to the conclusion that the dynamic response is limited by the power topology and specifically, by the filter inductance of the converter which is found in series between the input and the output of the converter. The series inductance is the one that determines the gain of the converter and provides the regulation capability. Although the energy stored in the filter inductance enables the regulation and the capability of filtering the output voltage, it imposes a limitation which is the concern of this Thesis. The series inductance stores energy and prevents the current from changing in a fast way, limiting the slew rate of the current through this inductor. Different solutions are proposed in the literature in order to reduce the limit imposed by the filter inductor. Many publications proposing new topologies and improvements to known topologies can be found in the literature. Also, complex control strategies are proposed with the objective of improving the dynamic response in power converters. In the proposed topologies, the energy stored in the series inductor is reduced; examples of these topologies are Multiphase converters, Buck converter operating at very high frequency or adding a low impedance path in parallel with the series inductance. Control techniques proposed in the literature, focus on adjusting the output voltage as fast as allowed by the power stage; examples of these control techniques are: hysteresis control, V 2 control, and minimum time control. In some of the proposed topologies, a reduction in the value of the series inductance is achieved and with this, the energy stored in this magnetic element is reduced; less stored energy means a faster dynamic response. However, in some cases (as in the high frequency Buck converter), the dynamic response is improved at the cost of worsening the efficiency. In this Thesis, a drastic solution is proposed: to completely eliminate the series inductance of the converter. This is a more radical solution when compared to those proposed in the literature. If the series inductance is eliminated, the regulation capability of the converter is limited which can make it difficult to use the topology in one-converter solutions; however, this topology is suitable for power architectures where the energy conversion is done by more than one converter. When the series inductor is eliminated from the converter, the current slew rate is no longer limited and it can be said that the dynamic response of the converter is independent from the switching frequency. This is the main advantage of eliminating the series inductor. The main objective, is to propose an energy conversion strategy that is done without series inductance. Without series inductance, no energy is stored between the input and the output of the converter and the dynamic response would be instantaneous if all the devices were ideal. If the energy transfer from the input to the output of the converter is done instantaneously when a load step occurs, conceptually it would not be necessary to store energy at the output of the converter (no output capacitor COUT would be needed) and if the input source is ideal, the input capacitor CIN would not be necessary. This last feature (no CIN with ideal VIN) is common to all power converters. However, when the concept is actually implemented, parasitic inductances such as leakage inductance of the transformer and the parasitic inductance of the PCB, cannot be avoided because they are inherent to the implementation of the converter. These parasitic elements do not affect significantly to the proposed concept. In this Thesis, it is proposed to operate the converter without series inductance in order to improve the dynamic response of the converter; however, on the other side, the continuous regulation capability of the converter is lost. It is said continuous because, as it will be explained throughout the Thesis, it is indeed possible to achieve discrete regulation; a converter without filter inductance and without energy stored in the magnetic element, is capable to achieve a limited number of output voltages. The changes between these output voltage levels are achieved in a fast way. The proposed energy conversion strategy is implemented by means of a multiphase converter where the coupling of the phases is done by discrete two-winding transformers instead of coupledinductors since transformers are, ideally, no energy storing elements. This idea is the main contribution of this Thesis. The feasibility of this energy conversion strategy is first analyzed and then verified by simulation and by the implementation of experimental prototypes. Once the strategy is proved valid, different options to implement the magnetic structure are analyzed. Three different discrete transformer arrangements are studied and implemented. A converter based on this energy conversion strategy would be designed with a different approach than the one used to design classic converters since an additional design degree of freedom is available. The switching frequency can be chosen according to the design specifications without penalizing the dynamic response or the efficiency. Low operating frequencies can be chosen in order to favor the efficiency; on the other hand, high operating frequencies (MHz) can be chosen in order to favor the size of the converter. For this reason, a particular design procedure is proposed for the ‘inductorless’ conversion strategy. Finally, applications where the features of the proposed conversion strategy (high efficiency with fast dynamic response) are advantageus, are proposed. For example, in two-stage power architectures where a high efficiency converter is needed as the first stage and there is a second stage that provides the fine regulation. Another example are RF power amplifiers where the voltage is modulated following an envelope reference in order to save power; in this application, a high efficiency converter, capable of achieving fast voltage steps is required. The main contributions of this Thesis are the following: The proposal of a conversion strategy that is done, ideally, without storing energy in the magnetic element. The validation and the implementation of the proposed energy conversion strategy. The study of different magnetic structures based on discrete transformers for the implementation of the proposed energy conversion strategy. To elaborate and validate a design procedure. To identify and validate applications for the proposed energy conversion strategy. It is important to remark that this work is done in collaboration with Intel. The particular features of the proposed conversion strategy enable the possibility of solving the problems related to microprocessor powering in a different way. For example, the high efficiency achieved with the proposed conversion strategy enables it as a good candidate to be used for power conditioning, as a first stage in a two-stage power architecture for powering microprocessors.

Envelope amplifier based on switching capacitors for high efficiency RF amplifiers

Modern transmitters usually have to amplify and transmit signals with simultaneous envelope and phase modulation. Due to this property of the transmitted signal, linear power amplifiers (class A, B, or AB) are usually used as a solution for the power amplifier stage. These amplifiers have high linearity, but suffer from low efficiency when the transmitted signal has high peak-to-average power ratio. The Kahn envelope elimination and restoration technique is used to enhance the efficiency of RF transmitters, by combining highly efficient, nonlinear RF amplifier (class E) with a highly efficient envelope amplifier in order to obtain a linear and highly efficient RF amplifier. This paper presents a solution for the envelope amplifier based on a multilevel converter in series with a linear regulator. The multilevel converter is implemented by employing voltage dividers based on switching capacitors. The implemented envelope amplifier can reproduce any signal with a maximum spectral component of 2 MHz and give instantaneous maximum power of 50 W. The efficiency measurements show that when the signals with low average value are transmitted, the implemented prototypes have up to 20% higher efficiency than linear regulators used as a conventional solution.

Detecting periodicity with horizontal visibility graphs

The horizontal visibility algorithm was recently introduced as a mapping between time series and networks. The challenge lies in characterizing the structure of time series (and the processes that generated those series) using the powerful tools of graph theory. Recent works have shown that the visibility graphs inherit several degrees of correlations from their associated series, and therefore such graph theoretical characterization is in principle possible. However, both the mathematical grounding of this promising theory and its applications are in its infancy. Following this line, here we address the question of detecting hidden periodicity in series polluted with a certain amount of noise. We first put forward some generic properties of horizontal visibility graphs which allow us to define a (graph theoretical) noise reduction filter. Accordingly, we evaluate its performance for the task of calculating the period of noisy periodic signals, and compare our results with standard time domain (autocorrelation) methods. Finally, potentials, limitations and applications are discussed.

High Efficiency Envelope Amplifier Using The Slow-Envelope Technique

High efficiency envelope amplifiers are demanded in EER technique for RF transmitters, which benefits low maintaining cost or long battery time. The conventional solution is a dc-dc switching converters. This dc-dc converter should operate at very high frequency to track an envelope in the MHz range to supply the power amplifier. One of the alternative circuits suitable for this application is a hybrid topology composed of a switched converter and a linear regulator in series that work together to adjust the output voltage to track the envelope with accuracy. This topology can take advantage of the reduced slew-rate technique (also called slow-envelope technique) where switching dc-dc converter provides the RF envelope with limited slew rate in order to avoid high switching frequency and high power losses, while the linear regulator performs fine adjustment in order to obtain the exact replica of the RF envelope. The combination of this control technique with this topology is proposed in this paper. Envelopes with different bandwidth will be considered to optimize the efficiency of the dc-dc converter.

Microstructure and mechanical properties at high temperature of SiC-matrix by electrophoretic deposition and polymer infiltration and pyrolysis process

The EFDA-ITER programme for materials wants to develop new structural materials for future nuclear magnetic fusion reactors. In this context, special attention must be paid in the development of new composite materials that could support the hard working conditions of the nuclear fusion reactors: high temperature, high stresses, and high radiation.

Wide bandwidth envelope trackers with reduced switching frequency for RF power amplifier

El requerimiento de proveer alta frecuencia de datos en los modernos sistema de comunicación inalámbricos resulta en complejas señales moduladas de radio-frequencia (RF) con un gran ancho de banda y alto ratio pico-promedio (PAPR). Para garantizar la linealidad del comportamiento, los amplificadores lineales de potencia comunes funcionan típicamente entre 4 y 10 dB de back-o_ desde la máxima potencia de salida, ocasionando una baja eficiencia del sistema. La eliminación y restauración de la evolvente (EER) y el seguimiento de la evolvente (ET) son dos prometedoras técnicas para resolver el problema de la eficiencia. Tanto en EER como en ET, es complicado diseñar un amplificador de potencia que sea eficiente para señales de RF de alto ancho de banda y alto PAPR. Una propuesta común para los amplificadores de potencia es incluir un convertidor de potencia de muy alta eficiencia operando a frecuencias más altas que el ancho de banda de la señal RF. En este caso, la potencia perdida del convertidor ocasionado por la alta frecuencia desaconseja su práctica cuando el ancho de banda es muy alto. La solución a este problema es el enfoque de esta disertación que presenta dos arquitecturas de amplificador evolvente: convertidor híbrido-serie con una técnica de evolvente lenta y un convertidor multinivel basado en un convertidor reductor multifase con control de tiempo mínimo. En la primera arquitectura, una topología híbrida está compuesta de una convertidor reductor conmutado y un regulador lineal en serie que trabajan juntos para ajustar la tensión de salida para seguir a la evolvente con precisión. Un algoritmo de generación de una evolvente lenta crea una forma de onda con una pendiente limitada que es menor que la pendiente máxima de la evolvente original. La salida del convertidor reductor sigue esa forma de onda en vez de la evolvente original usando una menor frecuencia de conmutación, porque la forma de onda no sólo tiene una pendiente reducida sino también un menor ancho de banda. De esta forma, el regulador lineal se usa para filtrar la forma de onda tiene una pérdida de potencia adicional. Dependiendo de cuánto se puede reducir la pendiente de la evolvente para producir la forma de onda, existe un trade-off entre la pérdida de potencia del convertidor reductor relacionada con la frecuencia de conmutación y el regulador lineal. El punto óptimo referido a la menor pérdida de potencia total del amplificador de evolvente es capaz de identificarse con la ayuda de modelo preciso de pérdidas que es una combinación de modelos comportamentales y analíticos de pérdidas. Además, se analiza el efecto en la respuesta del filtro de salida del convertidor reductor. Un filtro de dampeo paralelo extra es necesario para eliminar la oscilación resonante del filtro de salida porque el convertidor reductor opera en lazo abierto. La segunda arquitectura es un amplificador de evolvente de seguimiento de tensión multinivel. Al contrario que los convertidores que usan multi-fuentes, un convertidor reductor multifase se emplea para generar la tensión multinivel. En régimen permanente, el convertidor reductor opera en puntos del ciclo de trabajo con cancelación completa del rizado. El número de niveles de tensión es igual al número de fases de acuerdo a las características del entrelazamiento del convertidor reductor. En la transición, un control de tiempo mínimo (MTC) para convertidores multifase es novedosamente propuesto y desarrollado para cambiar la tensión de salida del convertidor reductor entre diferentes niveles. A diferencia de controles convencionales de tiempo mínimo para convertidores multifase con inductancia equivalente, el propuesto MTC considera el rizado de corriente por cada fase basado en un desfase fijo que resulta en diferentes esquemas de control entre las fases. La ventaja de este control es que todas las corrientes vuelven a su fase en régimen permanente después de la transición para que la siguiente transición pueda empezar muy pronto, lo que es muy favorable para la aplicación de seguimiento de tensión multinivel. Además, el control es independiente de la carga y no es afectado por corrientes de fase desbalanceadas. Al igual que en la primera arquitectura, hay una etapa lineal con la misma función, conectada en serie con el convertidor reductor multifase. Dado que tanto el régimen permanente como el estado de transición del convertidor no están fuertemente relacionados con la frecuencia de conmutación, la frecuencia de conmutación puede ser reducida para el alto ancho de banda de la evolvente, la cual es la principal consideración de esta arquitectura. La optimización de la segunda arquitectura para más alto anchos de banda de la evolvente es presentada incluyendo el diseño del filtro de salida, la frecuencia de conmutación y el número de fases. El área de diseño del filtro está restringido por la transición rápida y el mínimo pulso del hardware. La rápida transición necesita un filtro pequeño pero la limitación del pulso mínimo del hardware lleva el diseño en el sentido contrario. La frecuencia de conmutación del convertidor afecta principalmente a la limitación del mínimo pulso y a las pérdidas de potencia. Con una menor frecuencia de conmutación, el ancho de pulso en la transición es más pequeño. El número de fases relativo a la aplicación específica puede ser optimizado en términos de la eficiencia global. Otro aspecto de la optimización es mejorar la estrategia de control. La transición permite seguir algunas partes de la evolvente que son más rápidas de lo que el hardware puede soportar al precio de complejidad. El nuevo método de sincronización de la transición incrementa la frecuencia de la transición, permitiendo que la tensión multinivel esté más cerca de la evolvente. Ambas estrategias permiten que el convertidor pueda seguir una evolvente con un ancho de banda más alto que la limitación de la etapa de potencia. El modelo de pérdidas del amplificador de evolvente se ha detallado y validado mediante medidas. El mecanismo de pérdidas de potencia del convertidor reductor tiene que incluir las transiciones en tiempo real, lo cual es diferente del clásico modelos de pérdidas de un convertidor reductor síncrono. Este modelo estima la eficiencia del sistema y juega un papel muy importante en el proceso de optimización. Finalmente, la segunda arquitectura del amplificador de evolvente se integra con el amplificador de clase F. La medida del sistema EER prueba el ahorro de energía con el amplificador de evolvente propuesto sin perjudicar la linealidad del sistema. ABSTRACT The requirement of delivering high data rates in modern wireless communication systems results in complex modulated RF signals with wide bandwidth and high peak-to-average ratio (PAPR). In order to guarantee the linearity performance, the conventional linear power amplifiers typically work at 4 to 10 dB back-off from the maximum output power, leading to low system efficiency. The envelope elimination and restoration (EER) and envelope tracking (ET) are two promising techniques to overcome the efficiency problem. In both EER and ET, it is challenging to design efficient envelope amplifier for wide bandwidth and high PAPR RF signals. An usual approach for envelope amplifier includes a high-efficiency switching power converter operating at a frequency higher than the RF signal's bandwidth. In this case, the power loss of converter caused by high switching operation becomes unbearable for system efficiency when signal bandwidth is very wide. The solution of this problem is the focus of this dissertation that presents two architectures of envelope amplifier: a hybrid series converter with slow-envelope technique and a multilevel converter based on a multiphase buck converter with the minimum time control. In the first architecture, a hybrid topology is composed of a switched buck converter and a linear regulator in series that work together to adjust the output voltage to track the envelope with accuracy. A slow envelope generation algorithm yields a waveform with limited slew rate that is lower than the maximum slew rate of the original envelope. The buck converter's output follows this waveform instead of the original envelope using lower switching frequency, because the waveform has not only reduced slew rate but also reduced bandwidth. In this way, the linear regulator used to filter the waveform has additional power loss. Depending on how much reduction of the slew rate of envelope in order to obtain that waveform, there is a trade-off between the power loss of buck converter related to the switching frequency and the power loss of linear regulator. The optimal point referring to the lowest total power loss of this envelope amplifier is identified with the help of a precise power loss model that is a combination of behavioral and analytic loss model. In addition, the output filter's effect on the response is analyzed. An extra parallel damping filter is needed to eliminate the resonant oscillation of output filter L and C, because the buck converter operates in open loop. The second architecture is a multilevel voltage tracking envelope amplifier. Unlike the converters using multi-sources, a multiphase buck converter is employed to generate the multilevel voltage. In the steady state, the buck converter operates at complete ripple cancellation points of duty cycle. The number of the voltage levels is equal to the number of phases according the characteristics of interleaved buck converter. In the transition, a minimum time control (MTC) for multiphase converter is originally proposed and developed for changing the output voltage of buck converter between different levels. As opposed to conventional minimum time control for multiphase converter with equivalent inductance, the proposed MTC considers the current ripple of each phase based on the fixed phase shift resulting in different control schemes among the phases. The advantage of this control is that all the phase current return to the steady state after the transition so that the next transition can be triggered very soon, which is very favorable for the application of multilevel voltage tracking. Besides, the control is independent on the load condition and not affected by the unbalance of phase current. Like the first architecture, there is also a linear stage with the same function, connected in series with the multiphase buck converter. Since both steady state and transition state of the converter are not strongly related to the switching frequency, it can be reduced for wide bandwidth envelope which is the main consideration of this architecture. The optimization of the second architecture for wider bandwidth envelope is presented including the output filter design, switching frequency and the number of phases. The filter design area is restrained by fast transition and the minimum pulse of hardware. The fast transition needs small filter but the minimum pulse of hardware limitation pushes the filter in opposite way. The converter switching frequency mainly affects the minimum pulse limitation and the power loss. With lower switching frequency, the pulse width in the transition is smaller. The number of phases related to specific application can be optimized in terms of overall efficiency. Another aspect of optimization is improving control strategy. Transition shift allows tracking some parts of envelope that are faster than the hardware can support at the price of complexity. The new transition synchronization method increases the frequency of transition, allowing the multilevel voltage to be closer to the envelope. Both control strategies push the converter to track wider bandwidth envelope than the limitation of power stage. The power loss model of envelope amplifier is detailed and validated by measurements. The power loss mechanism of buck converter has to include the transitions in real time operation, which is different from classical power loss model of synchronous buck converter. This model estimates the system efficiency and play a very important role in optimization process. Finally, the second envelope amplifier architecture is integrated with a Class F amplifier. EER system measurement proves the power saving with the proposed envelope amplifier without disrupting the linearity performance.

Páncreas artificial basado en un controlador Smith paramétrico

La diabetes mellitus es una enfermedad que se caracteriza por la nula o insuficiente producción de insulina, o la resistencia del organismo a la misma. La insulina es una hormona que ayuda a que la glucosa llegue a los tejidos periféricos y al sistema nervioso para suministrar energía. Actualmente existen dos tipos de terapias aplicada en tejido subcutáneo: mediante inyección múltiple realizada con plumas, y la otra es mediante infusión continua de insulina por bomba (CSII). El mayor problema de esta terapia son los retardos por la absorción, tanto de los carbohidratos como de la insulina, y los retardos introducidos por el sensor subcutáneo de glucosa que mide la glucosa del líquido intersticial, lo deseable es controlar la glucosa en sangre. Para intentar independizar al paciente de su enfermedad se está trabajando en el desarrollo del páncreas endocrino artificial (PEA) que dotaría al paciente de una bomba de insulina, un sensor de glucosa y un controlador, el cual se encargaría de la toma de decisiones de las infusiones de insulina. Este proyecto persigue el diseño de un regulador en modo de funcionamiento en CL, con el objetivo de conseguir una regulación óptima del nivel de glucosa en sangre. El diseño de dicho regulador va a ser acometido utilizando la teoría del control por modelo interno (IMC). Esta teoría se basa en la idea de que es necesario realimentar la respuesta de un modelo aproximado del proceso que se quiere controlar. La salida del modelo, comparada con la del proceso real nos da la incertidumbre del modelo de la planta, frente a la planta real. Dado que según la teoría del modelo interno, estas diferencias se dan en las altas frecuencias, la teoría IMC propone un filtro paso bajo como regulador en serie con la inversa del modelo de la planta para conseguir el comportamiento deseado. Además se pretende implementar un Predictor Smith para minimizar los efectos del retardo de la medida del sensor. En el proyecto para conseguir la viabilidad del PEA se ha adaptado el controlador IMC clásico utilizando las ganancias estáticas de un modelo de glucosa, a partir de la ruta subcutánea de infusión y la vía subcutánea de medida. El modo de funcionamiento del controlador en SCL mejora el rango de normoglucemia, necesitando la intervención del paciente indicando anticipadamente el momento de las ingestas al controlador. El uso de un control SCL con el Predictor de Smith mejora los resultados pues se añade al controlador una variable sobre las ingestas con la participación del paciente. ABSTRACT. Diabetes mellitus is a group of metabolic diseases in which a person has high blood sugar, due to the body does not produce enough insulin, or because cells do not respond to the insulin produced. The insulin is a hormone that helps the glucose to reach to outlying tissues and the nervous system to supply energy. There are currently two types of therapies applied in subcutaneous tissue: the first one consists in using the intensive therapy with an insulin pen, and the other one is by continuous subcutaneous insulin infusion (CSII). The biggest problems of this therapy are the delays caused by the absorption of carbohydrates and insulin, and the delays introduced by the subcutaneous glucose sensor that measures glucose from interstitial fluid, it is suitable to control glucose blood. To try to improve these patients quality of life, work is being done on the development of an artificial endocrine pancreas (PEA) consisting of a subcutaneous insulin pump, a subcutaneous glucose sensor and an algorithm of glucose control, which would calculate the bolus that the pump would infuse to patient. This project aims to design a controller for closed-loop therapy, with the objective of obtain an optimal regulation of blood glucose level. The design of this controller will be formed using the theory of internal model control (IMC). This theory is based on the uncertainties given by a model to feedback the system control. Output model, in comparison with the actual process gives the uncertainty of the plant model, compared to the real plant. Since the theory of the internal model, these differences occur at high frequencies, the theory proposes IMC as a low pass filter regulator in series with the inverse model of the plant to get the required behavior. In addition, it will implement a Smith Predictor to minimize the effects of the delay measurement sensor. The project for the viability of PEA has adapted the classic IMC controller using the gains static of glucose model from the subcutaneous infusion and subcutaneous measuring. In simulation the SemiClosed-Loop controller get on the normoglycemia range, requiring patient intervention announce the bolus priming connected to intakes. Using an SCL control with the Smith Predictor improves the outcome because a variable about intakes is added to the controller through patient intervention.

Understanding and improving the chemical vapor deposition process for solar grade silicon production

Esta Tesis Doctoral se centra en la investigación del proceso de producción de polisilicio para aplicaciones fotovoltaicas (FV) por la vía química; mediante procesos de depósito en fase vapor (CVD). El polisilicio para la industria FV recibe el nombre de silicio de grado solar (SoG Si). Por un lado, el proceso que domina hoy en día la producción de SoG Si está basado en la síntesis, destilación y descomposición de triclorosilano (TCS) en un reactor CVD -denominado reactor Siemens-. El material obtenido mediante este proceso es de muy alta pureza, pero a costa de un elevado consumo energético. Así, para alcanzar los dos principales objetivos de la industria FV basada en silicio, bajos costes de producción y bajo tiempo de retorno de la energía invertida en su fabricación, es esencial disminuir el consumo energético de los reactores Siemens. Por otro lado, una alternativa al proceso Siemens considera la descomposición de monosilano (MS) en un reactor de lecho fluidizado (FBR). Este proceso alternativo tiene un consumo energético mucho menor que el de un reactor Siemens, si bien la calidad del material resultante es también menor; pero ésta puede ser suficiente para la industria FV. A día de hoy los FBR deben aún abordar una serie de retos para que su menor consumo energético sea una ventaja suficiente comparada con otras desventajas de estos reactores. En resumen, la investigación desarrollada se centra en el proceso de depósito de polysilicio por CVD a partir de TCS -reactor Siemens-; pero también se investiga el proceso de producción de SoG Si en los FBR exponiendo las fortalezas y debilidades de esta alternativa. Para poder profundizar en el conocimiento del proceso CVD para la producción de polisilicio es clave el conocimiento de las reacciones químicas fundamentales y cómo éstas influencian la calidad del producto resultante, al mismo tiempo que comprender los fenómenos responsables del consumo energético. Por medio de un reactor Siemens de laboratorio en el que se llevan a cabo un elevado número de experimentos de depósito de polisilicio de forma satisfactoria se adquiere el conocimiento previamente descrito. Se pone de manifiesto la complejidad de los reactores CVD y de los problemas asociados a la pérdidas de calor de estos procesos. Se identifican las contribuciones a las pérdidas de calor de los reactores CVD, éstas pérdidas de calor son debidas principalmente a los fenómenos de radiación y, conducción y convección vía gases. En el caso de los reactores Siemens el fenómeno que contribuye en mayor medida al alto consumo energético son las pérdidas de calor por radiación, mientras que en los FBRs tanto la radiación como el calor transferido por transporte másico contribuyen de forma importante. Se desarrolla un modelo teórico integral para el cálculo de las pérdidas de calor en reactores Siemens. Este modelo está formado a su vez por un modelo para la evaluación de las pérdidas de calor por radiación y modelos para la evaluación de las pérdidas de calor por conducción y convección vía gases. Se ponen de manifiesto una serie de limitaciones del modelo de pérdidas de calor por radiación, y se desarrollan una serie de modificaciones que mejoran el modelo previo. El modelo integral se valida por medio un reactor Siemens de laboratorio, y una vez validado se presenta su extrapolación a la escala industrial. El proceso de conversión de TCS y MS a polisilicio se investiga mediante modelos de fluidodinámica computacional (CFD). Se desarrollan modelados CFD para un reactor Siemens de laboratorio y para un prototipo FBR. Los resultados obtenidos mediante simulación son comparados, en ambos casos, con resultados experimentales. Los modelos desarrollados se convierten en herramientas para la identificación de aquellos parámetros que tienen mayor influencia en los procesos CVD. En el caso del reactor Siemens, ambos modelos -el modelo integral y el modelado CFD permiten el estudio de los parámetros que afectan en mayor medida al elevado consumo energético, y mediante su análisis se sugieren modificaciones para este tipo de reactores que se traducirían en un menor número de kilovatios-hora consumidos por kilogramo de silicio producido. Para el caso del FBR, el modelado CFD permite analizar el efecto de una serie de parámetros sobre la distribución de temperaturas en el lecho fluidizado; y dicha distribución de temperaturas está directamente relacionada con los principales retos de este tipo de reactores. Por último, existen nuevos conceptos de depósito de polisilicio; éstos se aprovechan de la ventaja teórica de un mayor volumen depositado por unidad de tiempo -cuando una mayor superficie de depósito está disponible- con el objetivo de reducir la energía consumida por los reactores Siemens. Estos conceptos se exploran mediante cálculos teóricos y pruebas en el reactor Siemens de laboratorio. ABSTRACT This Doctoral Thesis comprises research on polysilicon production for photovoltaic (PV) applications through the chemical route: chemical vapor deposition (CVD) process. PV polysilicon is named solar grade silicon (SoG Si). On the one hand, the besetting CVD process for SoG Si production is based on the synthesis, distillation, and decomposition of thriclorosilane (TCS) in the so called Siemens reactor; high purity silicon is obtained at the expense of high energy consumption. Thus, lowering the energy consumption of the Siemens process is essential to achieve the two wider objectives for silicon-based PV technology: low production cost and low energy payback time. On the other hand, a valuable variation of this process considers the use of monosilane (MS) in a fluidized bed reactor (FBR); lower output material quality is obtained but it may fulfil the requirements for the PV industry. FBRs demand lower energy consumption than Siemens reactors but further research is necessary to address the actual challenges of these reactors. In short, this work is centered in polysilicon CVD process from TCS -Siemens reactor-; but it also offers insights on the strengths and weaknesses of the FBR for SoG Si production. In order to aid further development in polysilicon CVD is key the understanding of the fundamental reactions and how they influence the product quality, at the same time as to comprehend the phenomena responsible for the energy consumption. Experiments conducted in a laboratory Siemens reactor prove the satisfactory operation of the prototype reactor, and allow to acquire the knowledge that has been described. Complexity of the CVD reactors is stated and the heat loss problem associated with polysilicon CVD is addressed. All contributions to the energy consumption of Siemens reactors and FBRs are put forward; these phenomena are radiation and, conduction and convection via gases heat loss. In a Siemens reactor the major contributor to the energy consumption is radiation heat loss; in case of FBRs radiation and heat transfer due to mass transport are both important contributors. Theoretical models for radiation, conduction and convection heat loss in a Siemens reactor are developed; shaping a comprehensive theoretical model for heat loss in Siemens reactors. Limitations of the radiation heat loss model are put forward, and a novel contribution to the existing model is developed. The comprehensive model for heat loss is validated through a laboratory Siemens reactor, and results are scaled to industrial reactors. The process of conversion of TCS and MS gases to solid polysilicon is investigated by means of computational fluid-dynamics models. CFD models for a laboratory Siemens reactor and a FBR prototype are developed. Simulated results for both CVD prototypes are compared with experimental data. The developed models are used as a tool to investigate the parameters that more strongly influence both processes. For the Siemens reactors, both, the comprehensive theoretical model and the CFD model allow to identify the parameters responsible for the great power consumption, and thus, suggest some modifications that could decrease the ratio kilowatts-hour per kilogram of silicon produced. For the FBR, the CFD model allows to explore the effect of a number of parameters on the thermal distribution of the fluidized bed; that is the main actual challenge of these type of reactors. Finally, there exist new deposition surface concepts that take advantage of higher volume deposited per time unit -when higher deposition area is available- trying to reduce the high energy consumption of the Siemens reactors. These novel concepts are explored by means of theoretical calculations and tests in the laboratory Siemens prototype.

High-resolution structure of hair-cell tip links

Transduction-channel gating by hair cells apparently requires a gating spring, an elastic element that transmits force to the channels. To determine whether the gating spring is the tip link, a filament interconnecting two stereocilia along the axis of mechanical sensitivity, we examined the tip link's structure at high resolution by using rapid-freeze, deep-etch electron microscopy. We found that the tip link is a right-handed, coiled double filament that usually forks into two branches before contacting a taller stereocilium; at the other end, several short filaments extend to the tip link from the shorter stereocilium. The structure of the tip link suggests that it is either a helical polymer or a braided pair of filamentous macromolecules and is thus likely to be relatively stiff and inextensible. Such behavior is incompatible with the measured elasticity of the gating spring, suggesting that the gating spring instead lies in series with the helical segment of the tip link.