977 resultados para Dual task paradigm


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Dissertação apresentada à Escola Superior de Educação de Lisboa para obtenção do grau de mestre em Educação Matemática na Educação Pré-escolar e nos 1º e 2º Ciclos do Ensino Básico

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The aim of this study was to analyze the influence of position and pauses on muscle activity and fatigue during the task of ironing. Ten female participants performed the task of ironing in two different positions (standing and sitting) for 10 min each with a 1-min pause at the end of each task. Muscle activity and fatigue from the upper trapezium, anterior deltoid, and pectoralis major were analyzed using surface electromyography. The results showed that the positions had no significant influence on muscle activity; nevertheless, they had significant influence on muscular fatigue. In addition, the pauses were possibly beneficial in decreasing the muscle fatigue, but the results were not conclusive.

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In this paper we survey the most relevant results for the prioritybased schedulability analysis of real-time tasks, both for the fixed and dynamic priority assignment schemes. We give emphasis to the worst-case response time analysis in non-preemptive contexts, which is fundamental for the communication schedulability analysis. We define an architecture to support priority-based scheduling of messages at the application process level of a specific fieldbus communication network, the PROFIBUS. The proposed architecture improves the worst-case messages’ response time, overcoming the limitation of the first-come-first-served (FCFS) PROFIBUS queue implementations.

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Many-core platforms based on Network-on-Chip (NoC [Benini and De Micheli 2002]) present an emerging technology in the real-time embedded domain. Although the idea to group the applications previously executed on separated single-core devices, and accommodate them on an individual many-core chip offers various options for power savings, cost reductions and contributes to the overall system flexibility, its implementation is a non-trivial task. In this paper we address the issue of application mapping onto a NoCbased many-core platform when considering fundamentals and trends of current many-core operating systems, specifically, we elaborate on a limited migrative application model encompassing a message-passing paradigm as a communication primitive. As the main contribution, we formulate the problem of real-time application mapping, and propose a three-stage process to efficiently solve it. Through analysis it is assured that derived solutions guarantee the fulfilment of posed time constraints regarding worst-case communication latencies, and at the same time provide an environment to perform load balancing for e.g. thermal, energy, fault tolerance or performance reasons.We also propose several constraints regarding the topological structure of the application mapping, as well as the inter- and intra-application communication patterns, which efficiently solve the issues of pessimism and/or intractability when performing the analysis.

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Dynamic parallel scheduling using work-stealing has gained popularity in academia and industry for its good performance, ease of implementation and theoretical bounds on space and time. Cores treat their own double-ended queues (deques) as a stack, pushing and popping threads from the bottom, but treat the deque of another randomly selected busy core as a queue, stealing threads only from the top, whenever they are idle. However, this standard approach cannot be directly applied to real-time systems, where the importance of parallelising tasks is increasing due to the limitations of multiprocessor scheduling theory regarding parallelism. Using one deque per core is obviously a source of priority inversion since high priority tasks may eventually be enqueued after lower priority tasks, possibly leading to deadline misses as in this case the lower priority tasks are the candidates when a stealing operation occurs. Our proposal is to replace the single non-priority deque of work-stealing with ordered per-processor priority deques of ready threads. The scheduling algorithm starts with a single deque per-core, but unlike traditional work-stealing, the total number of deques in the system may now exceed the number of processors. Instead of stealing randomly, cores steal from the highest priority deque.

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I (Prática Pedagógica) - Neste relatório de estágio apresenta-se uma caracterização do Conservatório de Música de Santarém (CMS). Dá-se a conhecer um pouco da sua história, o seu funcionamento e os seus objetivos pedagógicos. Caracterizam-se também os alunos que participam no estágio e faz-se uma pequena descrição dos seus percursos académicos; suas influências, motivações e expectativas. Nas práticas desenvolvidas apresentam-se os princípios pedagógicos – A Motivação, como condição fundamental para o sucesso escolar dos alunos; e ainda a importância da aquisição de competências metacognitivas, ao permitirem a reflexão sobre os processos de aprendizagem. É feita uma descrição sobre as estratégias que o professor deve adotar com o objetivo de obter a motivação dos alunos; e apresentam-se os objetivos pedagógicos propostos para este estágio. Por último é feita uma análise do trabalho desenvolvido com os alunos e uma análise crítica da atividade docente, onde a criatividade, a autoavaliação e a reflexão devem estar sempre presentes no íntimo do professor. Ainda no encerramento da secção pedagógica dá-se conta do novo paradigma do ensino vocacional de música, após a Portaria nº 691/2009 de 25 de junho, e a necessidade do professor se adaptar a esta nova realidade.

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Consider the problem of assigning real-time tasks on a heterogeneous multiprocessor platform comprising two different types of processors — such a platform is referred to as two-type platform. We present two linearithmic timecomplexity algorithms, SA and SA-P, each providing the follow- ing guarantee. For a given two-type platform and a given task set, if there exists a feasible task-to-processor-type assignment such that tasks can be scheduled to meet deadlines by allowing them to migrate only between processors of the same type, then (i) using SA, it is guaranteed to find such a feasible task-to- processor-type assignment where the same restriction on task migration applies but given a platform in which processors are 1+α/2 times faster and (ii) SA-P succeeds in finding 2 a feasible task-to-processor assignment where tasks are not allowed to migrate between processors but given a platform in which processors are 1+α/times faster, where 0<α≤1. The parameter α is a property of the task set — it is the maximum utilization of any task which is less than or equal to 1.

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A large part of power dissipation in a system is generated by I/O devices. Increasingly these devices provide power saving mechanisms, inter alia to enhance battery life. While I/O device scheduling has been studied in the past for realtime systems, the use of energy resources by these scheduling algorithms may be improved. These approaches are crafted considering a very large overhead of device transitions. Technology enhancements have allowed the hardware vendors to reduce the device transition overhead and energy consumption. We propose an intra-task device scheduling algorithm for real time systems that allows to shut-down devices while ensuring system schedulability. Our results show an energy gain of up to 90% when compared to the techniques proposed in the state-of-the-art.

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This paper presents part of a study that aimed to understand how the emergence of algebraic thinking takes place in a group of four-year-old children, as well as its relationship to the exploration of children‘s literature. To further deepen and guide this study the following research questions were formulated: (1) How can children's literature help preschoolers identify patterns?; (2) What strategies and thinking processes do children use to create, analyze and generalize repeating and growing patterns?; (3) What strategies do children use to identify the unit of repeat of a pattern? and (4) What factors influence the identification of patterns? The paper focuses only on the strategies and thinking processes that children use to create, analyze and generalize repeating patterns. The present study was developed with a group of 14 preschoolers in a private school in Lisbon, and it was carried out with all children. In order to develop the research, a qualitative research methodology under the interpretive paradigm was chosen, emphasizing meanings and processes. The researcher took the dual role of teacher-researcher, conducting the study with her own group and in her own natural environment. Participant observation and document analysis (audio and video recordings, photos and children productions) were used as data collection methods. Data collection took place from October 2013 to April 2014. The results of the study indicate that children master the concept of repeating patterns, and they are able to identify the unit of repeat, create and analyze various repeating patterns, evolving from simpler to more complex forms.

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Consider the problem of scheduling a set of implicit-deadline sporadic tasks to meet all deadlines on a heterogeneous multiprocessor platform. We use an algorithm proposed in [1] (we refer to it as LP-EE) from state-of-the-art for assigning tasks to heterogeneous multiprocessor platform and (re-)prove its performance guarantee but for a stronger adversary.We conjecture that if a task set can be scheduled to meet deadlines on a heterogeneous multiprocessor platform by an optimal task assignment scheme that allows task migrations then LP-EE meets deadlines as well with no migrations if given processors twice as fast. We illustrate this with an example.

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Consider the problem of scheduling a set of implicit-deadline sporadic tasks to meet all deadlines on a heterogeneous multiprocessor platform. We consider a restricted case where the maximum utilization of any task on any processor in the system is no greater than one. We use an algorithm proposed in [1] (we refer to it as LP-EE) from state-of-the-art for assigning tasks to heterogeneous multiprocessor platform and (re-)prove its performance guarantee for this restricted case but for a stronger adversary. We show that if a task set can be scheduled to meet deadlines on a heterogeneous multiprocessor platform by an optimal task assignment scheme that allows task migrations then LP-EE meets deadlines as well with no migrations if given processors twice as fast.

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In this paper we discuss challenges and design principles of an implementation of slot-based tasksplitting algorithms into the Linux 2.6.34 version. We show that this kernel version is provided with the required features for implementing such scheduling algorithms. We show that the real behavior of the scheduling algorithm is very close to the theoretical. We run and discuss experiments on 4-core and 24-core machines.

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Consider the problem of scheduling a set of sporadic tasks on a multiprocessor system to meet deadlines using a task-splitting scheduling algorithm. Task-splitting (also called semi-partitioning) scheduling algorithms assign most tasks to just one processor but a few tasks are assigned to two or more processors, and they are dispatched in a way that ensures that a task never executes on two or more processors simultaneously. A particular type of task-splitting algorithms, called slot-based task-splitting dispatching, is of particular interest because of its ability to schedule tasks with high processor utilizations. Unfortunately, no slot-based task-splitting algorithm has been implemented in a real operating system so far. In this paper we discuss and propose some modifications to the slot-based task-splitting algorithm driven by implementation concerns, and we report the first implementation of this family of algorithms in a real operating system running Linux kernel version 2.6.34. We have also conducted an extensive range of experiments on a 4-core multicore desktop PC running task-sets with utilizations of up to 88%. The results show that the behavior of our implementation is in line with the theoretical framework behind it.

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Consider the problem of scheduling a set of sporadic tasks on a multiprocessor system to meet deadlines using a tasksplitting scheduling algorithm. Task-splitting (also called semipartitioning) scheduling algorithms assign most tasks to just one processor but a few tasks are assigned to two or more processors, and they are dispatched in a way that ensures that a task never executes on two or more processors simultaneously. A certain type of task-splitting algorithms, called slot-based task-splitting, is of particular interest because of its ability to schedule tasks at high processor utilizations. We present a new schedulability analysis for slot-based task-splitting scheduling algorithms that takes the overhead into account and also a new task assignment algorithm.

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We present a 12*(1+|R|/(4m))-speed algorithm for scheduling constrained-deadline sporadic real-time tasks on a multiprocessor comprising m processors where a task may request one of |R| sequentially-reusable shared resources.