Air traffic controller reactions to computer assistance

The research was instigated by the Civil Aviation Authority (CAA) to examine the implications for air traffic controllers' (ATCO) job satisfaction of the possible introduction of systems incorporating computer-assisted decision making. Additional research objectives were to assess the possible costs of reductions in ATCO job satisfaction, and to recommend appropriate task allocation between ATCOs and computer for future systems design (Chapter 1). Following a review of the literature (Chapter 2) it is argued that existing approaches to systems and job design do not allow for a sufficiently early consideration of employee needs and satisfactions in the design of complex systems. The present research develops a methodology for assessing affective reactions to an existing system as a basis for making reommendations for future systems design (Chapter 3). The method required analysis of job content using two techniques: (a) task analysis (Chapter 4.1) and (b) the Job Diagnostic Survey (JDS). ATCOs' affective reactions to the several operational positions on which they work were investigated at three levels of detail: (a) Reactions to positions, obtained by ranking techniques (Chapter 4.2); (b) Reactions to job characteristics, obtained by use of JDS (Chapter 4.3); and (c) Reactions to tasks, obtained by use of Repertory Grid technique (Chapter 4.4). The conclusion is drawn that ATCOs' motivation and satisfaction is greatly dependent on the presence of challenge, often through tasks requiring the use of decision making and other cognitive skills. Results suggest that the introduction of systems incorporating computer-assisted decision making might result in financial penalties for the CAA and significant reductions in job satisfaction for ATCOs. General recommendations are made for allocation of tasks in future systems design (Chapter 5).

The application of H controller synthesis to high speed independent drive systems

This thesis describes work completed on the application of H controller synthesis to the design of controllers for single axis high speed independent drive design examples. H controller synthesis was used in a single controller format and in a self-tuning regulator, a type of adaptive controller. Three types of industrial design examples were attempted using H controller synthesis, both in simulation and on a Drives Test Facility at Aston University. The results were benchmarked against a Proportional, Integral and Derivative (PID) with velocity feedforward controller (VFF), the industrial standard for this application. An analysis of the differences between a H and PID with VFF controller was completed. A direct-form H controller was determined for a limited class of weighting function and plants which shows the relationship between the weighting function, nominal plant and the controller parameters. The direct-form controller was utilised in two ways. Firstly it allowed the production of simple guidelines for the industrial design of H controllers. Secondly it was used as the controller modifier in a self-tuning regulator (STR). The STR had a controller modification time (including nominal model parameter estimation) of 8ms. A Set-Point Gain Scheduling (SPGS) controller was developed and applied to an industrial design example. The applicability of each control strategy, PID with VFF, H, SPGS and STR, was investigated and a set of general guidelines for their use was determined. All controllers developed were implemented using standard industrial equipment.

A learning feed-forward current controller for linear reciprocating vapor compressors

Direct-drive linear reciprocating compressors offer numerous advantages over conventional counterparts which are usually driven by a rotary induction motor via a crank shaft. However, to ensure efficient and reliable operation under all conditions, it is essential that motor current of a linear compressor follows a sinusoidal current command with a frequency which matches the system resonant frequency. The design of a high-performance current controller for linear compressor drive presents a challenge since the system is highly nonlinear, and an effective solution must be low cost. In this paper, a learning feed-forward current controller for the linear compressors is proposed. It comprises a conventional feedback proportional-integral controller and a feed-forward B-spline neural network (BSNN). The feed-forward BSNN is trained online and in real time in order to minimize the current tracking error. Extensive simulation and experiment results with a prototype linear compressor show that the proposed current controller exhibits high steady state and transient performance. © 2009 IEEE.

The analogue computer simulation of integrated chemical plant and controller systems

DUE TO COPYRIGHT RESTRICTIONS ONLY AVAILABLE FOR CONSULTATION AT ASTON UNIVERSITY LIBRARY SERVICES WITH PRIOR ARRANGEMENT

A hybrid current controller for linear reciprocating vapor compressors

Direct-drive linear reciprocating compressors offer numerous advantages over conventional counterparts which are usually driven by a rotary induction motor via crank shaft However, to ensure efficient and reliable operation under all conditions, it is essential that the motor current of the linear compressor follows a sinusoidal command profile with a frequency which matches the system resonant frequency. This paper describes a hybrid current controller for the linear compressors. It comprises a conventional proportional-integral (PI) controller, and a B-spline neural network compensator which is trained on-line and in real-time in order to minimize the current tracking error under all conditions with uncertain disturbances. It has been shown that the hybrid current controller has a superior steady-state and transient performance over the conventional carrier based PI controller. The performance of the proposed hybrid controller has been demonstrated by extensive simulations and experiments. It has also been shown that the linear compressor operates stably under the current feedback control and the piston stroke can be adjusted by varying the amplitude of the current command. © 2007 IEEE.

Fopid Controller Design for Robust Performance Using Particle Swarm Optimization

Mathematics Subject Classification: 26A33; 93C15, 93C55, 93B36, 93B35, 93B51; 03B42; 70Q05; 49N05

A Bayesian approach to modeling the conditional density of the inverse controller

The inverse controller is traditionally assumed to be a deterministic function. This paper presents a pedagogical methodology for estimating the stochastic model of the inverse controller. The proposed method is based on Bayes' theorem. Using Bayes' rule to obtain the stochastic model of the inverse controller allows the use of knowledge of uncertainty from both the inverse and the forward model in estimating the optimal control signal. The paper presents the methodology for general nonlinear systems. For illustration purposes, the proposed methodology is applied to linear Gaussian systems. © 2004 IEEE.

Bandwidth programmable optical Nyquist pulse generation in passively mode-locked fiber laser

We propose and numerically demonstrate a novel simple method to produce optical Nyquist pulses based on pulse shaping in a passively mode-locked fiber laser with an in-cavity flat-top spectral filter. The proposed scheme takes advantage of the nonlinear in-cavity dynamics of the laser and offers the possibility to generate high-quality sinc-shaped pulses with widely tunable bandwidth directly from the laser oscillator. We also show that the use of a filter with a corrective convex profile relaxes the need for large nonlinear phase accumulation in the cavity by offsetting the concavity of the nonlinearly broadened pulse spectrum.

Internet Protocol Television (IPTV) controller realization with Very Large Scale Integration (VLSI) modules

Internet Protocol Television (IPTV) is a system where a digital television service is delivered by using Internet Protocol over a network infrastructure. There is considerable confusion and concern about the IPTV, since two different technologies have to be mended together to provide the end customers with some thing better than the conventional television. In this research, functional architecture of the IPTV system was investigated. Very Large Scale Integration based system for streaming server controller were designed and different ways of hosting a web server which can be used to send the control signals to the streaming server controller were studied. The web server accepts inputs from the keyboard and FPGA board switches and depending on the preset configuration the server will open a selected web page and also sends the control signals to the streaming server controller. It was observed that the applications run faster on PowerPC since it is embedded into the FPGA. Commercial market and Global deployment of IPTV were discussed.

Field programmable gate array based target detection and gesture recognition

The move from Standard Definition (SD) to High Definition (HD) represents a six times increases in data, which needs to be processed. With expanding resolutions and evolving compression, there is a need for high performance with flexible architectures to allow for quick upgrade ability. The technology advances in image display resolutions, advanced compression techniques, and video intelligence. Software implementation of these systems can attain accuracy with tradeoffs among processing performance (to achieve specified frame rates, working on large image data sets), power and cost constraints. There is a need for new architectures to be in pace with the fast innovations in video and imaging. It contains dedicated hardware implementation of the pixel and frame rate processes on Field Programmable Gate Array (FPGA) to achieve the real-time performance. ^ The following outlines the contributions of the dissertation. (1) We develop a target detection system by applying a novel running average mean threshold (RAMT) approach to globalize the threshold required for background subtraction. This approach adapts the threshold automatically to different environments (indoor and outdoor) and different targets (humans and vehicles). For low power consumption and better performance, we design the complete system on FPGA. (2) We introduce a safe distance factor and develop an algorithm for occlusion occurrence detection during target tracking. A novel mean-threshold is calculated by motion-position analysis. (3) A new strategy for gesture recognition is developed using Combinational Neural Networks (CNN) based on a tree structure. Analysis of the method is done on American Sign Language (ASL) gestures. We introduce novel point of interests approach to reduce the feature vector size and gradient threshold approach for accurate classification. (4) We design a gesture recognition system using a hardware/ software co-simulation neural network for high speed and low memory storage requirements provided by the FPGA. We develop an innovative maximum distant algorithm which uses only 0.39% of the image as the feature vector to train and test the system design. Database set gestures involved in different applications may vary. Therefore, it is highly essential to keep the feature vector as low as possible while maintaining the same accuracy and performance^

Gesture Recognition Using Neural Networks Based on HW/SW Cosimulation Platform

Hardware/software (HW/SW) cosimulation integrates software simulation and hardware simulation simultaneously. Usually, HW/SW co-simulation platform is used to ease debugging and verification for very large-scale integration (VLSI) design. To accelerate the computation of the gesture recognition technique, an HW/SW implementation using field programmable gate array (FPGA) technology is presented in this paper. The major contributions of this work are: (1) a novel design of memory controller in the Verilog Hardware Description Language (Verilog HDL) to reduce memory consumption and load on the processor. (2) The testing part of the neural network algorithm is being hardwired to improve the speed and performance. The American Sign Language gesture recognition is chosen to verify the performance of the approach. Several experiments were carried out on four databases of the gestures (alphabet signs A to Z). (3) The major benefit of this design is that it takes only few milliseconds to recognize the hand gesture which makes it computationally more efficient.

Design and development of a one-degree-of-freedom force-reflecting manual controller prototype for teleoperation

The present research is carried out from the viewpoint of primarily space applications where human lives may be in danger if they are to work under these conditions. This work proposes to develop a one-degree-of-freedom (1-DOF) force-reflecting manual controller (FRMC) prototype for teleoperation, and address the effects of time delays commonly found in space applications where the control is accomplished via the earth-based control stations. To test the FRMC, a mobile robot (PPRK) and a slider-bar were developed and integrated to the 1-DOF FRMC. The software developed in Visual Basic is able to telecontrol any platform that uses an SV203 controller through the internet and it allows the remote system to send feedback information which may be in the form of visual or force signals. Time delay experiments were conducted on the platform and the effects of time delay on the FRMC system operation have been studied and delineated.

Design and construction of a portable force-reflecting manual controller for teleoperation systems

A man-machine system called teleoperator system has been developed to work in hazardous environments such as nuclear reactor plants. Force reflection is a type of force feedback in which forces experienced by the remote manipulator are fed back to the manual controller. In a force-reflecting teleoperation system, the operator uses the manual controller to direct the remote manipulator and receives visual information from a video image and/or graphical animation on the computer screen. This thesis presents the design of a portable Force-Reflecting Manual Controller (FRMC) for the teleoperation of tasks such as hazardous material handling, waste cleanup, and space-related operations. The work consists of the design and construction of a prototype 1-Degree-of-Freedom (DOF) FRMC, the development of the Graphical User Interface (GUI), and system integration. Two control strategies - PID and fuzzy logic controllers are developed and experimentally tested. The system response of each is analyzed and evaluated. In addition, the concept of a telesensation system is introduced, and a variety of design alternatives of a 3-DOF FRMC are proposed for future development.

Protótipo de rastreador solar de um eixo baseado em microcontrolador

The increase in the efficiency of photo-voltaic systems has been the object of various studies the past few years. One possible way to increase the power extracted by a photovoltaic panel is the solar tracking, performing its movement in order to follow the sun’s path. One way to activate the tracking system is using an electric induction motor, which should have sufficient torque and low speed, ensuring tracking accuracy. With the use of voltage source inverters and logic devices that generate the appropriate switching is possible to obtain the torque and speed required for the system to operate. This paper proposes the implementation of a angular position sensor and a driver to be applied in solar tracker built at a Power Electronics and Renewable Energies Laboratory, located in UFRN. The speed variation of the motor is performed via a voltage source inverter whose PWM command to actuate their keys will be implemented in an FPGA (Field Programmable Gate Array) device and a TM4C microcontroller. A platform test with an AC induction machine of 1.5 CV was assembled for the comparative testing. The angular position sensor of the panel is implemented in a ATMega328 microcontroller coupled to an accelerometer, commanded by an Arduino prototyping board. The solar position is also calculated by the microcontroller from the geographic coordinates of the site where it was placed, and the local time and date obtained from an RTC (Real-Time Clock) device. A prototype of a solar tracker polar axis moved by a DC motor was assembled to certify the operation of the sensor and to check the tracking efficiency.

Implementação de uma matriz de neurônios dinamicamente reconfigurável para descrição de topologias de redes neurais artificiais multilayer perceptrons

The Artificial Neural Networks (ANN), which is one of the branches of Artificial Intelligence (AI), are being employed as a solution to many complex problems existing in several areas. To solve these problems, it is essential that its implementation is done in hardware. Among the strategies to be adopted and met during the design phase and implementation of RNAs in hardware, connections between neurons are the ones that need more attention. Recently, are RNAs implemented both in application specific integrated circuits's (Application Specific Integrated Circuits - ASIC) and in integrated circuits configured by the user, like the Field Programmable Gate Array (FPGA), which have the ability to be partially rewritten, at runtime, forming thus a system Partially Reconfigurable (SPR), the use of which provides several advantages, such as flexibility in implementation and cost reduction. It has been noted a considerable increase in the use of FPGAs for implementing ANNs. Given the above, it is proposed to implement an array of reconfigurable neurons for topologies Description of artificial neural network multilayer perceptrons (MLPs) in FPGA, in order to encourage feedback and reuse of neural processors (perceptrons) used in the same area of the circuit. It is further proposed, a communication network capable of performing the reuse of artificial neurons. The architecture of the proposed system will configure various topologies MLPs networks through partial reconfiguration of the FPGA. To allow this flexibility RNAs settings, a set of digital components (datapath), and a controller were developed to execute instructions that define each topology for MLP neural network.