923 resultados para variable power, cycle-run, stochastic cycling


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In this paper, we report an analysis of the protein sequence length distribution for 13 bacteria, four archaea and one eukaryote whose genomes have been completely sequenced, The frequency distribution of protein sequence length for all the 18 organisms are remarkably similar, independent of genome size and can be described in terms of a lognormal probability distribution function. A simple stochastic model based on multiplicative processes has been proposed to explain the sequence length distribution. The stochastic model supports the random-origin hypothesis of protein sequences in genomes. Distributions of large proteins deviate from the overall lognormal behavior. Their cumulative distribution follows a power-law analogous to Pareto's law used to describe the income distribution of the wealthy. The protein sequence length distribution in genomes of organisms has important implications for microbial evolution and applications. (C) 1999 Elsevier Science B.V. All rights reserved.

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An in-situ power monitoring technique for Dynamic Voltage and Threshold scaling (DVTS) systems is proposed which measures total power consumed by load circuit using sleep transistor acting as power sensor. Design details of power monitor are examined using simulation framework in UMC 90nm CMOS process. Experimental results of test chip fabricated in AMS 0.35µm CMOS process are presented. The test chip has variable activity between 0.05 and 0.5 and has PMOS VTH control through nWell contact. Maximum resolution obtained from power monitor is 0.25mV. Overhead of power monitor in terms of its power consumption is 0.244 mW (2.2% of total power of load circuit). Lastly, power monitor is used to demonstrate closed loop DVTS system. DVTS algorithm shows 46.3% power savings using in-situ power monitor.

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Redox supercapacitors using polyaniline (PANI) coated. stainless-steel (SS) electrodes have been assembled and characterized. PANI has been deposited on SS substrate by a potentiodynamic method from an acidic electrolyte which contains aniline monomer. By employing stacks of electrodes, each with a geometrical area of 24 cm(2), in acidic perchlorate electrolyte, a capacitance value of about 450 F has been obtained over a long cycle-life. Characterization studies have been carried out by galvanostatic charge-discharge cycling of the capacitors singly, as well as in series and parallel configurations. Various electrical parameters have been evaluated. Use of the capacitors in parallel with a battery for pulse-power loads. and also working of a toy fan connected to the charged capacitors have been demonstrated. A specific capacitance value of about 1300 F g(-1) of PANI has been obtained at a discharge power of about 0.5 kW kg(-1). This value is several times higher than those reported in the literature for PANI and is, perhaps, the highest value known for a capacitor material. The inexpensive SS substrate and the high-capacitance PANI are favorable factors for commercial exploitation. (C) 2002 Elsevier Science B.V. All rights reserved.

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The aim of this paper is to investigate the steady state response of beams under the action of random support motions. The study is of relevance in the context of earthquake response of extended land based structures such as pipelines and long span bridges, and, secondary systems such as piping networks in nuclear power plant installations. The following complicating features are accounted for in the response analysis: (a) differential support motions: this is characterized in terms of cross power spectral density functions associated with distinct support motions, (b) nonlinear support conditions, and (c) stochastically inhomogeneous stiffness and mass variations of the beam structure; questions on non-Gaussian models for these variations are considered. The method of stochastic finite elements is combined with equivalent linearization technique and Monte Carlo simulations to obtain response moments.

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This paper describes the design of a power efficient microarchitecture for transient fault detection in chip multiprocessors (CMPs) We introduce a new per-core dynamic voltage and frequency scaling (DVFS) algorithm for our architecture that significantly reduces power dissipation for redundant execution with a minimal performance overhead. Using cycle accurate simulation combined with a simple first order power model, we estimate that our architecture reduces dynamic power dissipation in the redundant core by an mean value of 79% and a maximum of 85% with an associated mean performance overhead of only 1:2%

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We present two efficient discrete parameter simulation optimization (DPSO) algorithms for the long-run average cost objective. One of these algorithms uses the smoothed functional approximation (SFA) procedure, while the other is based on simultaneous perturbation stochastic approximation (SPSA). The use of SFA for DPSO had not been proposed previously in the literature. Further, both algorithms adopt an interesting technique of random projections that we present here for the first time. We give a proof of convergence of our algorithms. Next, we present detailed numerical experiments on a problem of admission control with dependent service times. We consider two different settings involving parameter sets that have moderate and large sizes, respectively. On the first setting, we also show performance comparisons with the well-studied optimal computing budget allocation (OCBA) algorithm and also the equal allocation algorithm. Note to Practitioners-Even though SPSA and SFA have been devised in the literature for continuous optimization problems, our results indicate that they can be powerful techniques even when they are adapted to discrete optimization settings. OCBA is widely recognized as one of the most powerful methods for discrete optimization when the parameter sets are of small or moderate size. On a setting involving a parameter set of size 100, we observe that when the computing budget is small, both SPSA and OCBA show similar performance and are better in comparison to SFA, however, as the computing budget is increased, SPSA and SFA show better performance than OCBA. Both our algorithms also show good performance when the parameter set has a size of 10(8). SFA is seen to show the best overall performance. Unlike most other DPSO algorithms in the literature, an advantage with our algorithms is that they are easily implementable regardless of the size of the parameter sets and show good performance in both scenarios.

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The literature on pricing implicitly assumes an "infinite data" model, in which sources can sustain any data rate indefinitely. We assume a more realistic "finite data" model, in which sources occasionally run out of data; this leads to variable user data rates. Further, we assume that users have contracts with the service provider, specifying the rates at which they can inject traffic into the network. Our objective is to study how prices can be set such that a single link can be shared efficiently and fairly among users in a dynamically changing scenario where a subset of users occasionally has little data to send. User preferences are modelled by concave increasing utility functions. Further, we introduce two additional elements: a convex increasing disutility function and a convex increasing multiplicative congestion-penally function. The disutility function takes the shortfall (contracted rate minus present rate) as its argument, and essentially encourages users to send traffic at their contracted rates, while the congestion-penalty function discourages heavy users from sending excess data when the link is congested. We obtain simple necessary and sufficient conditions on prices for fair and efficient link sharing; moreover, we show that a single price for all users achieves this. We illustrate the ideas using a simple experiment.

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Large instruction windows and issue queues are key to exploiting greater instruction level parallelism in out-of-order superscalar processors. However, the cycle time and energy consumption of conventional large monolithic issue queues are high. Previous efforts to reduce cycle time segment the issue queue and pipeline wakeup. Unfortunately, this results in significant IPC loss. Other proposals which address energy efficiency issues by avoiding only the unnecessary tag-comparisons do not reduce broadcasts. These schemes also increase the issue latency.To address both these issues comprehensively, we propose the Scalable Lowpower Issue Queue (SLIQ). SLIQ augments a pipelined issue queue with direct indexing to mitigate the problem of delayed wakeups while reducing the cycle time. Also, the SLIQ design naturally leads to significant energy savings by reducing both the number of tag broadcasts and comparisons required.A 2 segment SLIQ incurs an average IPC loss of 0.2% over the entire SPEC CPU2000 suite, while achieving a 25.2% reduction in issue latency when compared to a monolithic 128-entry issue queue for an 8-wide superscalar processor. An 8 segment SLIQ improves scalability by reducing the issue latency by 38.3% while incurring an IPC loss of only 2.3%. Further, the 8 segment SLIQ significantly reduces the energy consumption and energy-delay product by 48.3% and 67.4% respectively on average.

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In the recent years, there has been a trend to run metallic pipelines carrying petroleum products and high voltage AC power lines parallel to each other in a relatively narrow strip of land. Due to this sharing of the right-of-way, verhead AC power line electric field may induce voltages on the metallic pipelines running in close vicinity leading to serious adverse effects. In this paper, the induced voltages on metallic pipelines running in close vicinity of high voltage power transmission lines have been computed. Before computing the induced voltages, an optimum configuration of the phase conductors based on the lowest conductor surface gradient and field under transmission line has been arrived at. This paper reports the conductor surface field gradients calculated for the various configurations. Also the electric fields under transmission line, for single circuit and double circuit (various phase arrangements) have been analyzed. Based on the above results, an optimum configuration giving the lowest field under the power line as well as the lowest conductor surface gradient has been arrived at and for this configuration, induced voltage on the pipeline has been computed using the Charge Simulation Method (CSM). For comparison, induced voltages on the pipeline has been computed for the various other phase configurations also.

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We propose a Low Noise Amplifier (LNA) architecture for power scalable receiver front end (FE) for Zigbee. The motivation for power scalable receiver is to enable minimum power operation while meeting the run-time performance needed. We use simple models to find empirical relations between the available signal and interference levels to come up with required Noise Figure (NF) and 3rd order Intermodulation Product (IIP3) numbers. The architecture has two independent digital knobs to control the NF and IIP3. Acceptable input match while using adaptation has been achieved by using an Active Inductor configuration for the source degeneration inductor of the LNA. The low IF receiver front end (LNA with I and Q mixers) was fabricated in 130nm RFCMOS process and tested.

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High voltage power supplies for radar applications are investigated, which are subjected to pulsed load (125 kHz and 10% duty cycle) with stringent specifications (<0.01% regulation, efficiency>85%, droop<0.5 V/micro-sec.). As good regulation and stable operation requires the converter to be switched at much higher frequency than the pulse load frequency, transformer poses serious problems of insulation failure and higher losses. This paper proposes a methodology to tackle the problems associated with this type of application. Synchronization of converter switching with load pulses enables the converter to switch at half the load switching frequency. Low switching frequency helps in ensuring safety of HV transformer insulation and reduction of losses due to skin and proximity effect. Phase-modulated series resonant converter with ZVS is used as the power converter.

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High voltage power supplies for radar applications are investigated, which are subjected to pulsed load (125 kHz and 10% duty cycle) with stringent specifications (<0.01% regulation, efficiency>85%, droop<0.5 V/micro-sec.). As good regulation and stable operation requires the converter to be switched at much higher frequency than the pulse load frequency, transformer poses serious problems of insulation failure and higher losses. Few converter topologies are proposed to tackle these problems. A study is made regarding the beat frequency oscillations that may exist with pulsed loading. It is illustrated with respect to the proposed converter topologies. Methods are proposed to eliminate or minimize these oscillations.

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We present a model of identical coupled two-state stochastic units, each of which in isolation is governed by a fixed refractory period. The nonlinear coupling between units directly affects the refractory period, which now depends on the global state of the system and can therefore itself become time dependent. At weak coupling the array settles into a quiescent stationary state. Increasing coupling strength leads to a saddle node bifurcation, beyond which the quiescent state coexists with a stable limit cycle of nonlinear coherent oscillations. We explicitly determine the critical coupling constant for this transition.

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Sn-Ag-Cu (SAC) solders are susceptible to appreciable microstructural coarsening during storage or service. This results in evolution of joint properties over time, and thereby influences the long-term reliability of microelectronic packages. Accurate prediction of this aging behavior is therefore critical for joint reliability predictions. Here, we study the precipitate coarsening behavior in two Sn-Ag-Cu (SAC) alloys, namely Sn-3.0Ag-0.5Cu and Sn-1.0Cu-0.5Cu, under different thermo-mechanical excursions, including isothermal aging at 150 degrees C for various lengths of time and thermo-mechanical cycling between -25 degrees C and 125 degrees C, with an imposed shear strain of similar to 19.6% per cycle, for different number of cycles. During isothermal aging and the thermo-mechanical cycling up to 200 cycles, Ag3Sn precipitates undergo rapid, monotonous coarsening. However, high number of thermo-mechanical cycling, usually between 200 and 600 cycles, causes dissolution and re-precipitation of precipitates, resulting in a fine and even distribution. Also, recrystallization of Sn-grains near precipitate clusters was observed during severe isothermal aging. Such responses are quite unusual for SAC solder alloys. In the regime of usual precipitate coarsening in these SAC alloys, an explicit parameter, which captures the thermo-mechanical history dependence of Ag3Sn particle size, was defined. Brief mechanistic description for the recrystallization of Sn grains during isothermal aging and reprecipitation of the Ag3Sn due to high number of thermo-mechanical cycles are also presented.