Stepped gate polysilicon thin film transistor for large area power applications

For the first time, we report a new poly-Si stepped gate Thin Film Transistor (SG TFT) on glass. The Density of States extracted from measured I-V characteristics has been used to evaluate the device performance with a two dimensional device simulator. The results show that the three-terminal SG TFT device has a switching speed comparable to a low voltage structure and the high on-current capability of a metal field plate (MFP) TFT and the potential for comparable breakdown characteristics.

Carbon based bottom gate thin film transistor

This paper describes the fabrication and characterization of a carbon based, bottom gate, thin film transistor (TFT). The active layer is formed from highly sp2 bonded nitrogenated amorphous carbon (a-C:N) which is deposited at room temperature using a filtered cathodic vacuum arc technique. The TFT shows p-channel operation. The device exhibits a threshold voltage of 15 V and a field effect mobility of 10-4 cm2 V-1 s-1 . The valence band tail of a-C:N is observed to be much shallower than that of a-Si:H, but does not appear to severely impede the shift of the Fermi level. This may indicate that a significant proportion of the a-C tail states can still contribute to conduction.

Modeling of MOS-side carrier injection in trench-gate IGBTs

A compact trench-gate IGBT model that captures MOS-side carrier injection is developed. The model retains the simplicity of a one-dimensional solution to the ambipolar diffusion equation, but at the same time captures MOS-side carrier injection and its effects on steady-state carrier distribution in the drift region and on switching waveforms. © 2007 IEEE.

Physical Blocking Neural Tube Closure Affects Radial Intercalation and Neural Crest Midline-directed Migration in Xenopus Dorsal Explants

神经管闭合缺陷(NTDs)是一种严重的先天畸形疾病,在新生儿中有千分之一的发病率.神经管融合前后,多种组织参与形态发生运动.神经管一经融合,神经嵴细胞就会向背侧中线方向产生单极突出并向此方向迁移形成神经管的顶部.与此同时,神经管从腹侧开始发生辐射状切入以实现单层化.在此,我们在非洲爪蟾的移植体中机械阻断神经管的闭合以检测其细胞运动及随后的图式形成.结果显示神经管闭合缺陷的移植体不能形成单层化的神经管,并且神经嵴细胞滞留在侧面区域不能向背侧中线迁移,而对神经前体标记基因的检测显示神经管的背腹图式形成并未受到影响.以上结果表明神经管的融合对于辐射状切入和神经嵴细胞向背侧中线方向的迁移过程是必需的,而对于神经管的沿背腹轴方向的图式形成是非必需的.

Effect of gate dielectric scaling in nanometer scale vertical thin film transistors

A short channel vertical thin film transistor (VTFT) with 30 nm SiN x gate dielectric is reported for low voltage, high-resolution active matrix applications. The device demonstrates an ON/OFF current ratio as high as 10 9, leakage current in the fA range, and a sub-threshold slope steeper than 0.23 V/dec exhibiting a marked improvement with scaling of the gate dielectric thickness. © 2011 American Institute of Physics.

Steady-state analytical model for the trench insulated gate bipolar transistor

A steady-state, physically-based analytical model for the Trench Insulated Gate Bipolar Transistor which accounts for a combined PIN diode - PNP transistor carrier dynamics is proposed. Previous models (i.e. PIN model and PNP transistor model) cannot account properly for the carrier dynamics in Trench IGBT since neither the PNP transistor nor the PIN diode effect can be neglected. An optimized Trench IGBT with a large ratio between the accumulation layer and the cell size leads to substantially improved on-state characteristics, which makes the Trench IGBT potentially the most attractive device in the area of high voltage fast switching devices.

Parameters influencing the performance of an IGBT gate drive

This paper presents an improvement of an IGBT gate drive implementing Active Voltage Control (AVC), and investigates the impact of various parameters affecting its performance. The effects of the bandwidths of various elements and the gains of AVC are shown in simulation and experimentally. Also, the paper proposes connecting a small Active Snubber between the IGBT collector and its gate integrated within the AVC. The effect of this snubber on enhancing the stability of the gate drive is demonstrated. It will be shown that using a wide bandwidth operational amplifier and integrating the Active Snubber within the gate drive reduces the minimum gate resistor required to achieve stability of the controller. Consequently, the response time of the IGBT to control signals is significantly reduced, the switching losses then can be minimised and, hence, the performance of gate drive as whole is improved. This reflects positively on turn-off and turn-on transitions achieving voltage sharing between the IGBTs connected in series to construct a higher voltage switch, making series IGBTs a feasible practice. ©2008 IEEE.

A 660MHz ZVS DC-DC converter using gate-driver charge-recycling in 0.18μm CMOS with an integrated output filter

The design and manufacture of a prototype chip level power supply is described, with both simulated and experimental results. Of particular interest is the inclusion of a fully integrated on-chip LC filter. A high switching frequency of 660MHz and the design of a device drive circuit reduce losses by supply stacking, low-swing signaling and charge recycling. The paper demonstrates that a chip level converter operating at high frequency can be built and shows how this can be achieved, using zero voltage switching techniques similar to those commonly used in larger converters. Both simulations and experimental data from a fabricated circuit in 0.18μm CMOS are included. The circuit converts 2.2V to 0.75∼1.0V at ∼55mA. ©2008 IEEE.