Implementation of a unified userspace time handling library under the Linux OS

An appropriate assessment of end-to-end network performance presumes highly efficient time tracking and measurement with precise time control of the stopping and resuming of program operation. In this paper, a novel approach to solving the problems of highly efficient and precise time measurements on PC-platforms and on ARM-architectures is proposed. A new unified High Performance Timer and a corresponding software library offer a unified interface to the known time counters and automatically identify the fastest and most reliable time source, available in the user space of a computing system. The research is focused on developing an approach of unified time acquisition from the PC hardware and accordingly substituting the common way of getting the time value through Linux system calls. The presented approach provides a much faster means of obtaining the time values with a nanosecond precision than by using conventional means. Moreover, it is capable of handling the sequential time value, precise sleep functions and process resuming. This ability means the reduction of wasting computer resources during the execution of a sleeping process from 100% (busy-wait) to 1-1.5%, whereas the benefits of very accurate process resuming times on long waits are maintained.

Virtual Reality zur Untersuchung neuronaler Prozesse : Entwicklung und Validierung einer adaptiven Hirn-Computer-Schnittstelle zur dynamischen Interaktion mit Virtual Reality Paradigmen

Magdeburg, Univ., Fak. für Informatik, Diss., 2013

Computer-aided detection of cerebral aneurysms in angiographies

Magdeburg, Univ., Fak. für Informatik, Diss., 2013

Computer-assisted motion compensation and analysis of perfusion ultrasound data

Magdeburg, Univ., Fak. für Informatik, Diss., 2014

Efficiency Comparison of DFT/IDFT Algorithms by Evaluating Diverse Hardware Implementations

In this paper we investigate various algorithms for performing Fast Fourier Transformation (FFT)/Inverse Fast Fourier Transformation (IFFT), and proper techniques for maximizing the FFT/IFFT execution speed, such as pipelining or parallel processing, and use of memory structures with pre-computed values (look up tables -LUT) or other dedicated hardware components (usually multipliers). Furthermore, we discuss the optimal hardware architectures that best apply to various FFT/IFFT algorithms, along with their abilities to exploit parallel processing with minimal data dependences of the FFT/IFFT calculations. An interesting approach that is also considered in this paper is the application of the integrated processing-in-memory Intelligent RAM (IRAM) chip to high speed FFT/IFFT computing. The results of the assessment study emphasize that the execution speed of the FFT/IFFT algorithms is tightly connected to the capabilities of the FFT/IFFT hardware to support the provided parallelism of the given algorithm. Therefore, we suggest that the basic Discrete Fourier Transform (DFT)/Inverse Discrete Fourier Transform (IDFT) can also provide high performances, by utilizing a specialized FFT/IFFT hardware architecture that can exploit the provided parallelism of the DFT/IDF operations. The proposed improvements include simplified multiplications over symbols given in polar coordinate system, using sinе and cosine look up tables, and an approach for performing parallel addition of N input symbols.

Efficiency Comparison of DFT/IDFT Algorithms by Evaluating Diverse Hardware : Implementations,Parallelization Prospectsand Possible Improvements

In this paper we investigate various algorithms for performing Fast Fourier Transformation (FFT)/Inverse Fast Fourier Transformation (IFFT), and proper techniquesfor maximizing the FFT/IFFT execution speed, such as pipelining or parallel processing, and use of memory structures with pre-computed values (look up tables -LUT) or other dedicated hardware components (usually multipliers). Furthermore, we discuss the optimal hardware architectures that best apply to various FFT/IFFT algorithms, along with their abilities to exploit parallel processing with minimal data dependences of the FFT/IFFT calculations. An interesting approach that is also considered in this paper is the application of the integrated processing-in-memory Intelligent RAM (IRAM) chip to high speed FFT/IFFT computing. The results of the assessment study emphasize that the execution speed of the FFT/IFFT algorithms is tightly connected to the capabilities of the FFT/IFFT hardware to support the provided parallelism of the given algorithm. Therefore, we suggest that the basic Discrete Fourier Transform (DFT)/Inverse Discrete Fourier Transform (IDFT) can also provide high performances, by utilizing a specialized FFT/IFFT hardware architecture that can exploit the provided parallelism of the DFT/IDF operations. The proposed improvements include simplified multiplications over symbols given in polar coordinate system, using sinе and cosine look up tables,and an approach for performing parallel addition of N input symbols.

A Novel Memory-centric Architecture and Organization of Processors and Computers

The modern computer systems that are in use nowadays are mostly processor-dominant, which means that their memory is treated as a slave element that has one major task – to serve execution units data requirements. This organization is based on the classical Von Neumann's computer model, proposed seven decades ago in the 1950ties. This model suffers from a substantial processor-memory bottleneck, because of the huge disparity between the processor and memory working speeds. In order to solve this problem, in this paper we propose a novel architecture and organization of processors and computers that attempts to provide stronger match between the processing and memory elements in the system. The proposed model utilizes a memory-centric architecture, wherein the execution hardware is added to the memory code blocks, allowing them to perform instructions scheduling and execution, management of data requests and responses, and direct communication with the data memory blocks without using registers. This organization allows concurrent execution of all threads, processes or program segments that fit in the memory at a given time. Therefore, in this paper we describe several possibilities for organizing the proposed memory-centric system with multiple data and logicmemory merged blocks, by utilizing a high-speed interconnection switching network.

Kernspintomographische Untersuchung zur Bedeutung von Rückmeldungen in der Mensch-Computer-Interaktion

Magdeburg, Univ., Fak. für Naturwiss., Diss., 2015

Disseny i implementació hardware d'algorismes de reconeixement de caràcters per comptadors d'aigua

Aquest projecte consisteix en l'estudi, comparació i implementació en hardware d'algoritmes de reconeixement de caràcters per integrar en un sistema intel·ligent de captura d'imatges. Aquest sistema, integrat per una càmera amb format i característiques específiques i que anirà acoblat a un comptador d'aigua tradicional, en captarà imatges i les enviarà per RF al punt de recepció de la companyia. L'objectiu principal consisteix en aconseguir un disseny que redueixi al màxim la quantitat d'informació per transmetre, tenint en compte les limitacions de l'entorn.

Simulació d'arquitectures VLIW

L'objectiu d'aquest projecte es dissenyar i implementar en Java una interfície gràfica que permeti simular l'arquitectura VLIW. Ha d'interactuar amb un simulador ja existent, VEX, i amb l'usuari. VEX permet analitzar, desenvolupar i depurar codi escrit en C sobre un processador VLIW configurable, des dels recursos hardware fíns al comportament de la "caché". L'interfície gràfica desenvolupada es diu JavaVEX. Té el gran avantatge d'evitar la introducció de les comandes de text que necesita VEX perquè son substituïdes per elements. És una eina més intuïtiva, ràpida i eficient. JavaVEX mostra informació sobre el codi C traduït a instruccions VLIW de fins a 4 operacions. També mostra els resultats de les instrucciones VLIW simulades. JavaVEX s'ha incorporat a un LiveCD. Així es pot executar l'aplicació sobre qualsevol ordinador. La finalitat docent de JavaVEX és ser utilitzada en les pràctiques de l'assignatura Arquitectura per a Computadors 2.

Results of computer assisted navigation in Total Knee Arthroplasty (TKA): comparison with the conventional method

The aim of this retrospective study was to compare the clinical and radiographic results after TKA (PFC, DePuy), performed either by computer assisted navigation (CAS, Brainlab, Johnson&Johnson) or by conventional means. Material and methods: Between May and December 2006 we reviewed 36 conventional TKA performed between 2002 and 2003 (group A) and 37 navigated TKA performed between 2005 and 2006 (group B) by the same experienced surgeon. The mean age in group A was 74 years (range 62-90) and 73 (range 58-85) in group B with a similar age distribution. The preoperative mechanical axes in group A ranged from -13° varus to +13° valgus (mean absolute deviation 6.83°, SD 3.86), in group B from -13° to +16° (mean absolute deviation 5.35, SD 4.29). Patients with a previous tibial osteotomy or revision arthroplasty were excluded from the study. Examination was done by an experienced orthopedic resident independent of the surgeon. All patients had pre- and postoperative long standing radiographs. The IKSS and the WOMAC were utilized to determine the clinical outcome. Patient's degree of satisfaction was assessed on a visual analogous scale (VAS). Results: 32 of the 37 navigated TKAs (86,5%) showed a postoperative mechanical axis within the limits of 3 degrees of valgus or varus deviation compared to only 24 (66%) of the 36 standard TKAs. This difference was significant (p = 0.045). The mean absolute deviation from neutral axis was 3.00° (range -5° to +9°, SD: 1.75) in group A in comparison to 1.54° (range -5° to +4°, SD: 1.41) in group B with a highly significant difference (p = 0.000). Furthermore, both groups showed a significant postoperative improvement of their mean IKSS-values (group A: 89 preoperative to 169 postoperative, group B 88 to 176) without a significant difference between the two groups. Neither the WOMAC nor the patient's degree of satisfaction - as assessed by VAS - showed significant differences. Operation time was significantly higher in group B (mean 119.9 min.) than in group A (mean 99.6 min., p <0.000). Conclusion: Our study showed consistent significant improvement of postoperative frontal alignment in TKA by computer assisted navigation (CAS) compared to standard methods, even in the hands of a surgeon well experienced in standard TKA implantation. However, the follow-up time of this study was not long enough to judge differences in clinical outcome. Thus, the relevance of computer navigation for clinical outcome and survival of TKA remains to be proved in long term studies to justify the longer operation time. References 1 Stulberg SD. Clin Orth Rel Res. 2003;(416):177-84. 2 Chauhan SK. JBJS Br. 2004;86(3):372-7. 3 Bäthis H, et al. Orthopäde. 2006;35(10):1056-65.

Distal dendrites of frog motor neurons: a computer-aided electron microscopic study of cobalt-filled cells.

With the aid of the cobalt labelling technique, frog spinal cord motor neuron dendrites of the subpial dendritic plexus have been identified in serial electron micrographs. Computer reconstructions of various lengths (2.5-9.8 micron) of dendritic segments showed the contours of these dendrites to be highly irregular, and to present many thorn-like projections 0.4-1.8 micron long. Number, size and distribution of synaptic contacts were also determined. Almost half of the synapses occurred at the origins of the thorns and these synapses had the largest contact areas. Only 8 out of 54 synapses analysed were found on thorns and these were the smallest. For the total length of reconstructed dendrites there was, on average, one synapse per 1.2 micron, while 4.4% of the total dendritic surface was covered with synaptic contacts. The functional significance of these distal dendrites and their capacity to influence the soma membrane potential is discussed.

Benchmarking therapeutic drug monitoring software: A review of available computer tools

Therapeutic drug monitoring (TDM) aims to optimize treatments by individualizing dosage regimens based on the measurement of blood concentrations. Dosage individualization to maintain concentrations within a target range requires pharmacokinetic and clinical capabilities. Bayesian calculations currently represent the gold standard TDM approach but require computation assistance. In recent decades computer programs have been developed to assist clinicians in this assignment. The aim of this survey was to assess and compare computer tools designed to support TDM clinical activities. The literature and the Internet were searched to identify software. All programs were tested on personal computers. Each program was scored against a standardized grid covering pharmacokinetic relevance, user friendliness, computing aspects, interfacing and storage. A weighting factor was applied to each criterion of the grid to account for its relative importance. To assess the robustness of the software, six representative clinical vignettes were processed through each of them. Altogether, 12 software tools were identified, tested and ranked, representing a comprehensive review of the available software. Numbers of drugs handled by the software vary widely (from two to 180), and eight programs offer users the possibility of adding new drug models based on population pharmacokinetic analyses. Bayesian computation to predict dosage adaptation from blood concentration (a posteriori adjustment) is performed by ten tools, while nine are also able to propose a priori dosage regimens, based only on individual patient covariates such as age, sex and bodyweight. Among those applying Bayesian calculation, MM-USC*PACK© uses the non-parametric approach. The top two programs emerging from this benchmark were MwPharm© and TCIWorks. Most other programs evaluated had good potential while being less sophisticated or less user friendly. Programs vary in complexity and might not fit all healthcare settings. Each software tool must therefore be regarded with respect to the individual needs of hospitals or clinicians. Programs should be easy and fast for routine activities, including for non-experienced users. Computer-assisted TDM is gaining growing interest and should further improve, especially in terms of information system interfacing, user friendliness, data storage capability and report generation.

Computer-assisted placement technique in hip resurfacing arthroplasty: improvement in accuracy?

Freehand positioning of the femoral drill guide is difficult during hip resurfacing and the surgeon is often unsure of the implant position achieved peroperatively. The purpose of this study was to find out whether, by using a navigation system, acetabular and femoral component positioning could be made easier and more precise. Eighteen patients operated on by the same surgeon were matched by sex, age, BMI, diagnosis and ASA score (nine patients with computer assistance, nine with the regular ancillary). Pre-operative planning was done on standard AP and axial radiographs with CT scan views for the computer-assisted operations. The final position of implants was evaluated by the same radiographs for all patients. The follow-up was at least 1 year. No difference between both groups in terms of femoral component position was observed (p > 0.05). There was also no difference in femoral notching. A trend for a better cup position was observed for the navigated hips, especially for cup anteversion. There was no additional operating time for the navigated hips. Hip navigation for resurfacing surgery may allow improved visualisation and hip implant positioning, but its advantage probably will be more obvious with mini-incisions than with regular incision surgery.

Sistema de monitorització Open Source: projecte d'empresa per Computer Technology Catalunya

L’objectiu del projecte consisteix en l’estudi, simulació i implantació d’un conjunt d’aplicacions que permeten tenir un control sobre possibles problemes que puguin succeir a la nostra xarxa. Aquest projecte és la solució als problemes de detecció d’errors en el funcionament de les infraestructures de networking de les que disposen els nostres clients.