Correct biological timing in Arabidopsis requires multiple light-signaling pathways.

Circadian oscillators provide rhythmic temporal cues for a range of biological processes in plants and animals, enabling anticipation of the day/night cycle and enhancing fitness-associated traits. We have used engineering models to understand the control principles of a plant's response to seasonal variation. We show that the seasonal changes in the timing of circadian outputs require light regulation via feed-forward loops, combining rapid light-signaling pathways with entrained circadian oscillators. Linear time-invariant models of circadian rhythms were computed for 3,503 circadian-regulated genes and for the concentration of cytosolic-free calcium to quantify the magnitude and timing of regulation by circadian oscillators and light-signaling pathways. Bioinformatic and experimental analysis show that rapid light-induced regulation of circadian outputs is associated with seasonal rephasing of the output rhythm. We identify that external coincidence is required for rephasing of multiple output rhythms, and is therefore important in general phase control in addition to specific photoperiod-dependent processes such as flowering and hypocotyl elongation. Our findings uncover a fundamental design principle of circadian regulation, and identify the importance of rapid light-signaling pathways in temporal control.

Phase-variable surface structures are required for infection of Campylobacter jejuni by bacteriophages.

This study characterizes the interaction between Campylobacter jejuni and the 16 phages used in the United Kingdom typing scheme by screening spontaneous mutants of the phage-type strains and transposon mutants of the sequenced strain NCTC 11168. We show that the 16 typing phages fall into four groups based on their patterns of activity against spontaneous mutants. Screens of transposon and defined mutants indicate that the phage-bacterium interaction for one of these groups appears to involve the capsular polysaccharide (CPS), while two of the other three groups consist of flagellatropic phages. The expression of CPS and flagella is potentially phase variable in C. jejuni, and the implications of these findings for typing and intervention strategies are discussed.

Simulating dynamic covariance structures for testing the adaptive behavior of variable selection algorithms (Invited Paper)

Variable selection for regression is a classical statistical problem, motivated by concerns that too large a number of covariates may bring about overfitting and unnecessarily high measurement costs. Novel difficulties arise in streaming contexts, where the correlation structure of the process may be drifting, in which case it must be constantly tracked so that selections may be revised accordingly. A particularly interesting phenomenon is that non-selected covariates become missing variables, inducing bias on subsequent decisions. This raises an intricate exploration-exploitation tradeoff, whose dependence on the covariance tracking algorithm and the choice of variable selection scheme is too complex to be dealt with analytically. We hence capitalise on the strength of simulations to explore this problem, taking the opportunity to tackle the difficult task of simulating dynamic correlation structures. © 2008 IEEE.

Models and algorithms for tracking of maneuvering objects using variable rate particle filters

Standard algorithms in tracking and other state-space models assume identical and synchronous sampling rates for the state and measurement processes. However, real trajectories of objects are typically characterized by prolonged smooth sections, with sharp, but infrequent, changes. Thus, a more parsimonious representation of a target trajectory may be obtained by direct modeling of maneuver times in the state process, independently from the observation times. This is achieved by assuming the state arrival times to follow a random process, typically specified as Markovian, so that state points may be allocated along the trajectory according to the degree of variation observed. The resulting variable dimension state inference problem is solved by developing an efficient variable rate particle filtering algorithm to recursively update the posterior distribution of the state sequence as new data becomes available. The methodology is quite general and can be applied across many models where dynamic model uncertainty occurs on-line. Specific models are proposed for the dynamics of a moving object under internal forcing, expressed in terms of the intrinsic dynamics of the object. The performance of the algorithms with these dynamical models is demonstrated on several challenging maneuvering target tracking problems in clutter. © 2006 IEEE.

Partial soi power LDMOS with a variable low-kappa; Dielectric buried layer and a buried P layer

A power LDMOS on partial silicon on insulator (PSOI) with a variable low-κ dielectric (VLKD) buried layer and a buried p (BP) layer is proposed (VLKD BPSOI). At a low κ value, the electric field strength in the buried dielectric (EI) is enhanced, and a Si window makes the substrate share the vertical voltage drop, leading to a high vertical breakdown voltage (BV). Moreover, three interface field peaks are introduced by the BP, the Si window, and the VLKD, which modulate the fields in the SOI layer, the VLKD layer, and the substrate; consequently, a high BV is obtained. Furthermore, the BP reduces the specific on-resistance (Ron), and the Si window alleviates the self-heating effect (SHE). The BV for VLKD BPSOI is enhanced by 34.5%, and Ron is decreased by 26.6%, compared with those for the conventional PSOI, and VLKD BPSOI also maintains a low SHE. © 2006 IEEE.

Semi-analytic slope delay model for CMOS switch-level timing verification

A novel slope delay model for CMOS switch-level timing verification is presented. It differs from conventional methods in being semianalytic in character. The model assumes that all input waveforms are trapezoidal in overall shape, but that they vary in their slope. This simplification is quite reasonable and does not seriously affect precision, but it facilitates rapid solution. The model divides the stages in a switch-level circuit into two types. One corresponds to the logic gates, and the other corresponds to logic gates with pass transistors connected to their outputs. Semianalytic modeling for both cases is discussed.

Switch-level timing verification for CMOS circuits. A semianalytic approach

The paper describes a semianalytic slope delay model for CMOS switch-level timing verification. It is characterised by classification of the effects of the input slope, internal size and load capacitance of a logic gate on delay time, and then the use of a series of carefully chosen analytic functions to estimate delay times under different circumstances. In the field of VLSI analysis, this model achieves improvements in speed and accuracy compared with conventional approaches to transistor-level and switch-level simulation.

Hierarchical approach to timing verification in CMOS VLSI design

This paper describes a novel hierarchical approach to timing verification. Four types of relationship existing among signal paths are distinguished, based on a classification of the degree of interdependency in the circuit. In this way, irrelevant path delays can be excluded through consideration of the interaction between critical paths and others. Furthermore, under suitable conditions, bounded delay values for large hierarchical systems can be deduced using bounded delays determined for their constituent cells. Finally, we discuss the impact on design strategy of the hierarchical delay model presented in this paper.