Fiscal policy under financial stress: A threshold VAR approach

The purpose of the project is to measure the impact of fiscal policy on the Portuguese GDP and how it may vary according to the state of the financial market. A Threshold VAR model is presented in which the two regimes are found using a financial stress index that divides the economy into a situation of financial stress and financial stability.

Low-voltage driven ZnS:Mn MIS and MISIM thin film electroluminescent devices with Eu2O3 insulator layer

AC thin film electroluminescent devices of MIS and MISIM have been fabricated with a novel dielectric layer of Eu2O3 as an insulator. The threshold voltage for light emission is found to depend strongly on the frequency of excitation source in these devices. These devices are fabricated with an active layer of ZnS:Mn and a novel dielectric layer of Eu2O3 as an insulator. The observed frequency dependence of brightness-voltage characteristics has been explained on the basis of the loss characteristic of the insulator layer. Changes in the threshold voltage and brightness with variation in emitting or insulating film thickness have been investigated in metal-insulator-semiconductor (MIS) structures. It has been found that the decrease in brightness occurring with decreasing ZnS layer thickness can be compensated by an increase in brightness obtained by reducing the insulator thickness. The optimal condition for low threshold voltage and higher stability has been shown to occur when the active layer to insulator thickness ratio lies between one and two.

Nanocrystalline Ge Flash Memories: Electrical Characterization and Trap Engineering

Conventional floating gate non-volatile memories (NVMs) present critical issues for device scalability beyond the sub-90 nm node, such as gate length and tunnel oxide thickness reduction. Nanocrystalline germanium (nc-Ge) quantum dot flash memories are fully CMOS compatible technology based on discrete isolated charge storage nodules which have the potential of pushing further the scalability of conventional NVMs. Quantum dot memories offer lower operating voltages as compared to conventional floating-gate (FG) Flash memories due to thinner tunnel dielectrics which allow higher tunneling probabilities. The isolated charge nodules suppress charge loss through lateral paths, thereby achieving a superior charge retention time. Despite the considerable amount of efforts devoted to the study of nanocrystal Flash memories, the charge storage mechanism remains obscure. Interfacial defects of the nanocrystals seem to play a role in charge storage in recent studies, although storage in the nanocrystal conduction band by quantum confinement has been reported earlier. In this work, a single transistor memory structure with threshold voltage shift, Vth, exceeding ~1.5 V corresponding to interface charge trapping in nc-Ge, operating at 0.96 MV/cm, is presented. The trapping effect is eliminated when nc-Ge is synthesized in forming gas thus excluding the possibility of quantum confinement and Coulomb blockade effects. Through discharging kinetics, the model of deep level trap charge storage is confirmed. The trap energy level is dependent on the matrix which confines the nc-Ge.

Threshold autoregressive and Markov switching models: an application to commercial real estate

Although financial theory rests heavily upon the assumption that asset returns are normally distributed, value indices of commercial real estate display significant departures from normality. In this paper, we apply and compare the properties of two recently proposed regime switching models for value indices of commercial real estate in the US and the UK, both of which relax the assumption that observations are drawn from a single distribution with constant mean and variance. Statistical tests of the models' specification indicate that the Markov switching model is better able to capture the non-stationary features of the data than the threshold autoregressive model, although both represent superior descriptions of the data than the models that allow for only one state. Our results have several implications for theoretical models and empirical research in finance.

Inflation and the variability of relative prices in the Caribbean: evidence from panel threshold models

Includes bibliography

Transporte eletrônico de nanofita de grafeno sob a influência de constrições e oxidação

Neste trabalho, investigamos os efeitos da funcionalização de grupos oxidativos sobre a estrutura de nanofitas de grafeno zigue-zague e também os efeitos de constrições, onde estes efeitos foram analisados por meio de transporte eletrônico via campo externo longitudinal. Nossos cálculos foram parametrizados pelo modelo semi-empírico de Huckel estendido-ETH, adotando-se o método das funções de Green de não equilíbrio- NEGF. As correntes foram calculadas via equação de Landauer que usa a função de transmissão da região espalhadora ao fluxo de elétrons com energia (E) vinda do eletrodo esquerdo. Por meio dessa abordagem, foi possível analisarmos o comportamento dos portadores de carga em cada um os dispositivos propostos, bem como, a natureza de tal comportamento. Verificaram-se nas curvas I(V) dois regimes de transporte: Ôhmico e NDR, verificando máximos de corrente e, também a tensão de limiar (VTh1

Analysis of charge-transport properties in GST materials for next generation phase-change memory devices

The quest for universal memory is driving the rapid development of memories with superior all-round capabilities in non-volatility, high speed, high endurance and low power. The memory subsystem accounts for a significant cost and power budget of a computer system. Current DRAM-based main memory systems are starting to hit the power and cost limit. To resolve this issue the industry is improving existing technologies such as Flash and exploring new ones. Among those new technologies is the Phase Change Memory (PCM), which overcomes some of the shortcomings of the Flash such as durability and scalability. This alternative non-volatile memory technology, which uses resistance contrast in phase-change materials, offers more density relative to DRAM, and can help to increase main memory capacity of future systems while remaining within the cost and power constraints. Chalcogenide materials can suitably be exploited for manufacturing phase-change memory devices. Charge transport in amorphous chalcogenide-GST used for memory devices is modeled using two contributions: hopping of trapped electrons and motion of band electrons in extended states. Crystalline GST exhibits an almost Ohmic I(V) curve. In contrast amorphous GST shows a high resistance at low biases while, above a threshold voltage, a transition takes place from a highly resistive to a conductive state, characterized by a negative differential-resistance behavior. A clear and complete understanding of the threshold behavior of the amorphous phase is fundamental for exploiting such materials in the fabrication of innovative nonvolatile memories. The type of feedback that produces the snapback phenomenon is described as a filamentation in energy that is controlled by electron–electron interactions between trapped electrons and band electrons. The model thus derived is implemented within a state-of-the-art simulator. An analytical version of the model is also derived and is useful for discussing the snapback behavior and the scaling properties of the device.

Development of room temperature operating single electron transistor using FIB etching and deposition technology

The single-electron transistor (SET) is one of the best candidates for future nano electronic circuits because of its ultralow power consumption, small size and unique functionality. SET devices operate on the principle of Coulomb blockade, which is more prominent at dimensions of a few nano meters. Typically, the SET device consists of two capacitively coupled ultra-small tunnel junctions with a nano island between them. In order to observe the Coulomb blockade effects in a SET device the charging energy of the device has to be greater that the thermal energy. This condition limits the operation of most of the existing SET devices to cryogenic temperatures. Room temperature operation of SET devices requires sub-10nm nano-islands due to the inverse dependence of charging energy on the radius of the conducting nano-island. Fabrication of sub-10nm structures using lithography processes is still a technological challenge. In the present investigation, Focused Ion Beam based etch and deposition technology is used to fabricate single electron transistors devices operating at room temperature. The SET device incorporates an array of tungsten nano-islands with an average diameter of 8nm. The fabricated devices are characterized at room temperature and clear Coulomb blockade and Coulomb oscillations are observed. An improvement in the resolution limitation of the FIB etching process is demonstrated by optimizing the thickness of the active layer. SET devices with structural and topological variation are developed to explore their impact on the behavior of the device. The threshold voltage of the device was minimized to ~500mV by minimizing the source-drain gap of the device to 17nm. Vertical source and drain terminals are fabricated to realize single-dot based SET device. A unique process flow is developed to fabricate Si dot based SET devices for better gate controllability in the device characteristic. The device vi parameters of the fabricated devices are extracted by using a conductance model. Finally, characteristic of these devices are validated with the simulated data from theoretical modeling.

Breakage model development and application with CFD for predicting breakage of whey protein precipitate particles

Particle breakage due to fluid flow through various geometries can have a major influence on the performance of particle/fluid processes and on the product quality characteristics of particle/fluid products. In this study, whey protein precipitate dispersions were used as a case study to investigate the effect of flow intensity and exposure time on the breakage of these precipitate particles. Computational fluid dynamic (CFD) simulations were performed to evaluate the turbulent eddy dissipation rate (TED) and associated exposure time along various flow geometries. The focus of this work is on the predictive modelling of particle breakage in particle/fluid systems. A number of breakage models were developed to relate TED and exposure time to particle breakage. The suitability of these breakage models was evaluated for their ability to predict the experimentally determined breakage of the whey protein precipitate particles. A "power-law threshold" breakage model was found to provide a satisfactory capability for predicting the breakage of the whey protein precipitate particles. The whey protein precipitate dispersions were propelled through a number of different geometries such as bends, tees and elbows, and the model accurately predicted the mean particle size attained after flow through these geometries. © 2005 Elsevier Ltd. All rights reserved.

Real-time temperature estimation for power MOSFETs considering thermal ageing effects

This paper presents a novel real-time power-device temperature estimation method that monitors the power MOSFET's junction temperature shift arising from thermal aging effects and incorporates the updated electrothermal models of power modules into digital controllers. Currently, the real-time estimator is emerging as an important tool for active control of device junction temperature as well as online health monitoring for power electronic systems, but its thermal model fails to address the device's ongoing degradation. Because of a mismatch of coefficients of thermal expansion between layers of power devices, repetitive thermal cycling will cause cracks, voids, and even delamination within the device components, particularly in the solder and thermal grease layers. Consequently, the thermal resistance of power devices will increase, making it possible to use thermal resistance (and junction temperature) as key indicators for condition monitoring and control purposes. In this paper, the predicted device temperature via threshold voltage measurements is compared with the real-time estimated ones, and the difference is attributed to the aging of the device. The thermal models in digital controllers are frequently updated to correct the shift caused by thermal aging effects. Experimental results on three power MOSFETs confirm that the proposed methodologies are effective to incorporate the thermal aging effects in the power-device temperature estimator with good accuracy. The developed adaptive technologies can be applied to other power devices such as IGBTs and SiC MOSFETs, and have significant economic implications.

Gap junctions and emergent rhythms

Gap junction coupling is ubiquitous in the brain, particularly between the dendritic trees of inhibitory interneurons. Such direct non-synaptic interaction allows for direct electrical communication between cells. Unlike spike-time driven synaptic neural network models, which are event based, any model with gap junctions must necessarily involve a single neuron model that can represent the shape of an action potential. Indeed, not only do neurons communicating via gaps feel super-threshold spikes, but they also experience, and respond to, sub-threshold voltage signals. In this chapter we show that the so-called absolute integrate-and-fire model is ideally suited to such studies. At the single neuron level voltage traces for the model may be obtained in closed form, and are shown to mimic those of fast-spiking inhibitory neurons. Interestingly in the presence of a slow spike adaptation current the model is shown to support periodic bursting oscillations. For both tonic and bursting modes the phase response curve can be calculated in closed form. At the network level we focus on global gap junction coupling and show how to analyze the asynchronous firing state in large networks. Importantly, we are able to determine the emergence of non-trivial network rhythms due to strong coupling instabilities. To illustrate the use of our theoretical techniques (particularly the phase-density formalism used to determine stability) we focus on a spike adaptation induced transition from asynchronous tonic activity to synchronous bursting in a gap-junction coupled network.

Electrical characterization of organic based transistors: stability issues

An investigation into the stability of metal insulator semiconductor (MIS) transistors based on alpha-sexithiophene is reported. In particular the kinetics of the threshold voltage shift upon application of a gate bias has been determined. The kinetics follow a stretched-hyperbola type behavior, in agreement with the formalism developed to explain metastability in amorphous-silicon thin film transistors. Using this model, quantification of device stability is possible. Temperature-dependent measurements show that there are two processes involved in the threshold voltage shift, one occurring at T approximate to 220 K and the other at T approximate to 300 K. The latter process is found to be sample dependent. This suggests a relation between device stability and alpha-sexithiophene deposition parameters. Copyright (c) 2005 John Wiley A Sons, Ltd.

An In-Depth Study of the Barkhausen Emission Signal Properties of the Plastically Deformed Fe-2%Si Alloy

This paper presents the results of the in-depth study of the Barkhausen effect signal properties for the plastically deformed Fe-2%Si samples. The investigated samples have been deformed by cold rolling up to plastic strain epsilon(p) = 8%. The first approach consisted of time-domain-resolved pulse and frequency analysis of the Barkhausen noise signals whereas the complementary study consisted of the time-resolved pulse count analysis as well as a total pulse count. The latter included determination of time distribution of pulses for different threshold voltage levels as well as the total pulse count as a function of both the amplitude and the duration time of the pulses. The obtained results suggest that the observed increase in the Barkhausen noise signal intensity as a function of deformation level is mainly due to the increase in the number of bigger pulses.

Trapezoidal SOI FinFET analog parameters` dependence on cross-section shape

The trapezium is often a better approximation for the FinFET cross-section shape, rather than the design-intended rectangle. The frequent width variations along the vertical direction, caused by the etching process that is used for fin definition, may imply in inclined sidewalls and the inclination angles can vary in a significant range. These geometric variations may cause some important changes in the device electrical characteristics. This work analyzes the influence of the FinFET sidewall inclination angle on some relevant parameters for analog design, such as threshold voltage, output conductance, transconductance, intrinsic voltage gain (A V), gate capacitance and unit-gain frequency, through 3D numeric simulation. The intrinsic gain is affected by alterations in transconductance and output conductance. The results show that both parameters depend on the shape, but in different ways. Transconductance depends mainly on the sidewall inclination angle and the fixed average fin width, whereas the output conductance depends mainly on the average fin width and is weakly dependent on the sidewall inclination angle. The simulation results also show that higher voltage gains are obtained for smaller average fin widths with inclination angles that correspond to inverted trapeziums, i.e. for shapes where the channel width is larger at the top than at the transistor base because of the higher attained transconductance. When the channel top is thinner than the base, the transconductance degradation affects the intrinsic voltage gain. The total gate capacitances also present behavior dependent on the sidewall angle, with higher values for inverted trapezium shapes and, as a consequence, lower unit-gain frequencies.

Cryogenic operation of FinFETs aiming at analog applications

FinFETs are recognized as promising candidates for the CMOS nanometer era. In this paper the most recent results for cryogenic operation of FinFETs will be demonstrated with special emphasis on analog applications. Threshold voltage, subthreshold slope and carrier mobility will be studied. Also some important figures of merit for analog circuit operation as for readout electronics, such as transconductance, output conductance and intrinsic voltage gain will be covered. It is demonstrated that the threshold voltage of undoped narrow FinFETs is less temperature-dependent than for a planar single-gate device with similar doping concentration. The temperature reduction improves the transconductance over drain current ratio in any operational region. On the other hand, the output conductance is degraded when the temperature is reduced. The combination of these effects shows that the intrinsic gain of a L = 90 nm FinFET is degraded by 2 dB when the temperature reduces from 300 K to 100 K. (C) 2009 Elsevier Ltd. All rights reserved.