Neutral-point balancing of neutral-point-clamped three-level inverter with a front end switched rectifier DC source for the full modulationn range

A switched rectifier DC voltage source three-level neutral-point-clamped (NPC) converter topology is proposed here to alleviate the inverter from capacitor voltage balancing in three-level drive systems. The proposed configuration requires only one DC link with a voltage of half of that needed in a conventional NPC inverter. To obtain a rated DC link voltage, the rectifier DC source is alternately connected in parallel to one of the two series capacitors using two switches and two diodes with device voltage ratings of half the total DC bus voltage. The frequency at which the voltage source is switched is independent of the inverter and will not affect its operation since the switched voltage source in this configuration balances the capacitors automatically. The proposed configuration can also be used as a conventional two-level inverter in the lower modulation index range, thereby increasing the reliability of the drivesystem. A space-vector-based PWM scheme is used to verify this proposed topology on a laboratory system.

A Hybrid Five-Level Inverter With Common-Mode Voltage Elimination Having Single Voltage Source for IM Drive Applications

A new hybrid five-level inverter topology with common-mode voltage (CMV) elimination for induction motor drive is proposed in this paper. This topology has only one dc source, and different voltage levels are generated by using this voltage source along with floating capacitors charged to asymmetrical voltage levels. The pulsewidth modulation (PWM) scheme employed in this topology balances the capacitor voltages at the required levels at any power factor and modulation index while eliminating the CMV. This inverter has good fault-tolerant capability as it can be operated in three-or two-level mode with CMV elimination, in case of any failure in the H-bridges. More voltage levels with CMV elimination can be realized from this topology but only in a limited range of modulation index and power factor. Extensive simulation is done to validate the PWM technique for CMV elimination and balancing of the capacitor voltages. The experimental verification of the proposed inverter-fed induction motor is carried out in the linear modulation and overmodulation regions. The steady-state and transient operations of the drive are verified. The dynamics of the capacitor voltage balancing is also tested. The experimental results demonstrate that the proposed topology can be considered for industrial drive applications.

Analytical Expression for RMS DC Link Capacitor Current in a Three-Level Inverter

An analytical expression is derived for calculating the rms current through the DC link capacitor in a three level inverter. The output current of the inverter is assumed to sinusoidal. Variations in the capacitor rms current with modulation index as well as line side power factor are studied. The worst case current stress on the capacitor is determined. This is required for sizing the capacitor and is useful for predicting the capacitor losses and life. The analytical expression derived is validated through simulations and experimental results at a number of operating points.

Study of Multilevel Sinusoidal PWM methods for Cascaded H-Bridge Multilevel Inverters

This paper is a study of Multilevel Sinusoidal Pulse Width Modulation (MSPWM) methods; Phase Disposition (PD), Alternate Phase Opposition Disposition (APOD), Phase Opposition Disposition (POD) on a single phase Cascaded H-Bridge Multilevel inverter. Various factors such as amplitude modulation index (Ma), frequency modulation index (M-f), phase angle between carrier and reference modulating wave (phi) have been considered for simulation. Variation in these factors and their effect on inverter performance is evaluated. Factors such as DC bus utilization, output r.m.s voltage, total harmonic distortion (%THD), dominant harmonic order, switching losses are evaluated based on simulation results.

Harmonic analysis of DC capacitor current in sinusoidal and space-vector modulated neutral-point-clamped inverters

The voltage ripple and power loss in the DC-capacitor of a voltage source inverter depend on the harmonic currents flowing through the capacitor. This paper presents a double Fourier series based analysis of the harmonic contents of the DC capacitor current in a three-level neutral-point clamped (NPC) inverter, modulated with sine-triangle pulse-width modulation (SPWM) or conventional space vector pulse-width modulation (CSVPWM) schemes. The analytical results are validated experimentally on a 3-kVA three-level inverter prototype. The capacitor current in an NPC inverter has a periodicity of 120(a similar to) at the fundamental or modulation frequency. Hence, this current contains third-harmonic and triplen-frequency components, apart from switching frequency components. The harmonic components vary with modulation index and power factor for both PWM schemes. The third harmonic current decreases with increase in modulation index and also decreases with increase in power factor in case of both PWM methods. In general, the third harmonic content is higher with SPWM than with CSVPWM at a given operating condition. Also, power loss and voltage ripple in the DC capacitor are estimated for both the schemes using the current harmonic spectrum and equivalent series resistance (ESR) of the capacitor.

Reduced common-mode voltage operation of a new seven-level hybrid multilevel inverter topology with a single DC voltage source

In this study, analysis of extending the linear modulation range of a zero common-mode voltage (CMV) operated n-level inverter by allowing reduced CMV switching is presented. A new hybrid seven-level inverter topology with a single DC supply is also presented in this study and inverter operation for zero and reduced CMV is analysed. Each phase of the inverter is realised by cascading two three-level flying capacitor inverters with a half-bridge module in between. Proposed inverter topology is operated with zero CMV for modulation index <86% and is operated with a CMV magnitude of V-dc/18 to extend the modulation range up to 96%. Experimental results are presented for zero CMV operation and for reduced common voltage operation to extend the linear modulation range. A capacitor voltage balancing algorithm is designed utilising the pole voltage redundancies of the inverter, which works for every sampling instant to correct the capacitor voltage irrespective of load power factor and modulation index. The capacitor voltage balancing algorithm is tested for different modulation indices and for various transient conditions, to validate the proposed topology.

Evaluation and Minimization of Low-Order Harmonic Torque in Low-Switching-Frequency Inverter-Fed Induction Motor Drives

A low-order harmonic pulsating torque is a major concern in high-power drives, high-speed drives, and motor drives operating in an overmodulation region. This paper attempts to minimize the low-order harmonic torques in induction motor drives, operated at a low pulse number (i.e., a low ratio of switching frequency to fundamental frequency), through a frequency domain (FD) approach as well as a synchronous reference frame (SRF) based approach. This paper first investigates FD-based approximate elimination of harmonic torque as suggested by classical works. This is then extended into a procedure for minimization of low-order pulsating torque components in the FD, which is independent of machine parameters and mechanical load. Furthermore, an SRF-based optimal pulse width modulation (PWM) method is proposed to minimize the low-order harmonic torques, considering the motor parameters and load torque. The two optimal methods are evaluated and compared with sine-triangle (ST) PWM and selective harmonic elimination (SHE) PWM through simulations and experimental studies on a 3.7-kW induction motor drive. The SRF-based optimal PWM results in marginally better performance than the FD-based one. However, the selection of optimal switching angle for any modulation index (M) takes much longer in case of SRF than in case of the FD-based approach. The FD-based optimal solutions can be used as good starting solutions and/or to reasonably restrict the search space for optimal solutions in the SRF-based approach. Both of the FD-based and SRF-based optimal PWM methods reduce the low-order pulsating torque significantly, compared to ST PWM and SHE PWM, as shown by the simulation and experimental results.

Modelling and analysis of an open-loop induction motor drive incorporating the effect of inverter dead-time

The objective of this paper is to study the influence of inverter dead-time on steady as well as dynamic operation of an open-loop induction motor drive fed from a voltage source inverter (VSI). Towards this goal, this paper presents a systematic derivation of a dynamic model for an inverter-fed induction motor, incorporating the effect of inverter dead-time, in the synchronously revolving dq reference frame. Simulation results based on this dynamic model bring out the impact of inverter dead-time on both the transient response and steady-state operation of the motor drive. For the purpose of steady-state analysis, the dynamic model of the motor drive is used to derive a steady-state model, which is found to be non-linear. The steady-state model shows that the impact of dead-time can be seen as an additional resistance in the stator circuit, whose value depends on the stator current. Towards precise evaluation of this dead-time equivalent resistance, an analytical expression is proposed for the same in terms of inverter dead-time, switching frequency, modulation index and load impedance. The notion of dead-time equivalent resistance is shown to simplify the solution of the non-linear steady-state model. The analytically evaluated steady-state solutions are validated through numerical simulations and experiments.

Wavelength conversion using semiconductor optical amplifiers

This paper reports a detailed theoretical study of the dynamics of wavelength conversion using cross-gain and cross-phase modulation in semiconductor optical amplifiers (SOA's) involving a large signal, multisection rate equation model. Using this model, recently reported experimental results have been correctly predicted and the effects of electrical and optical pumping on the conversion speed, modulation index, and phase variation of the converted signal have been considered. The model predicts, in agreement with experimental data, that recovery rates as low as 12 ps are possible if signal and pump powers in excess of 14 dBm are used. It also indicates that conversion speeds up to 40 Gb/s may be achieved with less than 3 dB dynamic penalty. The employment of cross-phase modulation increases the speed allowing, for example, an improvement to 60 Gb/s with an excess loss penalty less than 1 dB.

Optimization of semiconductor optical amplifiers for all optical wavelength conversion

In recent years a variety of experimental and theoretical work has been reported on the use of semiconductor optical amplifiers for high speed wavelength conversion. However little work has addressed the dynamic limitations of this conversion process in detail with a view to device optimization. In this paper, a detailed study of the conversion process is carried out in order to optimize device parameters and drive conditions for increased conversion speed and improved modulation index.

Instantaneous frequency and bandwidth estimation using filterbank arrays

Accurate estimation of the instantaneous frequency of speech resonances is a hard problem mainly due to phase discontinuities in the speech signal associated with excitation instants. We review a variety of approaches for enhanced frequency and bandwidth estimation in the time-domain and propose a new cognitively motivated approach using filterbank arrays. We show that by filtering speech resonances using filters of different center frequency, bandwidth and shape, the ambiguity in instantaneous frequency estimation associated with amplitude envelope minima and phase discontinuities can be significantly reduced. The novel estimators are shown to perform well on synthetic speech signals with frequency and bandwidth micro-modulations (i.e., modulations within a pitch period), as well as on real speech signals. Filterbank arrays, when applied to frequency and bandwidth modulation index estimation, are shown to reduce the estimation error variance by 85% and 70% respectively. © 2013 IEEE.

Estimation of frequency response of directly modulated lasers from optical spectra

A simple method for estimating the frequency responses of directly modulated lasers from optical spectra is presented. The frequency-modulation index and intensity-modulation index of a distributed feedback laser can be obtained through the optical spectrum analyses. The main advantage is that the measurement setup is very simple. Only a microwave source and an optical spectrum analyser are needed and there is no need to use a calibrated broadband photodetector. Experiment shows that the proposed method is as accurate as the swept frequency method using a network analyzer and is applicable to a wide range of modulation powers.

Characterization of high-speed optoelectronics devices based optical and electrical spectra analyses - art. no. 68380Q

In this paper, we presents the characterization technique of high-speed optoelectronics devices based electrical and optical spectra, which is as important access to the devices performance as the prevalent vector network analyzer (VNA) sweeping method. The measurement of additional modulation of laser and frequency response of photodetector from electrical spectra, and the estimation of the modulation indexes and the chirp parameters of directly modulated lasers based on optical spectra analysis, are given as examples.

Pre-charging and DC Fault Ride-Through of Hybri MMC Based HVDC Systems

Compared to half-bridge based MMCs, full-bridge based systems have the advantage of blocking dc fault, but at the expense of increased power semiconductors and power losses. In view of the relationships among ac/dc voltages and currents in full-bridge based MMC with the negative voltage state, this paper provides a detailed analysis on the link between capacitor voltage variation and the maximum modulation index. A hybrid MMC, consisting of mixed half-bridge and full-bridge circuits to combine their respective advantages is investigated in terms of its pre-charging process and transient dc fault ride-through capability. Simulation and experiment results demonstrate the feasibility and validity of the proposed strategy for a full-bridge based MMC and the hybrid MMC.

Análise e implementação de técnicas de medição de microvibrações utilizando interferometria óptica e processadores digitais de sinais

Fundação de Amparo à Pesquisa do Estado de São Paulo (FAPESP)