Fully Connected PLL Networks: How Filter Determines the Number of Nodes

Synchronization plays an important role in telecommunication systems, integrated circuits, and automation systems. Formerly, the masterslave synchronization strategy was used in the great majority of cases due to its reliability and simplicity. Recently, with the wireless networks development, and with the increase of the operation frequency of integrated circuits, the decentralized clock distribution strategies are gaining importance. Consequently, fully connected clock distribution systems with nodes composed of phase-locked loops (PLLs) appear as a convenient engineering solution. In this work, the stability of the synchronous state of these networks is studied in two relevant situations: when the node filters are first-order lag-lead low-pass or when the node filters are second-order low-pass. For first-order filters, the synchronous state of the network shows to be stable for any number of nodes. For second-order filter, there is a superior limit for the number of nodes, depending on the PLL parameters. Copyright (C) 2009 Atila Madureira Bueno et al.

Modeling and Filtering Double-Frequency Jitter in One-Way Master-Slave Chain Networks

One-way master-slave (OWMS) chain networks are widely used in clock distribution systems due to their reliability and low cost. As the network nodes are phase-locked loops (PLLs), double-frequency jitter (DFJ) caused by their phase detectors appears as an impairment to the performance of the clock recovering process found in communication systems and instrumentation applications. A nonlinear model for OWMS chain networks with P + 1 order PLLs as slave nodes is presented, considering the DFJ. Since higher order filters are more effective in filtering DFJ, the synchronous state stability conditions for an OWMS chain network with third-order nodes are derived, relating the loop gain and the filter coefficients. By using these conditions, design examples are discussed.

Design constraints for third-order PLL nodes in master-slave clock distribution networks

Clock signal distribution in telecommunication commercial systems usually adopts a master-slave architecture, with a precise time basis generator as a master and phase-locked loops (PLLs) as slaves. In the majority of the networks, second-order PLLs are adopted due to their simplicity and stability. Nevertheless, in some applications better transient responses are necessary and, consequently, greater order PLLs need to be used, in spite of the possibility of bifurcations and chaotic attractors. Here a master-slave network with third-order PLLs is analyzed and conditions for the stability of the synchronous state are derived, providing design constraints for the node parameters, in order to guarantee stability and reachability of the synchronous state for the whole network. Numerical simulations are carried out in order to confirm the analytical results. (C) 2009 Elsevier B.V. All rights reserved.

Spectral properties of chaotic signals generated by the skew tent map

Chaotic signals have been considered potentially attractive in many signal processing applications ranging from wideband communication systems to cryptography and watermarking. Besides, some devices as nonlinear adaptive filters and phase-locked loops can present chaotic behavior. In this paper, we derive analytical expressions for the autocorrelation sequence, power spectral density and essential bandwidth of chaotic signals generated by the skew tent map. From these results, we suggest possible applications in communication systems. (C) 2009 Elsevier B.V. All rights reserved.

Recognition of noisy images by PLL networks

We use networks composed of three phase-locked loops (PLLs), where one of them is the master, for recognizing noisy images. The values of the coupling weights among the PLLs control the noise level which does not affect the successful identification of the input image. Analytical results and numerical tests are presented concerning the scheme performance. (c) 2008 Elsevier B.V. All rights reserved.

Reachability of the synchronous state in a mutually connected PLL network

Second-order phase locked loops (PLLs) are devices that are able to provide synchronization between the nodes in a network even under severe quality restrictions in the signal propagation. Consequently, they are widely used in telecommunication and control. Conventional master-slave (M-S) clock-distribution systems are being, replaced by mutually connected (MC) ones due to their good potential to be used in new types of application such as wireless sensor networks, distributed computation and communication systems. Here, by using an analytical reasoning, a nonlinear algebraic system of equations is proposed to establish the existence conditions for the synchronous state in an MC PLL network. Numerical experiments confirm the analytical results and provide ideas about how the network parameters affect the reachability of the synchronous state. The phase-difference oscillation amplitudes are related to the node parameters helping to design PLL neural networks. Furthermore, estimation of the acquisition time depending on the node parameters allows the performance evaluation of time distribution systems and neural networks based on phase-locked techniques. (c) 2008 Elsevier GmbH. All rights reserved.

Multiple synchronous states in static delay-free mutually connected PLL networks

In many engineering applications, the time coordination of geographically separated events is of fundamental importance, as in digital telecommunications and integrated digital circuits. Mutually connected (MC) networks are very good candidates for some new types of application, such as wireless sensor networks. This paper presents a study on the behavior of MC networks of digital phase-locked loops (DPLLs). Analytical results are derived showing that, even for static networks without delays, different synchronous states may exist for the network. An upper bound for the number of such states is also presented. Numerical simulations are used to show the following results: (i) the synchronization precision in MC DPLLs networks; (ii) the existence of synchronous states for the network does not guarantee its achievement and (iii) different synchronous states may be achieved for different initial conditions. These results are important in the neural computation context. as in this case, each synchronous state may be associated to a different analog memory information. (C) 2010 Elsevier B.V. All rights reserved.

Modeling and measuring double-frequency jitter in one-way master-slave networks

The double-frequency jitter is one of the main problems in clock distribution networks. In previous works, sonic analytical and numerical aspects of this phenomenon were studied and results were obtained for one-way master-slave (OWMS) architectures. Here, an experimental apparatus is implemented, allowing to measure the power of the double-frequency signal and to confirm the theoretical conjectures. (C) 2008 Elsevier B.V. All rights reserved.

Análise e implementação digital de uma malha de captura de fase para sincronização de conversores à rede elétrica

Dissertação para a obtenção do grau de Mestre em Engenharia Electrotécnica Ramo de Automação e Eletrónica Industrial

Frequency-adjustable positive sequence detector for power conditioning applications

This paper proposes a novel and simple positive sequence detector (PSD), which is inherently self-adjustable to fundamental frequency deviations by means of a software-based PLL (Phase Locked Loop). Since the proposed positive sequence detector is not based on Fortescue's classical decomposition and no special input filtering is needed, its dynamic response may be as fast as one fundamental cycle. The digital PLL ensures that the positive sequence components can be calculated even under distorted waveform conditions and fundamental frequency deviations. For the purpose of validating the proposed models, the positive sequence detector has been implemented in a PC-based Power Quality Monitor and experimental results illustrate its good performance. The PSD algorithm has also been evaluated in the control loop of a Series Active Filter and simulation results demonstrate its effectiveness in a closed-loop system. Moreover, considering single-phase applications, this paper also proposes a general single-phase PLL and a Fundamental Wave Detector (FWD) immune to frequency variations and waveform distortions. © 2005 IEEE.

Comparative analysis of synchronization algorithms based on PLL, RDFT and Kalman Filter

This paper discusses the main characteristics and presents a comparative analysis of three synchronization algorithms based respectively, on a Phase-Locked Loop, a Kalman Filter and a Discrete Fourier Transform. It will be described the single and three-phase models of the first two methods and the single-phase model of the third one. Details on how to modify the filtering properties or dynamic response of each algorithm will be discussed in terms of their design parameters. In order to compare the different algorithms, these parameters will be set for maximum filter capability. Then, the dynamic response, during input amplitude and frequency deviations will be observed, as well as during the initialization procedure. So, advantages and disadvantages of all considered algorithms will be discussed. ©2007 IEEE.

Desenvolvimento de um sintetizador de freqüência de baixo custo em tecnologia CMOS

Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

Simulations of the Frequency Modulated Atomic Force Microscope (FM-AFM) nonlinear control system

The Frequency Modulated - Atomic Force Microscope (FM-AFM) is apowerful tool to perform surface investigation with true atomic resolution. The controlsystem of the FM-AFM must keep constant both the frequency and amplitude ofoscillation of the microcantilever during the scanning process of the sample. However,tip and sample interaction forces cause modulations in the microcantilever motion.A Phase-Locked Loop (PLL) is used as a demodulator and to generate feedback signalto the FM-AFM control system. The PLL performance is vital to the FM-AFMperformace since the image information is in the modulated microcantilever motion.Nevertheless, little attention is drawn to PLL performance in the FM-AFM literature.Here, the FM-AFM control system is simulated, comparing the performancefor di erent PLL designs.

Architectures, stability and optimization for clock distribution networks

Synchronous telecommunication networks, distributed control systems and integrated circuits have its accuracy of operation dependent on the existence of a reliable time basis signal extracted from the line data stream and acquirable to each node. In this sense, the existence of a sub-network (inside the main network) dedicated to the distribution of the clock signals is crucially important. There are different solutions for the architecture of the time distribution sub-network and choosing one of them depends on cost, precision, reliability and operational security. In this work we expose: (i) the possible time distribution networks and their usual topologies and arrangements. (ii) How parameters of the network nodes can affect the reachability and stability of the synchronous state of a network. (iii) Optimizations methods for synchronous networks which can provide low cost architectures with operational precision, reliability and security. (C) 2011 Elsevier B. V. All rights reserved.

Motion control and real-time systems: an approach to trajectory rebuilding in non-deterministic networks

Motion control is a sub-field of automation, in which the position and/or velocity of machines are controlled using some type of device. In motion control the position, velocity, force, pressure, etc., profiles are designed in such a way that the different mechanical parts work as an harmonious whole in which a perfect synchronization must be achieved. The real-time exchange of information in the distributed system that is nowadays an industrial plant plays an important role in order to achieve always better performance, better effectiveness and better safety. The network for connecting field devices such as sensors, actuators, field controllers such as PLCs, regulators, drive controller etc., and man-machine interfaces is commonly called fieldbus. Since the motion transmission is now task of the communication system, and not more of kinematic chains as in the past, the communication protocol must assure that the desired profiles, and their properties, are correctly transmitted to the axes then reproduced or else the synchronization among the different parts is lost with all the resulting consequences. In this thesis, the problem of trajectory reconstruction in the case of an event-triggered communication system is faced. The most important feature that a real-time communication system must have is the preservation of the following temporal and spatial properties: absolute temporal consistency, relative temporal consistency, spatial consistency. Starting from the basic system composed by one master and one slave and passing through systems made up by many slaves and one master or many masters and one slave, the problems in the profile reconstruction and temporal properties preservation, and subsequently the synchronization of different profiles in network adopting an event-triggered communication system, have been shown. These networks are characterized by the fact that a common knowledge of the global time is not available. Therefore they are non-deterministic networks. Each topology is analyzed and the proposed solution based on phase-locked loops adopted for the basic master-slave case has been improved to face with the other configurations.