Improved design of all-optical processor for modular arithmetic

A new improved design of an all-optical processor that performs modular arithmetic is presented. The modulo-processor is based on all-optical circuit of interconnected semiconductor optical amplifier logic gates. The design allows processing times of less than 1 µs for 16-bit operation at 10 Gb/s and up to 32-bit operation at 100 Gb/s.

Design of fast core node processor for packet forwarding without header modification in optical networks

We present a design of a fast all-optical core-node processor that performs packet-forwarding in optical networks without header-modification. The design is based on bit-serial architecture using TOADs as logic-gates that perform modulo-arithmetic to forward packets.

Quantum controlled-NOT gate with 'hot' trapped ions

We present a novel method of performing quantum logic gates in trapped ion quantum computers which does not require the ions to be cooled down to the ground state of their vibrational modes, thereby avoiding one of the principal experimental difficulties encountered in realizing this technology. Our scheme employs adiabatic passages and a phase shift conditional on the phonon number state.

Three transducers for one photodetector: essays for optical communications

Dissertation presented to obtain the PhD degree in Electrical and Computer Engineering - Electronics

A new look at reversible logic implementation of decimal adder

Reversibility plays a fundamental role when logic gates such as AND, OR, and XOR are not reversible. computations with minimal energy dissipation are considered. Hence, these gates dissipate heat and may reduce the life of In recent years, reversible logic has emerged as one of the most the circuit. So, reversible logic is in demand in power aware important approaches for power optimization with its circuits. application in low power CMOS, quantum computing and A reversible conventional BCD adder was proposed in using conventional reversible gates.

Modeling Reflective Bistability in Vertical-Cavity Semiconductor Optical Amplifiers

The characteristics of optical bistability in a vertical- cavity semiconductor optical amplifier (VCSOA) operated in reflection are reported. The dependences of the optical bistability in VCSOAs on the initial phase detuning and on the applied bias current are analyzed. The optical bistability is also studied for different numbers of superimposed periods in the top distributed bragg reflector (DBR) that conform the internal cavity of the device. The appearance of the X-bistable and the clockwise bistable loops is predicted theoretically in a VCSOA operated in reflection for the first time, to the best of our knowledge. Moreover, it is also predicted that the control of the VCSOA’s top reflectivity by the addition of new superimposed periods in its top DBR reduces by one order of magnitude the input power needed for the assessment of the X- and the clockwise bistable loop, compared to that required in in-plane semiconductor optical amplifiers. These results, added to the ease of fabricating two-dimensional arrays of this kind of device could be useful for the development of new optical logic or optical signal regeneration devices.

Time evolution of frequency components In a chaotic digital signal

The type of signals obtained has conditioned chaos analysis tools. Almost in every case, they have analogue characteristics. But in certain cases, a chaotic digital signal is obtained and theses signals need a different approach than conventional analogue ones. The main objective of this paper will be to present some possible approaches to the study of this signals and how information about their characteristics may be obtained in the more straightforward possible way. We have obtained digital chaotic signals from an Optical Logic Cell with some feedback between output and one of the possible control gates. This chaos has been reported in several papers and its characteristics have been employed as a possible method to secure communications and as a way to encryption. In both cases, the influence of some perturbation in the transmission medium gave problems both for the synchronization of chaotic generators at emitter and receiver and for the recovering of information data. A proposed way to analyze the presence of some perturbation is to study the noise contents of transmitted signal and to implement a way to eliminate it. In our present case, the digital signal will be converted to a multilevel one by grouping bits in packets of 8 bits and applying conventional methods of time-frequency analysis to them. The results give information about the change in signals characteristics and hence some information about the noise or perturbations present. Equivalent representations to the phase and to the Feigenbaum diagrams for digital signals are employed in this case.

Boolean logic device done with DFB laser diode

We present simulation results on how power output-input characteristic Instability in Distributed FeedBack -DFB semiconductor laser diode SLA can be employed to implemented Boolean logic device. Two configurations of DFB Laser diode under external optical injection, either in the transmission or in the reflective mode of operation, is used to implement different Optical Logic Cells (OLCs), called the Q- and the P-Device OLCs. The external optical injection correspond to two inputs data plus a cw control signal that allows to choose the Boolean logic function to be implement. DFB laser diode parameters are choosing to obtain an output-input characteristic with the values desired. The desired values are mainly the on-off contrast and switching power, conforming shape of hysteretic cycle. Two DFB lasers in cascade, one working in transmission operation and the other one in reflective operation, allows designing an inputoutput characteristic based on the same respond of a self-electrooptic effect device is obtained. Input power for a bit'T' is 35 uW(70uW) and a bit "0" is zero for all the Boolean function to be execute. Device control signal range to choose the logic function is 0-140 uW (280 uW). Q-device (P-device)

All-optical binary counter

We experimentally demonstrate an all-optical binary counter composed of four semiconductor optical amplifier based all-optical switching gates. The time-of-flight optical circuit operates with bit-differential delays between the exclusive-OR gate used for modulo-2 binary addition and the AND gate used for binary carry detection. A movie of the counter operating in real time is presented.

Micro-Fabricated Surface Trap and Cavity Integration for Trapped Ion Quantum Computing

Atomic ions trapped in micro-fabricated surface traps can be utilized as a physical platform with which to build a quantum computer. They possess many of the desirable qualities of such a device, including high fidelity state preparation and readout, universal logic gates, long coherence times, and can be readily entangled with each other through photonic interconnects. The use of optical cavities integrated with trapped ion qubits as a photonic interface presents the possibility for order of magnitude improvements in performance in several key areas of their use in quantum computation. The first part of this thesis describes the design and fabrication of a novel surface trap for integration with an optical cavity. The trap is custom made on a highly reflective mirror surface and includes the capability of moving the ion trap location along all three trap axes with nanometer scale precision. The second part of this thesis demonstrates the suitability of small micro-cavities formed from laser ablated fused silica substrates with radii of curvature in the 300-500 micron range for use with the mirror trap as part of an integrated ion trap cavity system. Quantum computing applications for such a system include dramatic improvements in the photonic entanglement rate up to 10 kHz, the qubit measurement time down to 1 microsecond, and the measurement error rates down to the 10e-5 range. The final part of this thesis details a performance simulator for exploring the physical resource requirements and performance demands to scale such a quantum computer to sizes capable of performing quantum algorithms beyond the limits of classical computation.

Logic-Based Delivery of Site-Specifically-Modified Proteins from Gels through Engineered Biomacromolecular Architecture

Thesis (Master's)--University of Washington, 2016-08

Contrasting photoelectrochemical behaviour of two isomeric supramolecular dyes based on meso-tetra(pyridyl)porphyrin incorporating four (mu(3)-oxo)- triruthenium(III) clusters

A saddle shaped tetracluster porphyrin species containing four [Ru(3)O(OAc)(6)(py)(2)](+) clusters coordinated to the N-pyridyl atoms of 5,10,15,20-tetra(3-pyridyl)porphyrin, H(2)(3-TCPyP), has been investigated in comparison with the planar tetra(4-pyridyl) porphyrin analogue H(2)(4-TCPyP). The steric effects from the bulky peripheral complexes play a critical role in the H(2)(3-TCPyP) species, determining a non-planar configuration around the porphyrin centre and precluding any significant pi-electronic coupling, in contrast with the less hindered H(2)(4-TCPyP) species. Both systems exhibit a photoelectrochemical response in the presence of nanocrystalline TiO(2) films, involving the porphyrin excitation around 450 nm. However, only in the H(2)(4-TCPyP) case do the cluster moieties also contribute to the photoinduced electron injection process at 670 nm, reflecting the relevance of the electronic coupling between the porphyrin centre and the peripheral complexes.

Rough Notes on Programming AVR Microcontrollers in C

These notes follow on from the material that you studied in CSSE1000 Introduction to Computer Systems. There you studied details of logic gates, binary numbers and instruction set architectures using the Atmel AVR microcontroller family as an example. In your present course (METR2800 Team Project I), you need to get on to designing and building an application which will include such a microcontroller. These notes focus on programming an AVR microcontroller in C and provide a number of example programs to illustrate the use of some of the AVR peripheral devices.

Parametric signal regeneration

We present an ultra-high bandwidth all-optical digital signal regeneration device concept utilising non-degenerate parametric interaction in a one-dimensional waveguide. Performance is analysed in terms of re-amplification, re-timing, and re-shaping (including centre frequency correction) of time domain multiplexed signals. Bandwidths of 10-100 THz are achievable. (C) 2001 Published by Elsevier Science B.V.

Modeling and manufacturability assessment of bistable quantum-dot cells

We have investigated the behavior of bistable cells made up of four quantum dots and occupied by two electrons, in the presence of realistic confinement potentials produced by depletion gates on top of a GaAs/AlGaAs heterostructure. Such a cell represents the basic building block for logic architectures based on the concept of quantum cellular automata (QCA) and of ground state computation, which have been proposed as an alternative to traditional transistor-based logic circuits. We have focused on the robustness of the operation of such cells with respect to asymmetries derived from fabrication tolerances. We have developed a two-dimensional model for the calculation of the electron density in a driven cell in response to the polarization state of a driver cell. Our method is based on the one-shot configuration-interaction technique, adapted from molecular chemistry. From the results of our simulations, we conclude that an implementation of QCA logic based on simple ¿hole arrays¿ is not feasible, because of the extreme sensitivity to fabrication tolerances. As an alternative, we propose cells defined by multiple gates, where geometrical asymmetries can be compensated for by adjusting the bias voltages. Even though not immediately applicable to the implementation of logic gates and not suitable for large scale integration, the proposed cell layout should allow an experimental demonstration of a chain of QCA cells.