102 resultados para NOC


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Bangkok Metropolitan Region (BMR) is the centre for various major activities in Thailand including political, industry, agriculture, and commerce. Consequently, the BMR is the highest and most densely populated area in Thailand. Thus, the demand for houses in the BMR is also the largest, especially in subdivision developments. For these reasons, the subdivision development in the BMR has increased substantially in the past 20 years and generated large numbers of subdivision developments (AREA, 2009; Kridakorn Na Ayutthaya & Tochaiwat, 2010). However, this dramatic growth of subdivision development has caused several problems including unsustainable development, especially for subdivision neighbourhoods, in the BMR. There have been rating tools that encourage the sustainability of neighbourhood design in subdivision development, but they still have practical problems. Such rating tools do not cover the scale of the development entirely; and they concentrate more on the social and environmental conservation aspects, which have not been totally accepted by the developers (Boonprakub, 2011; Tongcumpou & Harvey, 1994). These factors strongly confirm the need for an appropriate rating tool for sustainable subdivision neighbourhood design in the BMR. To improve level of acceptance from all stakeholders in subdivision developments industry, the new rating tool should be developed based on an approach that unites the social, environmental, and economic approaches, such as eco-efficiency principle. Eco-efficiency is the sustainability indicator introduced by the World Business Council for Sustainable Development (WBCSD) since 1992. The eco-efficiency is defined as the ratio of the product or service value according to its environmental impact (Lehni & Pepper, 2000; Sorvari et al., 2009). Eco-efficiency indicator is concerned to the business, while simultaneously, is concerned with to social and the environment impact. This study aims to develop a new rating tool named "Rating for sustainable subdivision neighbourhood design (RSSND)". The RSSND methodology is developed by a combination of literature reviews, field surveys, the eco-efficiency model development, trial-and-error technique, and the tool validation process. All required data has been collected by the field surveys from July to November 2010. The ecoefficiency model is a combination of three different mathematical models; the neighbourhood property price (NPP) model, the neighbourhood development cost (NDC) model, and the neighbourhood occupancy cost (NOC) model which are attributable to the neighbourhood subdivision design. The NPP model is formulated by hedonic price model approach, while the NDC model and NOC model are formulated by the multiple regression analysis approach. The trial-and-error technique is adopted for simplifying the complex mathematic eco-efficiency model to a user-friendly rating tool format. Credibility of the RSSND has been validated by using both rated and non-rated of eight subdivisions. It is expected to meet the requirements of all stakeholders which support the social activities of the residents, maintain the environmental condition of the development and surrounding areas, and meet the economic requirements of the developers.

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Embedded many-core architectures contain dozens to hundreds of CPU cores that are connected via a highly scalable NoC interconnect. Our Multiprocessor-System-on-Chip CoreVAMPSoC combines the advantages of tightly coupled bus-based communication with the scalability of NoC approaches by adding a CPU cluster as an additional level of hierarchy. In this work, we analyze different cluster interconnect implementations with 8 to 32 CPUs and compare them in terms of resource requirements and performance to hierarchical NoCs approaches. Using 28nm FD-SOI technology the area requirement for 32 CPUs and AXI crossbar is 5.59mm2 including 23.61% for the interconnect at a clock frequency of 830 MHz. In comparison, a hierarchical MPSoC with 4 CPU cluster and 8 CPUs in each cluster requires only 4.83mm2 including 11.61% for the interconnect. To evaluate the performance, we use a compiler for streaming applications to map programs to the different MPSoC configurations. We use this approach for a design-space exploration to find the most efficient architecture and partitioning for an application.

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This paper presents a power, latency and throughput trade-off study on NoCs by varying microarchitectural (e.g. pipelining) and circuit level (e.g. frequency and voltage) parameters. We change pipelining depth, operating frequency and supply voltage for 3 example NoCs - 16 node 2D Torus, Tree network and Reduced 2D Torus. We use an in-house NoC exploration framework capable of topology generation and comparison using parameterized models of Routers and links developed in SystemC. The framework utilizes interconnect power and delay models from a low-level modelling tool called Intacte[1]1. We find that increased pipelining can actually reduce latency. We also find that there exists an optimal degree of pipelining which is the most energy efficient in terms of minimizing energy-delay product.

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A profluorescent nitroxide possessing an isoindoline nitroxide moiety linked to a perylene fluorophore was developed to monitor radical mediated degradation of melamine-formaldehyde crosslinked polyester coil coatings in an industry standard accelerated weathering tester. Trapping of polyester-derived radicals (most likely C-radicals) that are generated during polymer degradation leads to fluorescent closed-shell alkoxy amines, which was used to obtain time-dependent degradation profiles to assess the relative stability of different polyesters towards weathering. The nitroxide probe couples excellent thermal stability and satisfactory photostability with high sensitivity and enables detection of free radical damage in polyesters under conditions that mimic exposure to the environment on a time scale of hours rather than months or years required by other testing methods. There are indications that the profluorescent nitroxide undergoes partial photo-degradation in the absence of polymer-derived radicals. Unexpectedly, it was also found that UV-induced fragmentation of the NO–C bond in closed-shell alkoxy amines leads to regeneration of the profluorescent nitroxide and the respective C-radical. The maximum fluorescence intensity that could be achieved with a given probe concentration is therefore not only determined by the amount of polyester radicals formed during accelerated weathering, but also by the light-driven side reactions of the profluorescent nitroxide and the corresponding alkoxy amine radical trapping products. Studies to determine the optimum probe concentration in the polymer matrix revealed that aggregation and re-absorption effects lowered the fluorescence intensity at higher concentrations of the profluorescent nitroxide, but too low probe concentrations, where these effects would be avoided, were not sufficient to trap the amount of polyester radicals formed upon weathering. The optimized experimental conditions were used to assess the impact of temperature and UV irradiance on polymer degradation during accelerated weathering.

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Emerging embedded applications are based on evolving standards (e.g., MPEG2/4, H.264/265, IEEE802.11a/b/g/n). Since most of these applications run on handheld devices, there is an increasing need for a single chip solution that can dynamically interoperate between different standards and their derivatives. In order to achieve high resource utilization and low power dissipation, we propose REDEFINE, a polymorphic ASIC in which specialized hardware units are replaced with basic hardware units that can create the same functionality by runtime re-composition. It is a ``future-proof'' custom hardware solution for multiple applications and their derivatives in a domain. In this article, we describe a compiler framework and supporting hardware comprising compute, storage, and communication resources. Applications described in high-level language (e.g., C) are compiled into application substructures. For each application substructure, a set of compute elements on the hardware are interconnected during runtime to form a pattern that closely matches the communication pattern of that particular application. The advantage is that the bounded CEs are neither processor cores nor logic elements as in FPGAs. Hence, REDEFINE offers the power and performance advantage of an ASIC and the hardware reconfigurability and programmability of that of an FPGA/instruction set processor. In addition, the hardware supports custom instruction pipelining. Existing instruction-set extensible processors determine a sequence of instructions that repeatedly occur within the application to create custom instructions at design time to speed up the execution of this sequence. We extend this scheme further, where a kernel is compiled into custom instructions that bear strong producer-consumer relationship (and not limited to frequently occurring sequences of instructions). Custom instructions, realized as hardware compositions effected at runtime, allow several instances of the same to be active in parallel. A key distinguishing factor in majority of the emerging embedded applications is stream processing. To reduce the overheads of data transfer between custom instructions, direct communication paths are employed among custom instructions. In this article, we present the overview of the hardware-aware compiler framework, which determines the NoC-aware schedule of transports of the data exchanged between the custom instructions on the interconnect. The results for the FFT kernel indicate a 25% reduction in the number of loads/stores, and throughput improves by log(n) for n-point FFT when compared to sequential implementation. Overall, REDEFINE offers flexibility and a runtime reconfigurability at the expense of 1.16x in power and 8x in area when compared to an ASIC. REDEFINE implementation consumes 0.1x the power of an FPGA implementation. In addition, the configuration overhead of the FPGA implementation is 1,000x more than that of REDEFINE.

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Network Interfaces (NIs) are used in Multiprocessor System-on-Chips (MPSoCs) to connect CPUs to a packet switched Network-on-Chip. In this work we introduce a new NI architecture for our hierarchical CoreVA-MPSoC. The CoreVA-MPSoC targets streaming applications in embedded systems. The main contribution of this paper is a system-level analysis of different NI configurations, considering both software and hardware costs for NoC communication. Different configurations of the NI are compared using a benchmark suite of 10 streaming applications. The best performing NI configuration shows an average speedup of 20 for a CoreVA-MPSoC with 32 CPUs compared to a single CPU. Furthermore, we present physical implementation results using a 28 nm FD-SOI standard cell technology. A hierarchical MPSoC with 8 CPU clusters and 4 CPUs in each cluster running at 800MHz requires an area of 4.56mm2.

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RECONNECT is a Network-on-Chip using a honeycomb topology. In this paper we focus on properties of general rules applicable to a variety of routing algorithms for the NoC which take into account the missing links of the honeycomb topology when compared to a mesh. We also extend the original proposal [5] and show a method to insert and extract data to and from the network. Access Routers at the boundary of the execution fabric establish connections to multiple periphery modules and create a torus to decrease the node distances. Our approach is scalable and ensures homogeneity among the compute elements in the NoC. We synthesized and evaluated the proposed enhancement in terms of power dissipation and area. Our results indicate that the impact of necessary alterations to the fabric is negligible and effects the data transfer between the fabric and the periphery only marginally.

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We describe a System-C based framework we are developing, to explore the impact of various architectural and microarchitectural level parameters of the on-chip interconnection network elements on its power and performance. The framework enables one to choose from a variety of architectural options like topology, routing policy, etc., as well as allows experimentation with various microarchitectural options for the individual links like length, wire width, pitch, pipelining, supply voltage and frequency. The framework also supports a flexible traffic generation and communication model. We provide preliminary results of using this framework to study the power, latency and throughput of a 4x4 multi-core processing array using mesh, torus and folded torus, for two different communication patterns of dense and sparse linear algebra. The traffic consists of both Request-Response messages (mimicing cache accesses)and One-Way messages. We find that the average latency can be reduced by increasing the pipeline depth, as it enables higher link frequencies. We also find that there exists an optimum degree of pipelining which minimizes energy-delay product.

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In this paper we explore an implementation of a high-throughput, streaming application on REDEFINE-v2, which is an enhancement of REDEFINE. REDEFINE is a polymorphic ASIC combining the flexibility of a programmable solution with the execution speed of an ASIC. In REDEFINE Compute Elements are arranged in an 8x8 grid connected via a Network on Chip (NoC) called RECONNECT, to realize the various macrofunctional blocks of an equivalent ASIC. For a 1024-FFT we carry out an application-architecture design space exploration by examining the various characterizations of Compute Elements in terms of the size of the instruction store. We further study the impact by using application specific, vectorized FUs. By setting up different partitions of the FFT algorithm for persistent execution on REDEFINE-v2, we derive the benefits of setting up pipelined execution for higher performance. The impact of the REDEFINE-v2 micro-architecture for any arbitrary N-point FFT (N > 4096) FFT is also analyzed. We report the various algorithm-architecture tradeoffs in terms of area and execution speed with that of an ASIC implementation. In addition we compare the performance gain with respect to a GPP.

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Coarse Grained Reconfigurable Architectures (CGRA) are emerging as embedded application processing units in computing platforms for Exascale computing. Such CGRAs are distributed memory multi- core compute elements on a chip that communicate over a Network-on-chip (NoC). Numerical Linear Algebra (NLA) kernels are key to several high performance computing applications. In this paper we propose a systematic methodology to obtain the specification of Compute Elements (CE) for such CGRAs. We analyze block Matrix Multiplication and block LU Decomposition algorithms in the context of a CGRA, and obtain theoretical bounds on communication requirements, and memory sizes for a CE. Support for high performance custom computations common to NLA kernels are met through custom function units (CFUs) in the CEs. We present results to justify the merits of such CFUs.

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Se presenta un Plan de Atención de Enfermería en Atención Primaria para personas que presenten úlceras venosas en las extremidades inferiores, y que frecuentemente, se oye como motivo de consulta: “Sensación de pesadez y calambres en las piernas que va en aumento al final del día”. Las úlceras venosas siendo con diferencia, el tipo de úlceras más frecuentes de la extremidad inferior, suponen un importante problema de salud, tanto para las personas que las padecen, consecuencia del largo tiempo que precisan hasta su curación, como para los sistemas sanitarios que requieren una gran inversión en recursos humanos y materiales. Para tratarlas, es necesaria la implicación y participación de la persona en el proceso de cuidados, como receptor y eje central del mismo, además de la puesta en marcha de estrategias dirigidas hacia la continuidad de cuidados. Se utiliza, el modelo conceptual de Virginia Henderson (la persona como un todo e independiente) y como metodología enfermera para la gestión y planificación de los cuidados, el Proceso de Atención de Enfermería mediante un lenguaje universal y estandarizado a través de la interrelación de las taxonomías NANDA I - NOC - NIC. La enfermera interviene supliendo o acompañando a la persona, cuando observe la insatisfacción de alguna de las 14 necesidades humanas básicas propuestas por V. Henderson en su modelo, proporcionando cuidados integrales y orientando la actuación hacia el logro de su independencia para llevar a cabo sus autocuidados.

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La amputación traumática de miembro inferior constituye un proceso complicado de adaptación y superación en el que se producen repercusiones en la persona tanto a nivel físico como psicológico y social. Este tipo de cirugía supone un cambio drástico en la vida de quienes las padecen y sus familias, siendo a menudo adultos jóvenes. En consecuencia, todo el equipo multidisciplinar, pero la enfermera de atención domiciliaria especialmente, juega un papel decisivo a la hora de realizar un seguimiento, estabilizar emocionalmente al paciente e integrarle con el entorno, alcanzando el mayor nivel posible de independencia y autonomía (Modelo de Virginia Henderson). Ésta, garantiza la continuidad de cuidados mediante la supervisión, realización de intervenciones y apoyo a la persona y a la familia, tarea que quizás queda relegada por la actuación inicial de la enfermera hospitalaria. Con el objetivo de brindar unos cuidados integrales y de calidad en el domicilio, se elabora un Plan de Cuidados Estandarizado (PCE) específico para este grupo de pacientes. Se utiliza el Lenguaje Enfermero Estandarizado (LEE) a través de las taxonomías NANDA-NOC-NIC, tal y como se recoge en el Real Decreto 1093/2010 del Boletín Oficial del Estado y se adapta en el 2012 al Boletín Oficial del País Vasco.

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En el siguiente trabajo se lleva a cabo un plan de cuidados específico, para personas que están en proceso de duelo por la pérdida de una persona querida y muy significativa en su vida, tras una larga enfermedad, y a la que tuvo que acompañar en su sufrimiento. Para dar respuesta y establecer una relación de ayuda en estas situaciones se precisa de un modelo enfermero, porque si en general es importante centrarse en la persona al proporcionar cuidados, más lo es en este contexto en particular De ahí que se tome como referencia el modelo de necesidades de Virginia Henderson. A partir de ellas y aplicando metodología enfermera, se valora de forma integral a la persona, en las 14 necesidades humanas básicas que ella establece, para poder reconocer aquellas que estén alteradas mediante escalas, cuestionarios e índices que aportan datos relevantes de la situación. Además, emplear metodología enfermera (Proceso de atención de enfermería) contribuye a identificar y enunciar los diagnósticos enfermeros (NANDA) y aplicar e interrelacionar las taxonomías (NOC-NIC) para determinar resultados esperados y las intervenciones más eficaces, que la enfermera realizará para ayudar a la persona en el manejo de sus emociones y de la situación. En definitiva dar respuesta a los requerimientos (necesidades) y ayudar a la persona a lograr un alto grado de independencia.

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La evolución de los cuidados enfermeros en España está íntimamente relacionado con el concepto de salud-enfermedad de cada época histórica. En este presente trabajo se muestra como desde mediados del siglo XX los cuidados adquieren un papel auxiliar del médico hasta llegar a la profesionalización de la enfermería, donde el cuidado se conforma desde una perspectiva holística y se trabaja en ámbitos como la docencia, la gestión y la investigación. En el año 1952 se produce la unificación de enfermeras, practicantes y matronas en la figura de ayudante técnico sanitario (ATS), fecha crucial para comprender la identidad enfermera. Se van estableciendo nuevos modelos de salud y la atención sanitaria se va enfocando hacia áreas como la promoción y la prevención de la salud. De este modo, se implantó una metodología de trabajo propia, denominada Proceso de Atención de Enfermería y se creó la necesidad de un lenguaje común, apareciendo entonces las Taxonomías NANDA, NOC y NIC. Como enfermeras además de prestar cuidados debemos tener una visión amplia del pensamiento crítico, basando los cuidados en enfoques basados en la evidencia. En el año 1977 se produce la integración de los estudios de enfermería en la Universidad bajo el título de Diplomado Universitario de Enfermería y con la Ordenación de Enseñanzas Superiores (2007), se adquiere la titulación de Grado en Enfermería. La historia de nuestra profesión sirve como instrumento de reflexión sobre lo que significa ser enfermero y para poder entenderla y conocerla, es imprescindible el estudio de una investigación histórica.

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Sarreran, gastrostomia-zundaren jatorria eta historia azaltzen da, hau da, noiz erabili zen lehenengo aldiz, zeinek asmatu zuen eta zein aldaketa jasan dituen besteak beste. Halaber, zunda erabiltzen duten gaixoak zein kondiziotan egon behar duten eta zein gaixotasun motatan ipintzen den ere aipatzen da. Lan honen helburua, gastrostomia-zundari buruz eta zunda hau daramaten pertsonei buruz ezaguera handitzea da. Horretarako aztertu dira, gastrostomia-zunda zer den, zein kasutan erabiltzen den, zein konplikazio dituen, zundaren erabileraren aldeko ebidentzia eta gastrostomia-zunda duten pertsonetan erizainaren rola. Lanaren metodologiari dagokionez, hitz gakoak erabiliz gaiari buruzko errebisio narratiboa egin da hainbat datu-base fidagarrietan. Horrez gain, NANDA, NIC eta NOC liburuak ere erabili dira. Bilaketaren irizpide nagusiena, dokumentuak gaiarekin erlazionatutako errebisio bibliografiko, saiakera kliniko, ikerketak eta artikuluak izatea da. Lanaren garapenean, gastrostomia-zundaren definizio eta erabilera azaldu dira. Gastrostomia-zunda urdaila eta abdomena komunikatzen dituen zunda da eta irensketa gutxitua edo galdua geratzen den eta digestio-aparatuak funtzionala izaten jarraitzen duen pertsonetan gomendatzen da erabilera. Bestetik, zundak sor ditzakeen konplikazio posibleak azaldu dira, hauek gehienetan ez dira larriak izaten eta erraz konpon daitezke. Horrez gain, erizainaren rola zundarekiko eta zunda hau daramaten pertsonekiko zein den azaldu da hala nola, zaintzailea eta hezitzailea. Azkenik, gastrostomia-zundaren erabileraren aldeko aurkitu den ebidentzia azaldu da. Eztabaidan, helburuetan aipatutako puntu guztiak aztertu dira eta aurkitutako urritasunetatik proposamenak egin dira. Gainera, zunda honekiko eta zunda hau daramaten pertsonekiko esperientzia propioa ere azaldu da. Ondorio gisa ikusi da, dituen onuren arren, gastrostomia-zundaren erabilerari buruzko ebidentzia garbirik ez dagoela. Gainera, nahiz eta 4-6 astez gutxienez elikadura enterala behar duten eta bizi esperantza 2 hilabetetik gorakoa duten gaixoetan erabiltzen den, ondorioztatu da asaldura neuromuskularrak, endekapeneko gaixotasun neurologikoa eta buru/lepoko minbizian gehien erabiltzen dela. Bestalde, zundak eragiten dituen konplikazio gehienak garrantzi handikoak ez direla eta erraz konpontzen direla ikusi da. Horrez gain, erizainak rol ezberdinak dituela ikusi da, hezitzailearena eta zaintzailera.