Equipamento microprocessado para geração de sinal de correção diferencial, em tempo real, para GPS

This work presents the development of low cost microprocessor-based equipment for generation of differential GPS correction signal, in real time, and configuration and supervision of the GPS base. The developed equipment contains a dedicated microcontroller connected to the GPS receiver, alphanumeric display and multifunction keyboard for configuration and operation of the system and communication interfaces. The electronic circuit has the function of receiving the information from GPS base; interpret them, converting the sentence in the RTCM SC-104 protocol. The microcontroller software makes the conversion of the signal received by the GPS base from the specific format to RTCM SC-104 protocol. The processing main board has two serials RS-232C standard interfaces. One of them is used for configuration and receiving the information generated by the GPS base. The other operates as output, sending the differential correction signal for the transmission system. The development of microprocessor-based equipment showed that it is possible the construction of a low cost private station for real time generation of differential GPS correction signal.

Sistema de sincronismo entre a colhedora de cana-de-açúcar e o veículo de transbordo

One of the problems found in mechanical harvest of sugar cane is the lack of synchronism between the harvest machine and the infield wagon, causing crop losses as well as operational capacity. The objective of the present research was to design a system capable of helping to synchronize the sugar cane harvest machine with the wagon. The communication between tractor and harvest machine is wireless. Two ultrasound sensors coupled to the elevator and a microprocessor manage such information, generating a correct synchronization among the machines. The system was tested in laboratory and on field performing its function adequately, maintaining the two machines in synchronization, indicating and alerting the operators their relative positions. The developed system reduced the sugar cane lost in 60 kg ha-1 comparing to the harvest with the system turned off.

Effects of progressive exercise during phase I cardiac rehabilitation on the heart rate variability of patients with acute myocardial infarction

Purpose. aEuro integral Heart rate variability (HRV) decreases after an acute myocardial infarction (AMI) due to changes in cardiac autonomic balance. The purpose of the present study, therefore, was to evaluate the effects of a progressive exercise protocol used in phase I cardiac rehabilitation on the HRV of patients with post-AMI. Material and methods. aEuro integral Thirty-seven patients who had been admitted to hospital with their first non-complicated AMI were studied. The treated group (TG, n == 21, age == 52 +/-+/- 12 years) performed a 5-day programme of progressive exercise during phase I cardiac rehabilitation, while the control group (CG, n == 16, age == 54 +/-+/- 11 years) performed only respiratory exercises. Instantaneous heart rate (HR) and RR interval were acquired by a HR monitor (Polar (R) A (R) S810i). HRV was analysed by frequency domain methods. Power spectral density was expressed as normalised units (nu) at low (LF) and high (HF) frequencies, and as LF/HF. Results. aEuro integral After 5 days of progressive exercise, the TG showed an increase in HFnu (35.9 +/-+/- 19.5 to 65.19 +/-+/- 25.4) and a decrease in LFnu and LF/HF (58.9 +/-+/- 21.4 to 32.5 +/-+/- 24.1; 3.12 +/-+/- 4.0 to 1.0 +/-+/- 1.5, respectively) in the resting position (p < 0.05). No changes were observed in the CG. Conclusions. aEuro integral A progressive physiotherapeutic exercise programme carried out during phase I cardiac rehabilitation, as supplement to clinical treatment increased vagal and decreased sympathetic cardiac modulation in patients with post-AMI.

A comparative analysis of fault injection methods via enhanced on-chip debug infrastructures

On-chip debug (OCD) features are frequently available in modern microprocessors. Their contribution to shorten the time-to-market justifies the industry investment in this area, where a number of competing or complementary proposals are available or under development, e.g. NEXUS, CJTAG, IJTAG. The controllability and observability features provided by OCD infrastructures provide a valuable toolbox that can be used well beyond the debugging arena, improving the return on investment rate by diluting its cost across a wider spectrum of application areas. This paper discusses the use of OCD features for validating fault tolerant architectures, and in particular the efficiency of various fault injection methods provided by enhanced OCD infrastructures. The reference data for our comparative study was captured on a workbench comprising the 32-bit Freescale MPC-565 microprocessor, an iSYSTEM IC3000 debugger (iTracePro version) and the Winidea 2005 debugging package. All enhanced OCD infrastructures were implemented in VHDL and the results were obtained by simulation within the same fault injection environment. The focus of this paper is on the comparative analysis of the experimental results obtained for various OCD configurations and debugging scenarios.

Real time fault injection using enhanced OCD -- a performance analysis

Fault injection is frequently used for the verification and validation of dependable systems. When targeting real time microprocessor based systems the process becomes significantly more complex. This paper proposes two complementary solutions to improve real time fault injection campaign execution, both in terms of performance and capabilities. The methodology is based on the use of the on-chip debug mechanisms present in modern electronic devices. The main objective is the injection of faults in microprocessor memory elements with minimum delay and intrusiveness. Different configurations were implemented and compared in terms of performance gain and logic overhead.

From design-for-test to design-for-debug-and-test: analysis of requirements and limitations for 1149.1

The increasing complexity of VLSI circuits and the reduced accessibility of modern packaging and mounting technologies restrict the usefulness of conventional in-circuit debugging tools, such as in-circuit emulators for microprocessors and microcontrollers. However, this same trend enables the development of more complex products, which in turn require more powerful debugging tools. These conflicting demands could be met if the standard scan test infrastructures now common in most complex components were able to match the debugging requirements of design verification and prototype validation. This paper analyses the main debug requirements in the design of microprocessor-based applications and the feasibility of their implementation using the mandatory, optional and additional operating modes of the standard IEEE 1149.1 test infrastructure.

Real-time fault injection using enhanced on-chip debug infrastructures

The rapid increase in the use of microprocessor-based systems in critical areas, where failures imply risks to human lives, to the environment or to expensive equipment, significantly increased the need for dependable systems, able to detect, tolerate and eventually correct faults. The verification and validation of such systems is frequently performed via fault injection, using various forms and techniques. However, as electronic devices get smaller and more complex, controllability and observability issues, and sometimes real time constraints, make it harder to apply most conventional fault injection techniques. This paper proposes a fault injection environment and a scalable methodology to assist the execution of real-time fault injection campaigns, providing enhanced performance and capabilities. Our proposed solutions are based on the use of common and customized on-chip debug (OCD) mechanisms, present in many modern electronic devices, with the main objective of enabling the insertion of faults in microprocessor memory elements with minimum delay and intrusiveness. Different configurations were implemented starting from basic Components Off-The-Shelf (COTS) microprocessors, equipped with real-time OCD infrastructures, to improved solutions based on modified interfaces, and dedicated OCD circuitry that enhance fault injection capabilities and performance. All methodologies and configurations were evaluated and compared concerning performance gain and silicon overhead.

A self-healing real-time system based on run-time self-reconfiguration

The new generations of SRAM-based FPGA (field programmable gate array) devices are the preferred choice for the implementation of reconfigurable computing platforms intended to accelerate processing in real-time systems. However, FPGA's vulnerability to hard and soft errors is a major weakness to robust configurable system design. In this paper, a novel built-in self-healing (BISH) methodology, based on run-time self-reconfiguration, is proposed. A soft microprocessor core implemented in the FPGA is responsible for the management and execution of all the BISH procedures. Fault detection and diagnosis is followed by repairing actions, taking advantage of the dynamic reconfiguration features offered by new FPGA families. Meanwhile, modular redundancy assures that the system still works correctly

Sistema de aquisição e comunicação para sensores magnetoelétricos

Dissertação de mestrado integrado em Engenharia Eletrónica Industrial e Computadores

The vulnerability to pollution and hydrochemical variation of eleven springs (catchments) in the karst lowlands of the west of Ireland

The vulnerability to pollution and hydrochemical variation of groundwater in the mid-west karstic lowlands of Ireland were investigated from October 1992 to September 1993, as part of an EU STRIDE project at Sligo Regional Technical College. Eleven springs were studied in the three local authority areas of Co. Galway, Co. Mayo, and Co. Roscommon. Nine of the springs drain locally or regionally important karstic aquifers and two drain locally important sand and gravel aquifers. The maximum average daily discharge of any of the springs was 16,000 m3/day. Determination of the vulnerability of groundwater to pollution relies heavily on an examination of subsoil deposits in an area since they can act as a protecting or filtering layer over groundwater. Within aquifers/spring catchments, chemical reactions such as adsorption, solution-precipitation or acid-base reactions occur and modify the hydrochemistry of groundwater (Lloyd and Heathcote, 1985). The hydrochemical processes) that predominate depend cm the mineralogy of the aquifer, the hydrogeological environment, the overlying subsoils, and the history of groundwater movement. The aim of this MSc research thesis was to investigate the hydrochemical variation of spring outflow and to assess the relationship between these variations and the intrinsic vulnerability of the springs and their catchments. If such a relationship can be quantified, then it is hoped that the hydrochemical variation of a spring may indicate the vulnerability of a spring catchment without the need for determining it by field mapping. Such a method would be invaluable to any of the three local authorities since they would be able to prioritise sources that are most at risk from pollution, using simple techniques of chemical sampling, and statistical analysis. For each spring a detailed geological, hydrogeological and hydrochemical study was carried out. Individual catchment areas were determined with a water balance/budget and groundwater tracing. The subsoils geology for each spring catchment were mapped at the 1:10,560 scale and digitised to the 1:25,000 scale with AutoCad™ and Arclnfo™. The vulnerability of each spring was determined using the Geological Survey's vulnerability guidelines. Field measurements and laboratory based chemistry analyses of the springs were undertaken by personnel from both the EPA Regional Laboratory in Castlebar, Co. Mayo, and the Environment Section of Roscommon Co. Council. Electrical conductivity and temperature (°C) were sampled fortnightly, in the field, using a WTW microprocessor conductivity meter. A percentage (%) vulnerability was applied to each spring in order to indicate the areal extent of the four main classes of vulnerability (Extreme, High, Moderate, and Low) which occurred within the confines of each spring catchment. Hydrochemical variation for the springs were presented as the coefficient of variation of electrical conductivity. The results of this study show that a clear relationship exists between the degree of vulnerability of each catchment area as defined by the subsoil cover and the coefficient of variation of EC, with the coefficient of variation increasing as the vulnerability increases. The coefficient of variation of electrical conductivity is considered to be a parameter that gives a good general reflection of the degree of vulnerability occurring in a spring catchment in Ireland's karstic lowlands.

Diseño de una plataforma de lectura, test y caracterización para ROICs de rayos X basada en el microprocesador LEON

Aquest project es situa dins del marc del CNM-IMB (CSIC). Consisteix en el disseny d'un sistema de biòpsia mamaria en temps real. Per realitzar aquest sistema s’ha dissenyat una plataforma de lectura, test y caracterització pel ROIC Medipix2 que es basa en el microprocessador LEON3 i és programat sobre una FPGA.

Direct electrical stimulation using a battery-operated device for induction and modulation of colonic contractions in pigs.

Direct electrical stimulation of the colon offers a promising approach for the induction of propulsive colonic contractions by using an implantable device. The objective of this study was to assess the feasibility to induce colonic contractions using a commercially available battery-operated stimulator (maximum pulse width of 1 ms and maximum amplitude of 10 V). Three pairs of pacing electrodes were inserted into the cecal seromuscular layer of anesthetized pigs. During a first set of in vivo experiments conducted on six animals, a pacing protocol leading to cecum contractions was determined: stimulation bursts with 1 ms pulse width, 10 V amplitude (7-15 mA), 120 Hz frequency, and 30-s burst duration, repeated every 2-5 min. In a second testing phase, an evaluation of the pacing protocol was performed in four animals (120 stimulation bursts in total). By using the battery-operated stimulator, contractions of the cecum and movement of contents could be induced in 92% of all stimulations. A cecal shortening of about 30% and an average intraluminal pressure increase of 10.0 +/- 6.0 mmHg were observed.

Urinary sphincter based on electronics and artificial muscles

Objectives: The AMS 800TM is the current artificial urinary sphincter (AUS) for incontinence due to intrinsic sphincter deficiency. Despite good clinical results, technical failures inherent to the hydraulic mechanism or urethral ischemic injury contribute to revisions up to 60%. We are developing an electronic AUS, called ARTUS to overcome the rigors of AMS. The objective of this study was to evaluate the technical efficacy and tissue tolerance of the ARTUS system in an animal model.Methods: The ARTUS is composed by three parts: the contractile unit, a series of rings and an integrated microprocessor. The contractile unit is made of Nitinol fibers. The rings are placed around the urethra to control the flow of urine by squeezing the urethra. They work in a sequential alternative mode and are controlled by a microprocessor. In the first phase a three-rings device was used while in the second phase a two-rings ARTUS was used. The device was implanted in 14 sheep divided in two groups of six and eight animals for study purpose. The first group aimed at bladder leak point pressure (BLPP) measurement and validation of the animal model; the second group aimed at verifying mid-term tissue tolerance by explants at twelve weeks. General animal tolerance was also evaluated.Results: The ARTUS system implantation was uneventful. When the system was activated, the BLPP was measured at 1.038±0.044 bar (mean±SD). Urethral tissue analysis did not show significant morphological changes. No infection and no sign of discomfort were noted in animals at 12 weeks.Conclusions: The ARTUS proved to be effective in continence achievement in this study. Histological results support our idea that a sequential alternative mode can avoid urethral atrophy and ischemia. Further technical developments are needed to verify long-term outcome and permit human use.

Diseño de un controlador para una matriz de Led tricolor basado en microprocesador

Diseño de un Controlador para una matriz de Led Tricolor basado en microprocesador, cuya función principal es la de representar en una matriz de 16 x 16 formada por LED Tricolor, una imagen dada por un archivo digital.