Studies in power hardware in the loop (PHIL) simulation using real-time digital simulator (RTDS)

In power hardware in the loop (PHIL) simulations, a real-time simulated power system is interfaced to a piece of hardware, usually called hardware under test (HuT). A PHIL test can be realized using several simulation tools. Among them Real Time Digital Simulator (RTDS) is an ideal tool to perform complex power system simulations in near real-time. Stable operation of the entire system, along with the accuracy of simulation results are the main concerns regarding a PHIL simulation. In this paper, a simulated power network on RTDS will be interfaced to HuT through a voltage source converter (VSC). Issues around stability and other interface problems are studied and a new method to stabilize some unstable PHIL cases is proposed. PHIL simulation results in PSCAD and RSCAD are presented.

Design led innovation : shifting from smart follower to digital strategy leader in the Australian airport sector

This paper presents and discusses organisational barriers and opportunities arising from the dissemination of design led innovation within a leading Australian airport corporation. This research is part of a greater action research program which aims to integrate design as a strategic capability through design led innovation within Australian businesses. Findings reveal that there is an opportunity to employ the theoretical framework and tools of design led innovation in practice to build collaborative idea generation by involving customers and stakeholders within the proposal of new to world propositions. The iterative gathering of deep customer insights also provided an opportunity to leverage a greater understanding of stakeholders and customers in strengthening continuing business partnerships through co-design. Challenges to the design led approach include resistance to the exploratory nature of gathering deep customer insights, the testing of long held assumptions and market data, and the disruption of an organisational mindset geared toward risk aversion instilled within the aviation industry. The implication from these findings is that design led innovation can provide the critical platform to allow for a business to grow and sustain internal design capabilities necessary to challenge prevailing assumptions about how its business model operates to deliver value to customers and stakeholders alike. The platform of design led innovation also provides an avenue to support a cultural transformation towards anticipating future needs necessary for establishing a position of leadership within the broader economic environment.

FPGA based digital platform for the control of AC drives

This paper presents the new trend of FPGA (Field programmable Gate Array) based digital platform for the control of power electronic systems. There is a rising interest in using digital controllers in power electronic applications as they provide many advantages over their analog counterparts. A board comprising of Cyclone device EP1C12Q240C8 of Altera is used for developing this platform. The details of this board are presented. This developed platform can be used for the controller applications such as UPS, Induction Motor drives and front end converters. A real time simulation of a system can also be done. An open-loop induction motor drive has been implemented using this board and experimental results are presented.

A non-linear analogue-to-digital converter for linearization of transducer input-output relationships

Analogue and digital techniques for linearization of non-linear input-output relationship of transducers are briefly reviewed. The condition required for linearizing a non-linear function y = f(x) using a non-linear analogue-to-digital converter, is explained. A simple technique to construct a non-linear digital-to-analogue converter, based on ' segments of equal digital interval ' is described. The technique was used to build an N-DAC which can be employed in a successive approximation or counter-ramp type ADC to linearize the non-linear transfer function of a thermistor-resistor combination. The possibility of achieving an order of magnitude higher accuracy in the measurement of temperature is shown.

Detecting the attributes of a wheat crop using digital imagery acquired from a low-altitude platform

A low-altitude platform utilising a 1.8-m diameter tethered helium balloon was used to position a multispectral sensor, consisting of two digital cameras, above a fertiliser trial plot where wheat (Triticum spp.) was being grown. Located in Cecil Plains, Queensland, Australia, the plot was a long-term fertiliser trial being conducted by a fertiliser company to monitor the response of crops to various levels of nutrition. The different levels of nutrition were achieved by varying nitrogen application rates between 0 and 120 units of N at 40 unit increments. Each plot had received the same application rate for 10 years. Colour and near-infrared images were acquired that captured the whole 2 ha plot. These images were examined and relationships sought between the captured digital information and the crop parameters imaged at anthesis and the at-harvest quality and quantity parameters. The statistical analysis techniques used were correlation analysis, discriminant analysis and partial least squares regression. A high correlation was found between the image and yield (R2 = 0.91) and a moderate correlation between the image and grain protein content (R2 = 0.66). The utility of the system could be extended by choosing a more mobile platform. This would increase the potential for the system to be used to diagnose the causes of the variability and allow remediation, and/or to segregate the crop at harvest to meet certain quality parameters.

A dual-slope analogue-to-digital converter for generating polynomials

A new digital polynomial generator using the principle of dual-slope analogue-to-digital conversion is proposed. Techniques for realizing a wide range of integer as well as fractional coefficients to obtain the desired polynomial have been discussed. The suitability of realizing the proposed polynomial generator in integrated circuit form is also indicated.

An absolute digital positioning numerical control system

A module containing all the functional components required for a digital absolute positioning process of one axis of a machine tool has been designed and constructed. Circuit realization makes use of integrated circuit elements.

Developement of DSP based educational kit for power electronics and drives

The educational kit was developed for power electronics and drives. The need and purpose of this kit is to train engineers with current technology of digital control in power electronics. The DSP is the natural choice as it is able to perform high speed calculations required in power electronics. The educational kit consists of a DSP platform using TI DSP TMS320C50 starter kit, an inverter and an induction machine-dc machine set. A set of experiments have been prepared so that DSP programming can be learned easily in a smooth fashion. Here the application presented is open loop V/F control of three phase induction using sine pulse width modulation technique.

An Inexpensive Digital Network Analyzer

Frequency response analysis is critical in understanding the steady and transient state behavior of any electrical network. Network analyzeror frequency response analyzer is used to determine the frequency response of an electrical network. This paper deals with the design of an inexpensive digitally controlled Network Analyzer. The frequency range of the network analyzer is from 10Hz to 50kHz (suitable range for system studies on most power electronics apparatus). It is composed of a microcontroller (as central processing unit) and a personal computer (as analyzer and display). The communication between the microcontroller and personal computer is established through one of the USB ports. The testing and evaluation of the analyzer is done with RC, RLC and multi-resonant circuits. The design steps, basis of analysis, experimental results, limitation in bandwidth and possible techniques for improvement in performances are presented.

In-situ power monitoring scheme and its application in dynamic voltage and threshold scaling for digital CMOS integrated circuits

An in-situ power monitoring technique for Dynamic Voltage and Threshold scaling (DVTS) systems is proposed which measures total power consumed by load circuit using sleep transistor acting as power sensor. Design details of power monitor are examined using simulation framework in UMC 90nm CMOS process. Experimental results of test chip fabricated in AMS 0.35µm CMOS process are presented. The test chip has variable activity between 0.05 and 0.5 and has PMOS VTH control through nWell contact. Maximum resolution obtained from power monitor is 0.25mV. Overhead of power monitor in terms of its power consumption is 0.244 mW (2.2% of total power of load circuit). Lastly, power monitor is used to demonstrate closed loop DVTS system. DVTS algorithm shows 46.3% power savings using in-situ power monitor.

Optimal Power and Noise for Analog and Digital Sections of a Low Power Radio Receiver

We determine the optimal allocation of power between the analog and digital sections of an RF receiver while meeting the BER constraint. Unlike conventional RF receiver designs, we treat the SNR at the output of the analog front end (SNRAD) as a design parameter rather than a specification to arrive at this optimal allocation. We first determine the relationship of the SNRAD to the resolution and operating frequency of the digital section. We then use power models for the analog and digital sections to solve the power minimization problem. As an example, we consider a 802.15.4 compliant low-IF receiver operating at 2.4 GHz in 0.13 μm technology with 1.2 V power supply. We find that the overall receiver power is minimized by having the analog front end provide an SNR of 1.3dB and the ADC and the digital section operate at 1-bit resolution with 18MHz sampling frequency while achieving a power dissipation of 7mW.

Digital Deadbeat Control Tuning for dc-dc Converters Using Error Correlation

This letter proposes a simple tuning algorithm for digital deadbeat control based on error correlation. By injecting a square-wave reference input and calculating the correlation of the control error, a gain correction for deadbeat control is obtained. The proposed solution is simple, it requires a short tuning time, and it is suitable for different DC-DC converter topologies. Simulation and experimental results on synchronous buck converters confirm the properties of the proposed tuning algorithm.

Performance analysis for geometrical attack on digital image watermarking

We present a technique for irreversible watermarking approach robust to affine transform attacks in camera, biomedical and satellite images stored in the form of monochrome bitmap images. The watermarking approach is based on image normalisation in which both watermark embedding and extraction are carried out with respect to an image normalised to meet a set of predefined moment criteria. The normalisation procedure is invariant to affine transform attacks. The result of watermarking scheme is suitable for public watermarking applications, where the original image is not available for watermark extraction. Here, direct-sequence code division multiple access approach is used to embed multibit text information in DCT and DWT transform domains. The proposed watermarking schemes are robust against various types of attacks such as Gaussian noise, shearing, scaling, rotation, flipping, affine transform, signal processing and JPEG compression. Performance analysis results are measured using image processing metrics.

Digital Simulation of Field-Oriented Control of Induction Motor

This paper describes the simulation of a control scheme using the principle of field orientation for the control of a voltage source inverter-fed induction motor. The control principle is explained, followed by an algorithm to simulate various components of the system in the digital computer. The dynamic response of the system for the load disturbance and set-point variations have been studied. Also, the results of the simulation showing the behavior of field coordinates for such disturbances are given.

Digital Dead Time Logic and Protection Circuitry for PWM Voltage Source Converters

Power semiconductor devices have finite turn on and turn off delays that may not be perfectly matched. In a leg of a voltage source converter, the simultaneous turn on of one device and the turn off of the complementary device will cause a DC bus shoot through, if the turn off delay is larger than the turn on delay time. To avoid this situation it is common practice to blank the two complementary devices in a leg for a small duration of time while switching, which is called dead time. This paper proposes a logic circuit for digital implementation required to control the complementary devices of a leg independently and at the same time preventing cross conduction of devices in a leg, and while providing accurate and stable dead time. This implementation is based on the concept of finite state machines. This circuit can also block improper PWM pulses to semiconductor switches and filters small pulses notches below a threshold time width as the narrow pulses do not provide any significant contribution to average pole voltage, but leads to increased switching loss. This proposed dead time logic has been implemented in a CPLD and is implemented in a protection and delay card for 3- power converters.