Flying-capacitor-based chopper circuit for DC capacitor voltage balancing in diode-clamped multilevel inverter

This paper proposes a flying-capacitor-based chopper circuit for dc capacitor voltage equalization in diode-clamped multilevel inverters. Its important features are reduced voltage stress across the chopper switches, possible reduction in the chopper switching frequency, improved reliability, and ride-through capability enhancement. This topology is analyzed using three- and four-level flying-capacitor-based chopper circuit configurations. These configurations are different in capacitor and semiconductor device count and correspondingly reduce the device voltage stresses by half and one-third, respectively. The detailed working principles and control schemes for these circuits are presented. It is shown that, by preferentially selecting the available chopper switch states, the dc-link capacitor voltages can be efficiently equalized in addition to having tightly regulated flying-capacitor voltages around their references. The various operating modes of the chopper are described along with their preferential selection logic to achieve the desired performances. The performance of the proposed chopper and corresponding control schemes are confirmed through both simulation and experimental investigations.

Dwell-time and run-time control for DC mass rapid transit railways

Dwell times at stations and inter-station run times are the two major operational parameters to maintain train schedule in railway service. Current practices on dwell-time and run-time control are that they are only optimal with respect to certain nominal traffic conditions, but not necessarily the current service demand. The advantages of dwell-time and run-time control on trains are therefore not fully considered. The application of a dynamic programming approach, with the aid of an event-based model, to devise an optimal set of dwell times and run times for trains under given operational constraints over a regional level is presented. Since train operation is interactive and of multi-attributes, dwell-time and run-time coordination among trains is a multi-dimensional problem. The computational demand on devising trains' instructions, a prime concern in real-time applications, is excessively high. To properly reduce the computational demand in the provision of appropriate dwell times and run times for trains, a DC railway line is divided into a number of regions and each region is controlled by a dwell- time and run-time controller. The performance and feasibility of the controller in formulating the dwell-time and run-time solutions for real-time applications are demonstrated through simulations.

AC/DC electrical characteristics of epoxy-multi wall carbon nanotube nanocomposites

Expoxy nanocomposites with multiwell carbon nanotubes (mwcnts) filler up to 0.3%wt were prepared by sheer mixing and good dispersion of the MWCNTS in the epoxy was successfully achieved. The electrical behaviour was characterized by measurements of the alternating current (ac) and direct current (dc) conductives at room temperature. Typical percolation behaviour was observed at a low percolation threshold of 0.055%. Frequency independent ac conductivity was observed at low frequencies but not at high frequencies. An equivalent circuit models was used to predict the impedence response in these nanocomposites.

Corona ions from overhead transmission voltage powerlines : effect on DC e-field and ambient particle concentration levels

Along with their essential role in electricity transmission and distribution, some powerlines also generate large concentrations of corona ions. This study aimed at comprehensive investigation of corona ions, vertical dc e-field, ambient aerosol particle charge and particle number concentration levels in the proximity of some high/sub-transmission voltage powerlines. The influence of meteorology on the instantaneous value of these parameters, and the possible existence of links or associations between the parameters measured were also statistically investigated. The presence of positive and negative polarities of corona ions was associated with variation in the mean vertical dc e-field, ambient ion and particle charge concentration level. Though these variations increased with wind speed, their values also decreased with distance from the powerlines. Predominately positive polarities of ions were recorded up to a distance of 150 m (with the maximum values recorded 50 m downwind of the powerlines). At 200 m from the source, negative ions predominated. Particle number concentration levels however remained relatively constant (103 particle cm-3) irrespective of the sampling site and distance from the powerlines. Meteorological factors of temperature, humidity and wind direction showed no influence on the electrical parameters measured. The study also discovered that e-field measurements were not necessarily a true representation of the ground-level ambient ion/particle charge concentrations.

Modelling bus lost time : an additional parameter influencing bus dwell time and station platform capacity at a BRT station platform

The common approach to estimate bus dwell time at a BRT station is to apply the traditional dwell time methodology derived for suburban bus stops. In spite of being sensitive to boarding and alighting passenger numbers and to some extent towards fare collection media, these traditional dwell time models do not account for the platform crowding. Moreover, they fall short in accounting for the effects of passenger/s walking along a relatively longer BRT platform. Using the experience from Brisbane busway (BRT) stations, a new variable, Bus Lost Time (LT), is introduced in traditional dwell time model. The bus lost time variable captures the impact of passenger walking and platform crowding on bus dwell time. These are two characteristics which differentiate a BRT station from a bus stop. This paper reports the development of a methodology to estimate bus lost time experienced by buses at a BRT platform. Results were compared with the Transit Capacity and Quality of Servce Manual (TCQSM) approach of dwell time and station capacity estimation. When the bus lost time was used in dwell time calculations it was found that the BRT station platform capacity reduced by 10.1%.

A new unequal DC link voltage configuration for a single phase multilevel converter to reduce low order harmonics

Multilevel converters are used in high power and high voltage applications due to their attractive benefits in generating high quality output voltage. Increasing the number of voltage levels can lead to a reduction in lower order harmonics. Various modulation and control techniques are introduced for multilevel converters like Space Vector Modulation (SVM), Sinusoidal Pulse Width Modulation (SPWM) and Harmonic Elimination (HE) methods. Multilevel converters may have a DC link with equal or unequal DC voltages. In this paper a new modulation technique based on harmonic elimination method is proposed for those multilevel converters that have unequal DC link voltages. This new technique has better effect on output voltage quality and less Total Harmonic Distortion (THD) than other modulation techniques. In order to verify the proposed modulation technique, MATLAB simulations are carried out for a single-phase diode-clamped inverter.

High-voltage modular power supply using parallel and series configurations of flyback converter for pulsed power applications

To cover wide range of pulsed power applications, this paper proposes a modularity concept to improve the performance and flexibility of the pulsed power supply. The proposed scheme utilizes the advantage of parallel and series configurations of flyback modules in obtaining high-voltage levels with fast rise time (dv/dt). Prototypes were implemented using 600-V insulated-gate bipolar transistor (IGBT) switches to generate up to 4-kV output pulses with 1-kHz repetition rate for experimentation. To assess the proposed modular approach for higher number of the modules, prototypes were implemented using 1700-V IGBTs switches, based on ten-series modules, and tested up to 20 kV. Conducted experimental results verified the effectiveness of the proposed method

Common DC link in residential LV network to improve the penetration level of Small-Scale Embedded Generators

This paper presents a new approach for network upgrading to improve the penetration level of Small Scale Generators in residential feeders. In this paper, it is proposed that a common DC link can be added to LV network to alleviate the negative impact of increased export power on AC lines, allowing customers to inject their surplus power with no restrictions to the common DC link. In addition, it is shown that the proposed approach can be a pathway from current AC network to future DC network.

Harmonic elimination technique for a single-phase multilevel converter with unequal DC link voltage levels

Multilevel converters, because of the benefits they attract in generating high quality output voltage, are used in several applications. Various modulation and control techniques are introduced by several researchers to control the output voltage of the multilevel converters like space vector modulation and harmonic elimination (HE) methods. Multilevel converters may have a DC link with equal or unequal DC voltages. In this study a new HE technique based on the HE method is proposed for multilevel converters with unequal DC link voltage. The DC link voltage levels are considered as additional variables for the HE method and the voltage levels are defined based on the HE results. Increasing the number of voltage levels can reduce lower order harmonic content because of the fact that more variables are created. In comparison to previous methods, this new technique has a positive effect on the output voltage quality by reducing its total harmonic distortion, which must take into consideration for some applications such as uninterruptable power supply, motor drive systems and piezoelectric transducer excitation. In order to verify the proposed modulation technique, MATLAB simulations and experimental tests are carried out for a single-phase four-level diode-clamped converter.

Parallel and series configurations of flyback converter for pulsed power applications

Advances in solid-state switches and power electronics techniques have led to the development of compact, efficient and more reliable pulsed power systems. Although, the power rating and operation speed of the new solid-state switches are considerably increased, their low blocking voltage level puts a limits in the pulsed power operation. This paper proposes the advantage of parallel and series configurations of pulsed power modules in obtaining high voltage levels with fast rise time (dv/dt) using only conventional switches. The proposed configuration is based on two flyback modules. The effectiveness of the proposed approach is verified by numerical simulations, and the advantages of each configuration are indicated in comparison with a single module.

Control of dc capacitor voltages in diode-clamped multilevel inverter using bidirectional buck-boost choppers

The dc capacitors voltage unbalancing is the main technical drawback of a diode-clamped multilevel inverter (DCMLI), with more than three levels. A voltage-balancing circuit based on buck–boost chopper connected to the dc link of DCMLI is a reliable and robust solution to this problem. This study presents four different schemes for controlling the chopper circuit to achieve the capacitor voltages equalisation. These can be broadly categorised as single-pulse, multi-pulse and hysteresis band current control schemes. The single-pulse scheme does not involve faster switching actions but need the chopper devices to be rated for higher current. The chopper devices current rating can be kept limited by using the multi-pulse scheme but it involves faster switching actions and slower response. The hysteresis band current control scheme offers faster dynamics, lower current rating of the chopper devices and can nullify the initial voltage imbalance as well. However, it involves much faster switching actions which may not be feasible for some of its applications. Therefore depending on the system requirements and ratings, one of these schemes may be used. The performance and validity of the proposed schemes are confirmed through both simulation and experimental investigations on a prototype five-level diode-clamped inverter.

Cascaded DC-DC converter connection of photovoltaic modules

New residential scale photovoltaic (PV) arrays are commonly connected to the grid by a single dc-ac inverter connected to a series string of pv panels, or many small dc-ac inverters which connect one or two panels directly to the ac grid. This paper proposes an alternative topology of nonisolated per-panel dc-dc converters connected in series to create a high voltage string connected to a simplified dc-ac inverter. This offers the advantages of a "converter-per-panel" approach without the cost or efficiency penalties of individual dc-ac grid connected inverters. Buck, boost, buck-boost, and Cu´k converters are considered as possible dc-dc converters that can be cascaded. Matlab simulations are used to compare the efficiency of each topology as well as evaluating the benefits of increasing cost and complexity. The buck and then boost converters are shown to be the most efficient topologies for a given cost, with the buck best suited for long strings and the boost for short strings. While flexible in voltage ranges, buck-boost, and Cu´k converters are always at an efficiency or alternatively cost disadvantage.

Photovoltaic DC-DC module integrated converter for novel cascaded and bypass grid connection topologies - design and optimisation

Grid connected photovoltaic (PV) inverters fall into three broad categories - central, string and module integrated converters (MICs). MICs offer many advantages in performance and flexibility, but are at a cost disadvantage. Two alternative novel approaches proposed by the author - cascaded dc-dc MICs and bypass dc-dc MICs - integrate a simple non-isolated intelligent dc-dc converter with each PV module to provide the advantages of dc-ac MICs at a lower cost. A suitable universal 150 W 5 A dc-dc converter design is presented based on two interleaved MOSFET half bridges. Testing shows zero voltage switching (ZVS) keeps losses under 1 W for bi-directional power flows up to 15 W between two adjacent 12 V PV modules for the bypass application, and efficiencies over 94% for most of the operational power range for the cascaded converter application. Based on the experimental results, potential optimizations to further reduce losses are discussed.

Cascaded DC-DC converter connection of photovoltaic modules

New residential scale photovoltaic (PV) arrays are commonly connected to the grid by a single DC-AC inverter connected to a series string of PV modules, or many small DC-AC inverters which connect one or two modules directly to the AC grid. This paper shows that a "converter-per-module" approach offers many advantages including individual module maximum power point tracking, which gives great flexibility in module layout, replacement, and insensitivity to shading; better protection of PV sources, and redundancy in the case of source or converter failure; easier and safer installation and maintenance; and better data gathering. Simple nonisolated per-module DC-DC converters can be series connected to create a high voltage string connected to a simplified DC-AC inverter. These advantages are available without the cost or efficiency penalties of individual DC-AC grid connected inverters. Buck, boost, buck-boost and Cuk converters are possible cascadable converters. The boost converter is best if a significant step up is required, such as with a short string of 12 PV modules. A string of buck converters requires many more modules, but can always deliver any combination of module power. The buck converter is the most efficient topology for a given cost. While flexible in voltage ranges, buck-boost and Cuk converters are always at an efficiency or alternatively cost disadvantage

Multi-converter topology evaluation for connection of low voltage DC sources

A design for a cascaded multilevel DC-DC converter is proposed. The applications of a multilevel converter and the design issues involved in changing from a single converter to multiple converters are discussed. Implementation of the multilevel system using multiple Cuk converters is suggested and explanations of design decisions are given. The merits of the proposed design are discussed.