A water-dielectric capacitor using hydrated graphene oxide film

Despite the widespread use of paper, plastic or ceramics in dielectric capacitors, water has not been commonly used as a dielectric due to its tendency to become conductive as it easily leaches ions from the environment. We show here that when water is confined between graphene oxide sheets, it can retain its insulating nature and behave as a dielectric. A hydrated graphene oxide film was used as a dielectric spacer to construct a prototype water-dielectric capacitor. The capacitance depends on the water content of the hydrated GO film as well as the voltage applied to the device. Our results show that the capacitance per unit area of the GO film is in the range of 100–800 mF cm �2, which is 5–40 times that of the double layer capacitance per surface area of activated carbon.

Control of dc capacitor voltages in diode-clamped multilevel inverter using bidirectional buck-boost choppers

The dc capacitors voltage unbalancing is the main technical drawback of a diode-clamped multilevel inverter (DCMLI), with more than three levels. A voltage-balancing circuit based on buck–boost chopper connected to the dc link of DCMLI is a reliable and robust solution to this problem. This study presents four different schemes for controlling the chopper circuit to achieve the capacitor voltages equalisation. These can be broadly categorised as single-pulse, multi-pulse and hysteresis band current control schemes. The single-pulse scheme does not involve faster switching actions but need the chopper devices to be rated for higher current. The chopper devices current rating can be kept limited by using the multi-pulse scheme but it involves faster switching actions and slower response. The hysteresis band current control scheme offers faster dynamics, lower current rating of the chopper devices and can nullify the initial voltage imbalance as well. However, it involves much faster switching actions which may not be feasible for some of its applications. Therefore depending on the system requirements and ratings, one of these schemes may be used. The performance and validity of the proposed schemes are confirmed through both simulation and experimental investigations on a prototype five-level diode-clamped inverter.

Robust control scheme for a microgrid with PFC capacitor connected

Capacitors are widely used for power-factor correction (PFC) in power systems. When a PFC capacitor is installed with a certain load in a microgrid, it may be in parallel with the filter capacitor of the inverter interfacing the utility grid and the local distributed-generation unit and, thus, change the effective filter capacitance. Another complication is the possibility of occurrence of resonance in the microgrid. This paper conducts an in-depth investigation of the effective shunt-filter-capacitance variation and resonance phenomena in a microgrid due to a connection of a PFC capacitor. To compensate the capacitance-parameter variation, an Hinfin controller is designed for the voltage-source- inverter voltage control. By properly choosing the weighting functions, the synthesized Hinfin controller would exhibit high gains at the vicinity of the line frequency, similar to traditional high- performance P+ resonant controller and, thus, would possess nearly zero steady-state error. However, with the robust Hinfin controller, it will be possible to explicitly specify the degree of robustness in face of parameter variations. Furthermore, a thorough investigation is carried out to study the performance of inner current-loop feedback variables under resonance conditions. It reveals that filter-inductor current feedback is more effective in damping the resonance. This resonance can be further attenuated by employing the dual-inverter microgrid conditioner and controlling the series inverter as a virtual resistor affecting only harmonic components without interference with the fundamental power flow. And finally, the study in this paper has been tested experimentally using an experimental microgrid prototype.

A three-level flying-capacitor rectifier based supercapacitor direct integration scheme for distributed generation systems

Supercapacitors are increasingly used as short term energy storage elements in distributed generation systems. The traditional approach in integrating them to the main system is the use of interfacing dc-dc converters which introduce additional costs and power losses. This paper therefore, presents a novel direct integration scheme for supercapacitors and thereby eliminates associated costs and power losses of interfacing converters. The idea is simply to replace ordinary capacitors of three-level flying-capacitor rectifiers with supercapacitors and operate them under variable voltage conditions. An analysis on the reduction of power losses by the proposed system is presented. Furthermore, supercapacitor sizing and implementation issues such as effects of the variable voltage operation and resistive behavior of supercapacitors at high frequencies are also discussed. Simulation results are presented to verify the efficacy of the proposed system in suppressing short term power fluctuations in wind generation system.

An analysis on the possibility of using capacitors of a three-level capacitor clamped inverter as power smoothing elements for wind power systems

This paper presents a new direct integration scheme for supercapacitors that are used to mitigate short term power fluctuations in wind power systems. The idea is to replace ordinary capacitors of a 3-level flying capacitor inverter by supercapacitors and operate them under variable voltage conditions. This approach eliminates the need of interfacing dc-dc converters for supercapacitor integration and thus considerably improves the overall efficiency. However, the major problem of this unique system is the change of supercapacitor voltages. An analysis on the effects of these voltage variations are presented. A space vector modulation method, built from the scratch, is proposed to generate undistorted current even in the presence of dynamic changes in supercapacitor voltages. A supercapacitor voltage equalisation algorithm is also proposed. Furthermore, resistive behavior of supercapacitors at high frequencies and the need for a low pass filter are highlighted. Simulation results are presented to verify the efficacy of the proposed system in suppressing short term wind power fluctuations.

Application of TS-Fuzzy Controller for Active Power and DC Capacitor Voltage Control in DFIG-Based Wind Energy Conversion Systems

This chapter focuses on the implementation of the TS (Tagaki-Sugino) fuzzy controller for the Doubly Fed Induction Generator (DFIG) based wind generator. The conventional PI control loops for mantaining desired active power and DC capacitor voltage is compared with the TS fuzzy controllers. DFIG system is represented by a third-order model where electromagnetic transients of the stator are neglected. The effectiveness of the TS-fuzzy controller on the rotor speed oscillations and the DC capacitor voltage variations of the DFIG damping controller on converter ratings is also investigated. The results from the time domain simulations are presented to elucidate the effectiveness of the TS-fuzzy controller over the conventional PI controller in the DFIG system. The proposed TS-fuzzy con-troller can improve the fault ride through capability of DFIG compared to the conventional PI controller.

A DC-link Capacitor Voltage Balancing with CMV Elimination using only the Switching State Redundancies for a Reduced Switch Count Multi-Level Inverter fed IM Drive

Common mode voltage (CMV) variations in PWM inverter-fed drives generate unwanted shaft and bearing current resulting in early motor failure. Multilevel inverters reduce this problem to some extent, with higher number of levels. But the complexity of the power circuit increases with an increase in the number of inverter voltage levels. In this paper a five-level inverter structure is proposed for open-end winding induction motor (IM) drives, by cascading only two conventional two-level and three-level inverters, with the elimination of the common mode voltage over the entire modulation range. The DC link power supply requirement is also optimized by means of DC link capacitor voltage balancing, with PWM control., using only inverter switching state redundancies. The proposed power circuit gives a simple power bits structure.

A Simple Five-Level Inverter Topology for Induction Motor Drive Using Conventional Two-Level Inverters and Flying Capacitor Technique

This paper proposes a new five-level inverter topology for open-end winding induction motor (IM) drive. The popular existing circuit configurations for five-level inverter include the NPC inverter and flying capacitor topologies. Compared to the NPC inverter, the proposed topology eliminates eighteen clamping diodes having different voltage ratings in the present circuit. Moreover it requires only one capacitor bank per phase, whereas flying capacitor schemes for five level topologies require six capacitor banks per phase. The proposed topology is realized by feeding the phase winding of an open-end induction motor with two-level inverters in series with flying capacitors. The flying capacitor voltages are balanced using the switching state redundancy for full modulation range. The proposed inverter scheme is capable of producing two-level to five-level pulse width modulated voltage across the phase winding depending on the modulation range. Additionally, in case of any switch failure in the flying capacitor connection, the proposed inverter topology can be operated as a three-level inverter for full modulation range. The proposed scheme is experimentally verified on a four pole, 5hp induction motor drive.

A Hybrid Multilevel Inverter Topology for an Open-End Winding Induction-Motor Drive Using Two-Level Inverters in Series With a Capacitor-Fed H-Bridge Cell

In this paper, a new five-level inverter topology for open-end winding induction-motor (IM) drive is proposed. The open-end winding IM is fed from one end with a two-level inverter in series with a capacitor-fed H-bridge cell, while the other end is connected to a conventional two-level inverter. The combined inverter system produces voltage space-vector locations identical to that of a conventional five-level inverter. A total of 2744 space-vector combinations are distributed over 61 space-vector locations in the proposed scheme. With such a high number of switching state redundancies, it is possible to balance the H-bridge capacitor voltages under all operating conditions including overmodulation region. In addition to that, the proposed topology eliminates 18 clamping diodes having different voltage ratings compared with the neutral point clamped inverter. On the other hand, it requires only one capacitor bank per phase, whereas the flying-capacitor scheme for a five-level topology requires more than one capacitor bank per phase. The proposed inverter topology can be operated as a three-level inverter for full modulation range, in case of any switch failure in the capacitor-fed H-bridge cell. This will increase the reliability of the system. The proposed scheme is experimentally verified on a four-pole 5-hp IM drive.

A Seven-Level Inverter Topology for Induction Motor Drive Using Two-Level Inverters and Floating Capacitor Fed H-Bridges

A multilevel inverter topology for seven-level space vector generation is proposed in this paper. In this topology, the seven-level structure is realized using two conventional two-level inverters and six capacitor-fed H-bridge cells. It needs only two isolated dc-voltage sources of voltage rating V(dc)/2 where V(dc) is the dc voltage magnitude required by the conventional neutral point clamped (NPC) seven-level topology. The proposed topology is capable of maintaining the H-bridge capacitor voltages at the required level of V(dc)/6 under all operating conditions, covering the entire linear modulation and overmodulation regions, by making use of the switching state redundancies. In the event of any switch failure in H-bridges, this inverter can operate in three-level mode, a feature that enhances the reliability of the drive system. The two-level inverters, which operate at a higher voltage level of V(dc)/2, switch less compared to the H-bridges, which operate at a lower voltage level of V(dc)/6, resulting in switching loss reduction. The experimental verification of the proposed topology is carried out for the entire modulation range, under steady state as well as transient conditions.

A Multilevel inverter structure with cascaded two level and three level inverters for IM drive with CMV elimination and DC link capacitor voltage balancing

Common mode voltage (CMV) variations in PWM inverter-fed drives generate unwanted shaft and bearing current resulting in early motor failure. Multilevel inverters reduce this problem to some extent, with higher number of levels. But the complexity of the power circuit increases with an increase in the number of inverter voltage levels. In this paper a five-level inverter structure is proposed for open-end winding induction motor (IM) drives, by cascading only two conventional two-level and three-level inverters, with the elimination of the common mode voltage over the entire modulation range. The DC link power supply requirement is also optimized by means of DC link capacitor voltage balancing, with PWM control, using only inverter switching state redundancies. The proposed power circuit gives a simple power bus structure.

A Five-Level Inverter Topology with Single-DC Supply by Cascading a Flying Capacitor Inverter and an H-Bridge

In this paper, a new three-phase, five-level inverter topology with a single-dc source is presented. The proposed topology is obtained by cascading a three-level flying capacitor inverter with a flying H-bridge power cell in each phase. This topology has redundant switching states for generating different pole voltages. By selecting appropriate switching states, the capacitor voltages can be balanced instantaneously (as compared to the fundamental) in any direction of the current, irrespective of the load power factor. Another important feature of this topology is that if any H-bridge fails, it can be bypassed and the configuration can still operate as a three-level inverter at its full power rating. This feature improves the reliability of the circuit. A 3-kW induction motor is run with the proposed topology for the full modulation range. The effectiveness of the capacitor balancing algorithm is tested for the full range of speed and during the sudden acceleration of the motor.

Multilevel Dodecagonal Voltage Space Vector Generation using Flying Capacitor topology for Induction motor drives

In this paper, a multilevel flying capacitor inverter topology suitable for generating multilevel dodecagonal space vectors for an induction motor drive, is proposed. Because of the dodecagonal space vectors, it has increased modulation range with the absence of all 6n +/- 1, (n=odd) harmonics in the phase voltage and currents. The topology, realized by flying capacitor three level inverters feeding an open-end winding induction motor, does not suffer the neutral point voltage imbalance issues seen in NPC inverters and the capacitors have inherent charge-balancing capability with PWM control using switching state redundancies. Furthermore, the proposed technique uses lesser number of power supplies compared to cascaded H-bridge or NPC based dodecagonal schemes and has better ride-through capability. Finally, the voltage control is obtained through a simple carrier-based space vector PWM scheme implemented on a DSP.