The design of cascaded resistors in a new analog switch two-step ADC architecture

In this paper we introduce a new Half-flash analog switch ADC architecture. And we discuss two methods to design the values of the cascaded resistors which generate the reference voltages. Derailed analysis about the effect of analog switches and comparators on reference voltages, and the methods to set the resistor values and correspond;ng voltage errors are given.

Informe final contrato ADC-2014-258 - ADC-CA2014-111 - ADC-CA2014-162 - ADC-CA2014-207.

116 hojas : ilustraciones, fotográficas a color.

Q-enhancement with on-chip inductor optimization for reconfigurable Δ-Σ radio-frequency ADC

The paper details on-chip inductor optimization for a reconfigurable continuous-time delta-sigma (Δ-Σ) modulator based radio-frequency analog-to-digital converter. Inductor optimisation enables the Δ-Σ modulator with Q enhanced LC tank circuits employing a single high Q-factor on-chip inductor and lesser quantizer levels thereby reducing the circuit complexity for excess loop delay, power dissipation and dynamic element matching. System level simulations indicate at a Q-factor of 75 Δ- Σ modulator with a 3-level quantizer achieves dynamic ranges of 106, 82 dB and 84 dB for RFID, TETRA, and Galileo over bandwidths of 200 kHz, 10 MHz and 40 MHz respectively.

The effect of clock jitter on the performance of continuous-time delta-sigma ADC for GNSS signals

Next generation Global Navigation Satellite System (GNSS) receivers will operate in multiple navigation bands. An efficient way to achieve this with lower power and cost is to employ BandPass Sampling (BPS); nevertheless, the sampling operation injects large amounts of jitter noise, which degrades the performance of the receiver. Continuous–Time (CT) Delta–Sigma (ΔΣ) modulators are capable of suppressing this noise but the impact of clock jitter at the output of the Digital– to–Analog Converter (DAC) in the feedback path of the modulator should be taken into account. This paper presents an analytical approach for describing clock jitter in GNSS receivers when a CT–ΔΣ modulator is utilized for Analog–to–Digital Conversion (ADC). The validity of the presented approach is verified through time–domain simulations using a behavioural model of the fourth–order CT–ΔΣ modulator with 1–bit NRZ DAC feedback pulse.

Design Techniques for Sigmadelta based ADC for Wireless Applications

Analog-to digital Converters (ADC) have an important impact on the overall performance of signal processing system. This research is to explore efficient techniques for the design of sigma-delta ADC,specially for multi-standard wireless tranceivers. In particular, the aim is to develop novel models and algorithms to address this problem and to implement software tools which are avle to assist the designer's decisions in the system-level exploration phase. To this end, this thesis presents a framework of techniques to design sigma-delta analog to digital converters.A2-2-2 reconfigurable sigma-delta modulator is proposed which can meet the design specifications of the three wireless communication standards namely GSM,WCDMA and WLAN. A sigma-delta modulator design tool is developed using the Graphical User Interface Development Environment (GUIDE) In MATLAB.Genetic Algorithm(GA) based search method is introduced to find the optimum value of the scaling coefficients and to maximize the dynamic range in a sigma-delta modulator.

Wideband Low-Distortion Sigma-Delta ADC for WLAN

This work presents a wideband low-distortion sigmadelta analog-to-digital converter (ADC) for Wireless Local Area Network (WLAN) standard. The proposed converter makes use of low-distortion swing suppression SDM architecture which is highly suitable for low oversampling ratios to attain high linearity over a wide bandwidth. The modulator employs a 2-2 cascaded sigma-delta modulator with feedforward path with a single-bit quantizer in the first stage and 4-bit in the second stage. The modulator is designed in TSMC 0.18um CMOS technology and operates at 1.8V supply voltage. Simulation results show that, a peak SNDR of 57dB and a spurious free dynamic range (SFDR) of 66dB is obtained for a 10MHz signal bandwidth, and an oversampling ratio of 8.

A Multi-Mode Sigma-Delta ADC for GSM/WCDMA/ WLAN Applications

The demand for new telecommunication services requiring higher capacities, data rates and different operating modes have motivated the development of new generation multi-standard wireless transceivers. In multistandard design, sigma-delta based ADC is one of the most popular choices. To this end, in this paper we present cascaded 2-2-2 reconfigurable sigma-delta modulator that can handle GSM, WCDMA and WLAN standards. The modulator makes use of a low-distortion swing suppression topology which is highly suitable for wide band applications. In GSM mode, only the first stage (2nd order Σ-Δ ADC) is used to achieve a peak SNDR of 88dB with oversampling ratio of 160 for a bandwidth of 200KHz and for WCDMA mode a 2-2 cascaded structure (4th order) is turned on with 1-bit in the first stage and 2-bit in the second stage to achieve 74 dB peak SNDR with over-sampling ratio of 16 for a bandwidth of 2MHz. Finally, a 2-2-2 cascaded MASH architecture with 4-bit in the last stage is proposed to achieve a peak SNDR of 58dB for WLAN for a bandwidth of 20MHz. The novelty lies in the fact that unused blocks of second and third stages can be made inactive to achieve low power consumption. The modulator is designed in TSMC 0.18um CMOS technology and operates at 1.8 supply voltage

Estudio de los beneficios de la implementación del modelo de gestión cloud computing en comparación al modelo de gestión tradicional. Caso de estudio: Corporación ADC-HAS Management Ecuador S.A.

El desarrollo eficiente y oportuno de las actividades propias de las empresas exige una constante renovación en su infraestructura, capacitación permanente de su staff, investigar nuevas tecnológicas y la asignación cada vez mayor del presupuesto para su área de TIC. Varios modelos de gestión han intentado suplir estas necesidades, entre los que se puede mencionar a: hosting, outsourcing, leasing, servicios profesionales, asesorías especializadas, entre otros. El modelo de gestión cloud computing y sus diversas opciones se está posicionando últimamente como la solución más viable y rápida de implementar. De ahí que, este proyecto se enfoca en el estudio de este modelo como una alternativa al modelo de gestión tradicional de servicios TIC, y toma como referencia para el desarrollo de esta tesis la situación actual de la infraestructura tecnológica de la Corporación ADC&HAS Management Ecuador S.A. No se pretende justificar al cloud como una solución definitiva, sino plantear este modelo como una alternativa útil a la realidad tecnológica de la Corporación, y en base a sus propiedades concluir que fue el modelo que mejor se ajustó a la estrategia institucional en términos: organizacionales, tecnológicos y financieros, por lo menos para los próximos cinco años. En los dos primeros capítulos se referencian algunos elementos conceptuales en los que se fundamenta las TIC y se mencionan ciertos parámetros que intervinieron en su evolución. El tercer capítulo describe a la Corporación; y en el capítulo cuarto se aplican los conceptos de los primeros capítulos reforzados con las experiencias publicadas en la revista Computerworld (2010 hasta la presente) y que permitieron evaluar los beneficios de los dos modelos de gestión y las razones para implementarlos o mantenerlos.

Alguns efeitos distorcivos gerados pela aplicação da legislação comercial e tributária brasileira nas conclusões de uma análise de demonstrativos contábeis (ADC): proposta corretivas, ou, ADC: uma visão crítica da realidade comercial tributária brasileira

Revisa as principais técnicas de Análise de Demonstrativos Contábeis, apontando algumas das causas que afastam da realidade, as conclusões obtidas por tal sistemática. Aborda com destaque as limitações de ordem técnica, vinculadas ao processo contábil, e aquelas de ordem estrutural decorrentes da exigência legal da adoção de certos procedimentos contábeis impróprios em diversas situações. Apresenta algumas propostas corretivas.

Calibrazione di un rilevatore gamma con un flash adc e il software di acquisizione dati dell'esperimento atlas

La tesi descrive lo sviluppo di un pezzo di software di acquisizione dati per l'esperimento LUCID di ATLAS al CERN che viene testato nella calibrazione di due rivelatori inorganici cristallini allo ioduro di sodio