402 resultados para WAFER


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A new method of reversibly moving US nanoparticles in the perpendicular direction was developed on the basis of the phase separation of block copolymer brushes. Polystyrene-b-(poly(methyl methaerylate)-co-poly(cadmium dimethacrylate)) (PS-b-(PMMA-co-PCdMA)) brushes were grafted from the silicon wafer by surface-initiated atom transfer radical polymerization (ATRP). By exposing the polymer brushes to H2S gas, PS-b-(PMNlA-co-PCdNlA) brushes were converted to polystyrene-b-(poly(methyl methacrylate) -co-poly(methacrylic acid)(CdS)) (PS-b-(PMMA-co-PMAA(CdS))) brushes, in which US nanoparticles were chemically bonded by the carboxylic groups of PMAA segment. Alternating treatment of the PS-b-(PMMA-co-PMAA(CdS)) brushes by selective solvents for the outer block (a mixed solvent of acetone and ethanol) and the inner PS block (toluene) induced perpendicular phase separation of polymer brushes, which resulted in the reversible lifting and lowering of US nanoparticles in the perpendicular direction. The extent of movement can be adjusted by the relative thickness of two blocks of the polymer brushes.

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In this paper, we presented a novel covalent bonding process between two quartz wafers at 300 degrees C. High-quality wafer bonding was formed by the hydroxylization, aminosilylation and atom transfer radical polymerization (ATRP) of glycidyl methacrylate (GMA), respectively, on quartz wafer surfaces, followed by close contact of the GMA functional wafer and the aminosilylation wafer, the epoxy group opening ring reaction was catalyzed by the amino and solidified to form the covalent bonding of the quartz wafers. The shear force between two wafers in all bonding samples was higher than 1.5 MPa. Microfluidic chips bonded by the above procedures had high transparency and the present procedure avoided the adhesive to block or flow into the channel.

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We have studied the lamellar orientation in thin films of a model diblock copolymer, symmetric poly(styrene)-b-poly(L-lactide) (PS-PLLA), in the melt state on supported silicon wafer surface. In this system, while the PLLA block prefers to wet the polymer/substrate interface, the polymer/air as well as polymer/polymer interface is neutral for both blocks due to the similar surface energies of PS and PLLA in melt state. Our results demonstrate that the interplay of the interfaces during phase separation results in a series of structures before approaching the equilibrium state. Lamellar orientation of thin films with different initial film thicknesses at different annealing stages has been investigated using atomic force microscopy (AFM), transmission electronic microscopy (TEM), and X-ray photoelectron spectroscopy (XPS). It is found that in the early stage (annealing time t < 10 min), the polymer/substrate interface dominates the structure evolution, leading to a parallel lamellar structure with holes or islands formed depending on the initial film thickness. Later on, the neutral air interface becomes important and leads to a transition of lamellar orientation from parallel to perpendicular. It is interesting to see that for films with thickness h > 2L, where L is the bulk lamellar period, the lamellar orientation transition can occur independently in different parallel lamellar domains due to the neutrality of polymer/polymer interface.

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The molecular chain and lamellar crystal orientation in ultrathin films (thickness < 100 nm) of poly(di-n-hexylsilane) (PDHS) on silicon wafer substrates have been investigated by using transmission electronic microscopy, wide-angle X-ray diffraction, atomic force microscopy, and UV absorption spectroscopy. PDHS showed a film thickness-dependent molecular chain and lamellar crystal orientation. Lamellar crystals grew preferentially in flat-on orientation in the monolayer ultrathin films of PDHS, i.e., the silicon backbones were oriented along the surface-normal direction. By contrast, the orientation of lamellar crystals was preferentially edge-on in ultrathin films thicker than ca. 13 nm, i.e., the silicon backbones were oriented parallel to the substrate surface. We interpret the different orientations of molecular chain and lamellar crystal as due to the reduction of the entropy of the polymer chain near the substrate surface and the particularity of the crystallographic (001) plane of flat-on lamellae, respectively. A remarkable influence of the orientations of the silicon backbone on the UV absorption of these PDHS ultrathin films was observed due to the one-dimensional nature of sigma-electrons delocalized along the silicon backbone.

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The effects of solvent nature on the surface topographies of polystyrene (PS)/poly(methyl methacrylate) (PMMA) blend films spin-coated onto the silicon wafer were investigated. Four different solvents, such as ethylbenzene, toluene, tetrahydrofuran and dichloromethane, were chosen. They are better solvents for PS than that for PMMA. When dichloromethane, tetrahydrofuran and toluene were used, PMMA-rich phase domains protruded from the background of PS. When ethylbenzene was used, PS-rich phase domains elevated on the average height of PMMA-rich phase domains. In addition, continuous pits, networks and isolated droplets consisted of PS formed on the blend film surfaces with the decrease of polymer concentrations. The mechanism of the surface morphology evolution was discussed in detail.

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The surface morphology and crystallization behavior of a weakly segregated symmetric diblock copolymer, poly(styrene-b-6-caprolactone) (PS-b-PCL), in thin films were investigated by optical microscopy, X-ray photoelectron spectroscopy, and atomic force microscopy (AFM). When the samples were annealed in the molten state, surface-induced ordering, that is, relief structures with uniform thickness or droplets in the adsorbed monolayer, were observed depending on the annealing temperature. The polar PCL block preferred to wet the surface of a silicon wafer, while the PS block wet the air interface. This asymmetric wetting behavior led to the adsorbed monolayer with a PCL block layer having a thickness of around 4.0 nm. The crystallization of PCL blocks could overwhelm the microphase-separated structure because of the weak segregation. In situ observation of crystal growth indicated that the nucleation process preferred to occur at the edge of the thick parts of the film, that is, the relief structures or droplets. The crystal growth rate was presented by the time dependence of the distance between the tip of crystal clusters and the edge. At 22 and 17 degreesC, the average crystal growth rates were 55 +/- 10 and 18 +/- 4 nm/min, respectively.

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In this article we present a mechanical pattern transfer process where a thermosetting polymer mold instead of a metal, dielectric, ceramic, or semiconductor master made by conventional lithography was used as the master to pattern thermoplastic polymers in hot embossing lithography. The thermosetting polymer mold was fabricated by a soft lithography strategy, microtransfer molding. For comparison, the thermosetting polymer mold and the silicon wafer master were both used to imprint the thermoplastic polymer, polymethylmethacrylate. Replication of the thermosetting polymer mold and the silicon wafer master was of the same quality. This indicates that the thermosetting polymer mold could be used for thermoplastic polymer patterning in hot embossing lithography with high fidelity.

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Langstaff, David; Chase, T., (2007) 'A multichannel detector array with 768 pixels developed for electron spectroscopy', Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment 573(1-2) pp.169-171 RAE2008

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This paper reports on the design and the manufacturing of an integrated DCDC converter, which respects the specificity of sensor node network: compactness, high efficiency in acquisition and transmission modes, and compatibility with miniature Lithium batteries. A novel integrated circuit (ASIC) has been designed and manufactured to provide regulated Voltage to the sensor node from miniaturized, thin film Lithium batteries. Then, a 3D integration technique has been used to integrate this ASIC in a 3 layers stack with high efficiency passives components, mixing the wafer level technologies from two different research institutions. Electrical results have demonstrated the feasibility of this integrated system and experiments have shown significant improvements in the case of oscillations in regulated voltage. However, stability of this output voltage toward the input voltage has still to be improved.

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Technology boosters, such as strain, HKMG and FinFET, have been introduced into semiconductor industry to extend Moore’s law beyond 130 nm technology nodes. New device structures and channel materials are highly demanded to keep performance enhancement when the device scales beyond 22 nm. In this work, the properties and feasibility of the proposed Junctionless transistor (JNT) have been evaluated for both Silicon and Germanium channels. The performance of Silicon JNTs with 22 nm gate length have been characterized at elevated temperature and stressed conditions. Furthermore, steep Subthreshold Slopes (SS) in JNT and IM devices are compared. It is observed that the floating body in JNT is relatively dynamic comparing with that in IM devices and proper design of the device structure may further reduce the VD for a sub- 60 mV/dec subthreshold slope. Diode configuration of the JNT has also been evaluated, which demonstrates the first diode without junctions. In order to extend JNT structure into the high mobility material Germanium (Ge), a full process has been develop for Ge JNT. Germanium-on-Insulator (GeOI) wafers were fabricated using Smart-Cut with low temperature direct wafer bonding method. Regarding the lithography and pattern transfer, a top-down process of sub-50-nm width Ge nanowires is developed in this chapter and Ge nanowires with 35 nm width and 50 nm depth are obtained. The oxidation behaviour of Ge by RTO has been investigated and high-k passivation scheme using thermally grown GeO2 has been developed. With all developed modules, JNT with Ge channels have been fabricated by the CMOScompatible top-down process. The transistors exhibit the lowest subthreshold slope to date for Ge JNT. The devices with a gate length of 3 μm exhibit a SS of 216 mV/dec with an ION/IOFF current ratio of 1.2×103 at VD = -1 V and DIBL of 87 mV/V.

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This thesis covers both the packaging of silicon photonic devices with fiber inputs and outputs as well as the integration of laser light sources with these same devices. The principal challenge in both of these pursuits is coupling light into the submicrometer waveguides that are the hallmark of silicon-on-insulator (SOI) systems. Previous work on grating couplers is leveraged to design new approaches to bridge the gap between the highly-integrated domain of silicon, the Interconnected world of fiber and the active region of III-V materials. First, a novel process for the planar packaging of grating couplers with fibers is explored in detail. This technology allows the creation of easy-to-use test platforms for laser integration and also stands on its own merits as an enabling technology for next-generation silicon photonics systems. The alignment tolerances of this process are shown to be well-suited to a passive alignment process and for wafer-scale assembly. Furthermore, this technology has already been used to package demonstrators for research partners and is included in the offerings of the ePIXfab silicon photonics foundry and as a design kit for PhoeniX Software’s MaskEngineer product. After this, a process for hybridly integrating a discrete edge-emitting laser with a silicon photonic circuit using near-vertical coupling is developed and characterized. The details of the various steps of the design process are given, including mechanical, thermal, optical and electrical steps. The interrelation of these design domains is also discussed. The construction process for a demonstrator is outlined, and measurements are presented of a series of single-wavelength Fabry-Pérot lasers along with a two-section laser tunable in the telecommunications C-band. The suitability and potential of this technology for mass manufacture is demonstrated, with further opportunities for improvement detailed and discussed in the conclusion.

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Silicon (Si) is the base material for electronic technologies and is emerging as a very attractive platform for photonic integrated circuits (PICs). PICs allow optical systems to be made more compact with higher performance than discrete optical components. Applications for PICs are in the area of fibre-optic communication, biomedical devices, photovoltaics and imaging. Germanium (Ge), due to its suitable bandgap for telecommunications and its compatibility with Si technology is preferred over III-V compounds as an integrated on-chip detector at near infrared wavelengths. There are two main approaches for Ge/Si integration: through epitaxial growth and through direct wafer bonding. The lattice mismatch of ~4.2% between Ge and Si is the main problem of the former technique which leads to a high density of dislocations while the bond strength and conductivity of the interface are the main challenges of the latter. Both result in trap states which are expected to play a critical role. Understanding the physics of the interface is a key contribution of this thesis. This thesis investigates Ge/Si diodes using these two methods. The effects of interface traps on the static and dynamic performance of Ge/Si avalanche photodetectors have been modelled for the first time. The thesis outlines the original process development and characterization of mesa diodes which were fabricated by transferring a ~700 nm thick layer of p-type Ge onto n-type Si using direct wafer bonding and layer exfoliation. The effects of low temperature annealing on the device performance and on the conductivity of the interface have been investigated. It is shown that the diode ideality factor and the series resistance of the device are reduced after annealing. The carrier transport mechanism is shown to be dominated by generation–recombination before annealing and by direct tunnelling in forward bias and band-to-band tunnelling in reverse bias after annealing. The thesis presents a novel technique to realise photodetectors where one of the substrates is thinned by chemical mechanical polishing (CMP) after bonding the Si-Ge wafers. Based on this technique, Ge/Si detectors with remarkably high responsivities, in excess of 3.5 A/W at 1.55 μm at −2 V, under surface normal illumination have been measured. By performing electrical and optical measurements at various temperatures, the carrier transport through the hetero-interface is analysed by monitoring the Ge band bending from which a detailed band structure of the Ge/Si interface is proposed for the first time. The above unity responsivity of the detectors was explained by light induced potential barrier lowering at the interface. To our knowledge this is the first report of light-gated responsivity for vertically illuminated Ge/Si photodiodes. The wafer bonding approach followed by layer exfoliation or by CMP is a low temperature wafer scale process. In principle, the technique could be extended to other materials such as Ge on GaAs, or Ge on SOI. The unique results reported here are compatible with surface normal illumination and are capable of being integrated with CMOS electronics and readout units in the form of 2D arrays of detectors. One potential future application is a low-cost Si process-compatible near infrared camera.

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This work focuses on development of electrostatic supercapacitors (ESCs) using process routes compatible with complementary metal–oxide–semiconductor (CMOS) fabrication. Wafer-scale anodised aluminium oxide (AAO) processing techniques have been developed to produce high-surface area templates. Statistically optimised atomic layer deposition (ALD) processes have been developed to conformally coat the templates and generate metalinsulator-metal capacitor structures. Detailed electrical characterisation and analysis for a range of devices, revealed ESC’s with high capacitance densities of ~12 μF cm-2 and equivalent energy densities of 0.28 Wh/kg . Finally the suitability of ESC’s toward next generation energy storage applications is discussed.

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Nanostructured materials are central to the evolution of future electronics and biomedical applications amongst other applications. This thesis is focused on developing novel methods to prepare a number of nanostructured metal oxide particles and films by a number of different routes. Part of the aim was to see how techniques used in nanoparticle science could be applied to thin film methods to develop functional surfaces. Wet-chemical methods were employed to synthesize and modify the metal oxide nanostructures (CeO2 and SiO2) and their structural properties were characterized through advanced X-ray diffraction, electron microscopy, photoelectron spectroscopy and other techniques. Whilst particulates have uses in many applications, their attachment to surfaces is of importance and this is frequently challenging. We examined the use of block copolymer methods to form very well defined metal oxide particulate-like structures on the surface of a number of substrates. Chapter 2 describes a robust method to synthesize various sized silica nanoparticles. As-synthesized silica nanoparticles were further functionalized with IR-820 and FITC dyes. The ability to create size controlled nanoparticles with associated (optical) functionality may have significant importance in bio-medical imaging. Thesis further describes how non-organic modified fluorescent particles might be prepared using inorganic oxides. A study of the concentrations and distributions of europium dopants within the CeO2 nanoparticles was undertaken and investigated by different microscopic and spectroscopic techniques. The luminescent properties were enhanced by doping and detailed explanations are reported. Additionally, the morphological and structural evolution and optical properties were correlated as a function of concentrations of europium doping as well as with further annealing. Further work using positron annihilation spectroscopy allowed the study of vacancy type defects formed due to europium doping in CeO2 crystallites and this was supported by complimentary UV-Vis spectra and XRD work. During the last few years the interest in mesoporous silica materials has increased due to their typical characteristics such as potential ultra-low dielectric constant materials, large surface area and pore volume, well-ordered and uniform pores with adjustable pores between 2 and 50 nm. A simple, generic and cost-effective route was used to demonstrate the synthesis of 2D mesoporous silica thin films over wafer scale dimensions in chapter 5. Lithographic resist and in situ hard mask block copolymer followed by ICP dry etching were used to fabricate mesoporous silica nanostructures. The width of mesoporous silica channels can be varied by using a variety of commercially available lithographic resists whereas depth of the mesoporous silica channels can be varied by altering the etch time. The crystal structure, morphology, pore arrangement, pore diameters, thickness of films and channels were determined by XRD, SEM, ellipsometry and the results reported. This project also extended work towards the study of the antimicrobial study of nanopatterned silver nanodot arrays formed using the block copolymer approach defined above. Silver nanodot arrays were successfully tested for antimicrobial activity over S. aureus and P. aeruginosa biofilms and results shows silver nanodots has good antimicrobial activity for both S. aureus and P. aeruginosa biofilms. Thus, these silver nanodot arrays shows a potential to be used as a substitute for the resolution of infection complications in many areas.

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Surface plasmons supported by metal nanoparticles are perturbed by coupling to a surface that is polarizable. Coupling results in enhancement of near fields and may increase the scattering efficiency of radiative modes. In this study, we investigate the Rayleigh and Raman scattering properties of gold nanoparticles functionalized with cyanine deposited on silicon and quartz wafers and on gold thin films. Dark-field scattering images display red shifting of the gold nanoparticle plasmon resonance and doughnut-shaped scattering patterns when particles are deposited on silicon or on a gold film. The imaged radiation patterns and individual particle spectra reveal that the polarizable substrates control both the orientation and brightness of the radiative modes. Comparison with simulation indicates that, in a particle-surface system with a fixed junction width, plasmon band shifts are controlled quantitatively by the permittivity of the wafer or the film. Surface-enhanced resonance Raman scattering (SERRS) spectra and images are collected from cyanine on particles on gold films. SERRS images of the particles on gold films are doughnut-shaped as are their Rayleigh images, indicating that the SERRS is controlled by the polarization of plasmons in the antenna nanostructures. Near-field enhancement and radiative efficiency of the antenna are sufficient to enable Raman scattering cyanines to function as gap field probes. Through collective interpretation of individual particle Rayleigh spectra and spectral simulations, the geometric basis for small observed variations in the wavelength and intensity of plasmon resonant scattering from individual antenna on the three surfaces is explained.