Magnetic arm-switch-based three-phase series-shunt compensated quality AC power supply

This study presents a novel magnetic arm-switch-based integrated magnetic circuit for a three-phase series-shunt compensated uninterruptible power supply (UPS). The magnetic circuit acts as a common interacting field for a number of energy ports, viz., series inverter, shunt inverter, grid and load. The magnetic arm-switching technique ensures equivalent series or shunt connection between the inverters. In normal grid mode (stabiliser mode), the series inverter is used for series voltage correction and the shunt one for current correction. The inverters and the load are effectively connected in parallel when the grid power is not available. These inverters are then used to share the load power. The operation of the inverters in parallel is ensured by the magnetic arm-switching technique. This study also includes modelling of the magnetic circuit. A graphical technique called bond graph is used to model the system. In this model, the magnetic circuit is represented in terms of gyrator-capacitors. Therefore the model is also termed as gyrator-capacitor model. The model is used to extract the dynamic equations that are used to simulate the system using MATLAB/SIMULINK. This study also discusses a synchronously rotating reference frame-based control technique that is used for the control of the series and shunt inverters in different operating modes. Finally, the gyrator-capacitor model is validated by comparing the simulated and experimental results.

Simple theoretical analysis of the photoemission from quantum confined effective mass superlattices of optoelectronic materials

The photoemission from quantum wires and dots of effective mass superlattices of optoelectronic materials was investigated on the basis of newly formulated electron energy spectra, in the presence of external light waves, which controls the transport properties of ultra-small electronic devices under intense radiation. The effect of magnetic quantization on the photoemission from the aforementioned superlattices, together with quantum well superlattices under magnetic quantization, has also been investigated in this regard. It appears, taking HgTe/Hg1-xCdxTe and InxGa1-xAs/InP effective mass superlattices, that the photoemission from these quantized structures is enhanced with increasing photon energy in quantized steps and shows oscillatory dependences with the increasing carrier concentration. In addition, the photoemission decreases with increasing light intensity and wavelength as well as with increasing thickness exhibiting oscillatory spikes. The strong dependence of the photoemission on the light intensity reflects the direct signature of light waves on the carrier energy spectra. The content of this paper finds six different applications in the fields of low dimensional systems in general.

Effect of power line filter on MOV clamping voltage

Metal oxide varistors (MOV) are popularly used to protect offline electronic equipment against power line transients. The offline switched mode power supplies (SMPS) use power line filters and MOVs in the front-end. The power line filter is used to reduce the conducted noise emission into the power line and the MOVs connected before this line filter and the MOVs connected before this line filter to clamp line transients to safer levels thereby protecting the SMPS. Because of the presence of 'X' capacitors at the input of line filter the MOV clamping voltage is increased. This paper presents one such case and gives theoretical and experimental results. An approximate method to predetermine the magnitude of such clamping voltages is also presented.

Five-level inverter voltage-space phasor generation for an open-end winding induction motor drive

A topology for voltage-space phasor generation equivalent to a five-level inverter for an open-end winding induction motor is presented. The open-end winding induction motor is fed from both ends by two three-level inverters. The three-level inverters are realised by cascading two two-level inverters. This inverter scheme does not experience neutral-point fluctuations. Of the two three-level inverters only one will be switching at any instant in the lower speed ranges. In the multilevel carrier-based SPWM used for the proposed drive, a progressive discrete DC bias depending on the speed range is given to the reference wave to reduce the inverter switchings. The drive is implemented and tested with a 1 HP open-end winding induction motor and experimental results are presented.

On the two dimensional effective electron mass in quantum wells, inversion layers and NIPI superlattices of Kane type semiconductors in the presence of strong light waves: Simplified theory and relative comparison

An attempt is made to study the two dimensional (2D) effective electron mass (EEM) in quantum wells (Qws), inversion layers (ILs) and NIPI superlattices of Kane type semiconductors in the presence of strong external photoexcitation on the basis of a newly formulated electron dispersion laws within the framework of k.p. formalism. It has been found, taking InAs and InSb as examples, that the EEM in Qws, ILs and superlattices increases with increasing concentration, light intensity and wavelength of the incident light waves, respectively and the numerical magnitudes in each case is band structure dependent. The EEM in ILs is quantum number dependent exhibiting quantum jumps for specified values of the surface electric field and in NIPI superlattices; the same is the function of Fermi energy and the subband index characterizing such 2D structures. The appearance of the humps of the respective curves is due to the redistribution of the electrons among the quantized energy levels when the quantum numbers corresponding to the highest occupied level changes from one fixed value to the others. Although the EEM varies in various manners with all the variables as evident from all the curves, the rates of variations totally depend on the specific dispersion relation of the particular 2D structure. Under certain limiting conditions, all the results as derived in this paper get transformed into well known formulas of the EEM and the electron statistics in the absence of external photo-excitation and thus confirming the compatibility test. The results of this paper find three applications in the field of microstructures. (C) 2011 Elsevier Ltd. All rights reserved.

A Five-Level Inverter Topology with Single-DC Supply by Cascading a Flying Capacitor Inverter and an H-Bridge

In this paper, a new three-phase, five-level inverter topology with a single-dc source is presented. The proposed topology is obtained by cascading a three-level flying capacitor inverter with a flying H-bridge power cell in each phase. This topology has redundant switching states for generating different pole voltages. By selecting appropriate switching states, the capacitor voltages can be balanced instantaneously (as compared to the fundamental) in any direction of the current, irrespective of the load power factor. Another important feature of this topology is that if any H-bridge fails, it can be bypassed and the configuration can still operate as a three-level inverter at its full power rating. This feature improves the reliability of the circuit. A 3-kW induction motor is run with the proposed topology for the full modulation range. The effectiveness of the capacitor balancing algorithm is tested for the full range of speed and during the sudden acceleration of the motor.

A Simple Charge Model for Symmetric Double-Gate MOSFETs Adapted to Gate-Oxide-Thickness Asymmetry

Surface-potential-based compact charge models for symmetric double-gate metal-oxide-semiconductor field-effect transistors (SDG-MOSFETs) are based on the fundamental assumption of having equal oxide thicknesses for both gates. However, for practical devices, there will always be some amount of asymmetry between the gate oxide thicknesses due to process variations and uncertainties, which can affect device performance significantly. In this paper, we propose a simple surface-potential-based charge model, which is applicable for tied double-gate MOSFETs having same gate work function but could have any difference in gate oxide thickness. The proposed model utilizes the unique so-far-unexplored quasi-linear relationship between the surface potentials along the channel. In this model, the terminal charges could be computed by basic arithmetic operations from the surface potentials and applied biases, and thus, it could be implemented in any circuit simulator very easily and extendable to short-channel devices. We also propose a simple physics-based perturbation technique by which the surface potentials of an asymmetric device could be obtained just by solving the input voltage equation of SDG devices for small asymmetry cases. The proposed model, which shows excellent agreement with numerical and TCAD simulations, is implemented in a professional circuit simulator through the Verilog-A interface and demonstrated for a 101-stage ring oscillator simulation. It is also shown that the proposed model preserves the source/drain symmetry, which is essential for RF circuit design.

Improvements in Efficiency of Surface Potential Computation for Independent DG MOSFET

A robust numerical solution of the input voltage equations (IVEs) for the independent-double-gate metal-oxide-semiconductor field-effect transistor requires root bracketing methods (RBMs) instead of the commonly used Newton-Raphson (NR) technique due to the presence of nonremovable discontinuity and singularity. In this brief, we do an exhaustive study of the different RBMs available in the literature and propose a single derivative-free RBM that could be applied to both trigonometric and hyperbolic IVEs and offers faster convergence than the earlier proposed hybrid NR-Ridders algorithm. We also propose some adjustments to the solution space for the trigonometric IVE that leads to a further reduction of the computation time. The improvement of computational efficiency is demonstrated to be about 60% for trigonometric IVE and about 15% for hyperbolic IVE, by implementing the proposed algorithm in a commercial circuit simulator through the Verilog-A interface and simulating a variety of circuit blocks such as ring oscillator, ripple adder, and twisted ring counter.

Physics-Based Band Gap Model for Relaxed and Strained 100] Silicon Nanowires

In this paper, we propose a physics-based simplified analytical model of the energy band gap and electron effective mass in a relaxed and strained rectangular 100] silicon nanowires (SiNWs). Our proposed formulation is based on the effective mass approximation for the nondegenerate two-band model and 4 x 4 Luttinger Hamiltonian for energy dispersion relation of conduction band electrons and the valence band heavy and light holes, respectively. Using this, we demonstrate the effect of the uniaxial strain applied along 100]-direction and a biaxial strain, which is assumed to be decomposed from a hydrostatic deformation along 001] followed by a uniaxial one along the 100]-direction, respectively, on both the band gap and the transport and subband electron effective masses in SiNW. Our analytical model is in good agreement with the extracted data using the extended-Huckel-method-based numerical simulations over a wide range of device dimensions and applied strain.

Electrical Resistance and Seebeck Coefficient in PbTe Nanowires

We address a physics-based simplified analytical formulation of the diffusive electrical resistance ( (Omega)) and Seebeck coefficient () in a PbTe nanowire dominated by acoustic phonon scattering under the presence of a low static longitudinal electric field. The use of a second-order nonparabolic electron energy band structure involving a geometry-dependent band gap has been selected in principle to demonstrate that the electron mean free path (MFP) in such a system can reach as low as about 8 nm at room temperature for a 10-nm-wide PbTe nanowire. This is followed by the formulation of the carrier back-scattering coefficient for determination of (Omega) and as functions of wire dimensions, temperature, and the field, respectively. The present analytical formulation agrees well with the available experimental data and may find extensive use in determination of various electrothermal transport phenomena in PbTe-based one-dimensional electron devices.

Online Computation of Hysteresis Boundary for Constant Switching Frequency Current-Error Space-Vector-Based Hysteresis Controller for VSI-Fed IM Drives

This paper proposes a current-error space-vector-based hysteresis controller with online computation of boundary for two-level inverter-fed induction motor (IM) drives. The proposed hysteresis controller has got all advantages of conventional current-error space-vector-based hysteresis controllers like quick transient response, simplicity, adjacent voltage vector switching, etc. Major advantage of the proposed controller-based voltage-source-inverters-fed drive is that phase voltage frequency spectrum produced is exactly similar to that of a constant switching frequency space-vector pulsewidth modulated (SVPWM) inverter. In this proposed hysteresis controller, stator voltages along alpha- and beta-axes are estimated during zero and active voltage vector periods using current errors along alpha- and beta-axes and steady-state model of IM. Online computation of hysteresis boundary is carried out using estimated stator voltages in the proposed hysteresis controller. The proposed scheme is simple and capable of taking inverter upto six-step-mode operation, if demanded by drive system. The proposed hysteresis-controller-based inverter-fed drive scheme is experimentally verified. The steady state and transient performance of the proposed scheme is extensively tested. The experimental results are giving constant frequency spectrum for phase voltage similar to that of constant frequency SVPWM inverter-fed drive.

Aggregate download throughput for TCP-controlled long file transfers in a WLAN with multiple STA-AP association rates

We consider several WLAN stations associated at rates r(1), r(2), ... r(k) with an Access Point. Each station (STA) is downloading a long file from a local server, located on the LAN to which the Access Point (AP) is attached, using TCP. We assume that a TCP ACK will be produced after the reception of d packets at an STA. We model these simultaneous TCP-controlled transfers using a semi-Markov process. Our analytical approach leads to a procedure to compute aggregate download, as well as per-STA throughputs, numerically, and the results match simulations very well. (C) 2012 Elsevier B.V. All rights reserved.

Piecewise Linearization Technique for Compact Charge Modeling of Independent DG MOSFET

Charge linearization techniques have been used over the years in advanced compact models for bulk and double-gate MOSFETs in order to approximate the position along the channel as a quadratic function of the surface potential (or inversion charge densities) so that the terminal charges can be expressed as a compact closed-form function of source and drain end surface potentials (or inversion charge densities). In this paper, in case of the independent double-gate MOSFETs, we show that the same technique could be used to model the terminal charges quite accurately only when the 1-D Poisson solution along the channel is fully hyperbolic in nature or the effective gate voltages are same. However, for other bias conditions, it leads to significant error in terminal charge computation. We further demonstrate that the amount of nonlinearity that prevails between the surface potentials along the channel actually dictates if the conventional charge linearization technique could be applied for a particular bias condition or not. Taking into account this nonlinearity, we propose a compact charge model, which is based on a novel piecewise linearization technique and shows excellent agreement with numerical and Technology Computer-Aided Design (TCAD) simulations for all bias conditions and also preserves the source/drain symmetry which is essential for Radio Frequency (RF) circuit design. The model is implemented in a professional circuit simulator through Verilog-A, and simulation examples for different circuits verify good model convergence.