975 resultados para CMOS synchronous circuits


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This paper formally derives a new path-based neural branch prediction algorithm (FPP) into blocks of size two for a lower hardware solution while maintaining similar input-output characteristic to the algorithm. The blocked solution, here referred to as B2P algorithm, is obtained using graph theory and retiming methods. Verification approaches were exercised to show that prediction performances obtained from the FPP and B2P algorithms differ within one mis-prediction per thousand instructions using a known framework for branch prediction evaluation. For a chosen FPGA device, circuits generated from the B2P algorithm showed average area savings of over 25% against circuits for the FPP algorithm with similar time performances thus making the proposed blocked predictor superior from a practical viewpoint.

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This paper presents a clocking pipeline technique referred to as a single-pulse pipeline (PP-Pipeline) and applies it to the problem of mapping pipelined circuits to a Field Programmable Gate Array (FPGA). A PP-pipeline replicates the operation of asynchronous micropipelined control mechanisms using synchronous-orientated logic resources commonly found in FPGA devices. Consequently, circuits with an asynchronous-like pipeline operation can be efficiently synthesized using a synchronous design methodology. The technique can be extended to include data-completion circuitry to take advantage of variable data-completion processing time in synchronous pipelined designs. It is also shown that the PP-pipeline reduces the clock tree power consumption of pipelined circuits. These potential applications are demonstrated by post-synthesis simulation of FPGA circuits. (C) 2004 Elsevier B.V. All rights reserved.

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This paper proposes the subspace-based space-time (ST) dual-rate blind linear detectors for synchronous DS/CDMA systems, which can be viewed as the ST extension of our previously presented purely temporal dual-rate blind linear detectors. The theoretical analyses on their performances are also carried out. Finally, the two-stage ST blind detectors are presented, which combine the adaptive purely temporal dual-rate blind MMSE filters with the non-adaptive beamformer. Their adaptive stages with parallel structure converge much faster than the corresponding adaptive ST dual-rate blind MMSE detectors, while having a comparable computational complexity to the latter.

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By using a deterministic approach, an exact form for the synchronous detected video signal under a ghosted condition is presented. Information regarding the phase quadrature-induced ghost component derived from the quadrature forming nature of the vestigial sideband (VSB) filter is obtained by crosscorrelating the detected video with the ghost cancel reference (GCR) signal. As a result, the minimum number of taps required to correctly remove all the ghost components is subsequently presented. The results are applied to both National Television System Committee (NTSC) and phase alternate line (PAL) television.

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This paper presents a simple clocking technique to migrate classical synchronous pipelined designs to a synchronous functional-equivalent alternative system in the context of FPGAs. When the new pipelined design runs at the same throughput of the original design, around 30% better mW/MHz ratio was observed in Virtex-based FPGA circuits. The evaluation is done using a simple but representative and practical systolic design as an example. The technique in essence is a simple replacement of the clocking mechanism for the pipe-storage elements; however no extra design effort is needed. The results show that the proposed technique allows immediate power and area-time savings of existing designs rather than exploring potential benefits by a new logic design to the problem using the classic pipeline clocking mechanism.

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This paper presents a semi-synchronous pipeline scheme, here referred as single-pulse pipeline, to the problem of mapping pipelined circuits to a Field Programmable Gate Array (FPGA). Area and timing considerations are given for a general case and later applied to a systolic circuit as illustration. The single-pulse pipeline can manage asynchronous worst-case data completion and it is evaluated against two chosen asynchronous pipelining: a four-phase bundle-data pipeline and a doubly-latched asynchronous pipeline. The semi-synchronous pipeline proposal takes less FPGA area and operates faster than the two selected fully-asynchronous schemes for an FPGA case.

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Schottky barrier diodes have been integrated into on-chip rectangular waveguides. Two novel techniques have been developed to fabricate diodes with posts suitable for integration into waveguides. One technique produces diodes with anode diameters of the order of microns with post heights from 90 to 125 microns and the second technique produces sub-micron anodes with post heights around 20 microns. A method has been developed to incorporate these structures into a rectangular waveguide and provide a top contact onto the anode which could be used as an I.F. output in a mixer circuit. Devices have been fabricated and D.C. characterized.

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OBJECTIVE: The goal of this study was to investigate the potential crosstalk between Rap1 and Rac1, 2 small GTPases central to platelet activation, particularly downstream of the collagen receptor GPVI. METHODS AND RESULTS: We compared the activation response of platelets with impaired Rap signaling (double knock-out; deficient in both the guanine nucleotide exchange factor, CalDAG-GEFI, and the Gi-coupled receptor for ADP, P2Y12), to that of wild-type platelets treated with a small-molecule Rac inhibitor, EHT 1864 (wild-type /EHT). We found that Rac1 is sequentially activated downstream of Rap1 on stimulation via GPVI. In return, Rac1 provides important feedback for both CalDAG-GEFI- and P2Y12-dependent activation of Rap1. When analyzing platelet responses controlled by Rac1, we observed (1) impaired lamellipodia formation, clot retraction, and granule release in both double knock-out and EHT 1864-treated wild-type platelets; and (2) reduced calcium store release in EHT 1864-treated wild-type but not double knock-out platelets. Consistent with the latter finding, we identified 2 pools of Rac1, one activated immediately downstream of GPVI and 1 activated downstream of Rap1. CONCLUSIONS: We demonstrate important crosstalk between Rap1 and Rac1 downstream of GPVI. Whereas Rap1 signaling directly controls sustained Rac1 activation, Rac1 affects CalDAG-GEFI- and P2Y12-dependent Rap1 activation via its role in calcium mobilization and granule/ADP release, respectively.

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Cells recruited by the innate immune response rely on surface-expressed molecules in order to receive signals from the local environment and to perform phagocytosis, cell adhesion, and others processes linked to host defense. Hundreds of surface antigens designated through a cluster of differentiation (CD) number have been used to identify particular populations of leukocytes. Surprisingly, we verified that the genes that encode Cd36 and Cd83 are constitutively expressed in specific neuronal cells. For instance, Cd36 mRNA is expressed in some regions related to circuitry involved in pheromone responses and reproductive behavior. Cd44 expression, reanalyzed and detailed here, is associated with the laminar formation and midline thalamic nuclei in addition to striatum, extended amygdala, and a few hypothalamic, cortical, and hippocampal regions. A systemic immune challenge was able to increase Cd44 expression quickly in the area postrema and motor nucleus of the vagus but not in regions presenting expressive constitutive expression. In contrast to Cd36 and Cd44, Cd83 message was widely distributed from the olfactory bulb to the brain stem reticular formation, sparing the striatopallidum, olivary region, and cerebellum. Its pattern of expression nevertheless remained strongly associated with hypothalamic, thalamic, and hindbrain nuclei. Unlike the other transcripts, Cd83 mRNA was rapidly modulated by restraint stress. Our results indicate that these molecules might play a role in specific neural circuits and present functions other than those attributed to leukocyte biology. The data also suggest that these surface proteins, or their associated mRNA, could be used to label neurons in specific circuits/regions. J. Comp. Neurol. 517:906-924, 2009. (C) 2009 Wiley-Liss, Inc.