Mechanical properties of structures 3D printed with cementitious powders

The three dimensional (3D) printing technology has undergone rapid development in the last few years and it is now possible to print engineering structures. This paper presents a study of the mechanical behavior of 3D printed structures using cementitious powder. Microscopic observation reveals that the 3D printed products have a layered orthotropic microstructure, in which each layer consists of parallel strips. Compression and flexural tests were conducted to determine the mechanical properties and failure characteristics of such materials. The test results confirmed that the 3D printed structures are laminated with apparent orthotropy. Based on the experimental results, a stress-strain relationship and a failure criterion based on the maximum stress criterion for orthotropic materials are proposed for the structures of 3D printed material. Finally, a finite element analysis was conducted for a 3D printed shell structure, which shows that the printing direction has a significant influence on the load bearing capacity of the structure.

Effects of Poly (ε-caprolactone) Coating on the Properties of Three-Dimensional Printed Porous Structures

Powder-based inkjet three-dimensional printing (3DP) to fabricate pre-designed 3D structures has drawn increasing attention. However there are intrinsic limitations associated with 3DP technology due to the weak bonding within the printed structure, which significantly compromises its mechanical integrity. In this study, calcium sulphate ceramic structures demonstrating a porous architecture were manufactured using 3DP technology and subsequently post-processed with a poly (ε-caprolactone) (PCL) coating. PCL concentration, immersion time, and number of coating layers were the principal parameters investigated and improvement in compressive properties was the measure of success. Interparticle spacing within the 3DP structures were successfully filled with PCL material. Consequently the compressive properties, wettability, morphology, and in vitro resorption behaviour of 3DP components were significantly augmented. The average compressive strength, Young’s modulus, and toughness increased 217%, 250%, and 315%, following PCL coating. Addition of a PCL surface coating provided long-term structural support to the host ceramic material, extending the resorption period from less than 7 days to a minimum of 56 days. This study has demonstrated that application of a PCL coating onto a ceramic 3DP structure was a highly effective approach to addressing some of the limitations of 3DP manufacturing and allows this advanced technology to be potentially used in a wider range of applications.

Synchronisation in high-performance integrated circuits

A distribui ção de um sinal relógio, com elevada precisão espacial (baixo skew) e temporal (baixo jitter ), em sistemas sí ncronos de alta velocidade tem-se revelado uma tarefa cada vez mais demorada e complexa devido ao escalonamento da tecnologia. Com a diminuição das dimensões dos dispositivos e a integração crescente de mais funcionalidades nos Circuitos Integrados (CIs), a precisão associada as transições do sinal de relógio tem sido cada vez mais afectada por varia ções de processo, tensão e temperatura. Esta tese aborda o problema da incerteza de rel ogio em CIs de alta velocidade, com o objetivo de determinar os limites do paradigma de desenho sí ncrono. Na prossecu ção deste objectivo principal, esta tese propõe quatro novos modelos de incerteza com âmbitos de aplicação diferentes. O primeiro modelo permite estimar a incerteza introduzida por um inversor est atico CMOS, com base em parâmetros simples e su cientemente gen éricos para que possa ser usado na previsão das limitações temporais de circuitos mais complexos, mesmo na fase inicial do projeto. O segundo modelo, permite estimar a incerteza em repetidores com liga ções RC e assim otimizar o dimensionamento da rede de distribui ção de relógio, com baixo esfor ço computacional. O terceiro modelo permite estimar a acumula ção de incerteza em cascatas de repetidores. Uma vez que este modelo tem em considera ção a correla ção entre fontes de ruí do, e especialmente util para promover t ecnicas de distribui ção de rel ogio e de alimentação que possam minimizar a acumulação de incerteza. O quarto modelo permite estimar a incerteza temporal em sistemas com m ultiplos dom ínios de sincronismo. Este modelo pode ser facilmente incorporado numa ferramenta autom atica para determinar a melhor topologia para uma determinada aplicação ou para avaliar a tolerância do sistema ao ru ído de alimentação. Finalmente, usando os modelos propostos, são discutidas as tendências da precisão de rel ogio. Conclui-se que os limites da precisão do rel ogio são, em ultima an alise, impostos por fontes de varia ção dinâmica que se preveem crescentes na actual l ogica de escalonamento dos dispositivos. Assim sendo, esta tese defende a procura de solu ções em outros ní veis de abstração, que não apenas o ní vel f sico, que possam contribuir para o aumento de desempenho dos CIs e que tenham um menor impacto nos pressupostos do paradigma de desenho sí ncrono.

Nonlinear behavioral modeling of mixed signal RF-digital I/O devices

Esta tese investiga a caracterização (e modelação) de dispositivos que realizam o interface entre os domínios digital e analógico, tal como os buffers de saída dos circuitos integrados (CI). Os terminais sem fios da atualidade estão a ser desenvolvidos tendo em vista o conceito de rádio-definido-por-software introduzido por Mitola. Idealmente esta arquitetura tira partido de poderosos processadores e estende a operação dos blocos digitais o mais próximo possível da antena. Neste sentido, não é de estranhar que haja uma crescente preocupação, no seio da comunidade científica, relativamente à caracterização dos blocos que fazem o interface entre os domínios analógico e digital, sendo os conversores digital-analógico e analógico-digital dois bons exemplos destes circuitos. Dentro dos circuitos digitais de alta velocidade, tais como as memórias Flash, um papel semelhante é desempenhado pelos buffers de saída. Estes realizam o interface entre o domínio digital (núcleo lógico) e o domínio analógico (encapsulamento dos CI e parasitas associados às linhas de transmissão), determinando a integridade do sinal transmitido. Por forma a acelerar a análise de integridade do sinal, aquando do projeto de um CI, é fundamental ter modelos que são simultaneamente eficientes (em termos computacionais) e precisos. Tipicamente a extração/validação dos modelos para buffers de saída é feita usando dados obtidos da simulação de um modelo detalhado (ao nível do transístor) ou a partir de resultados experimentais. A última abordagem não envolve problemas de propriedade intelectual; contudo é raramente mencionada na literatura referente à caracterização de buffers de saída. Neste sentido, esta tese de Doutoramento foca-se no desenvolvimento de uma nova configuração de medição para a caracterização e modelação de buffers de saída de alta velocidade, com a natural extensão aos dispositivos amplificadores comutados RF-CMOS. Tendo por base um procedimento experimental bem definido, um modelo estado-da-arte é extraído e validado. A configuração de medição desenvolvida aborda não apenas a integridade dos sinais de saída mas também do barramento de alimentação. Por forma a determinar a sensibilidade das quantias estimadas (tensão e corrente) aos erros presentes nas diversas variáveis associadas ao procedimento experimental, uma análise de incerteza é também apresentada.

South Carolina/Common Pleas Court Circuits Meeting Benchmark

This is a list of the courts in all the circuits of South Carolina and the percentage of cases disposed of in 365 day or less. None of the courts met the 80% benchmark.

South Carolina/Common Pleas Court Circuits Meeting Benchmark ... as of August 31, 2014

This is a list of the courts in all the circuits of South Carolina and the percentage of cases disposed of in 365 day or less as of August 31, 2014. None of the courts met the 80% benchmark.

South Carolina/common pleas court circuits meeting benchmark 80% of Pending Docket 365 Days or Less From Placement on the Trial Docket as of February 28, 2015

This is a list of the courts in all the circuits of South Carolina and the percentage of cases disposed of in 365 day or less. Only three courts met the 80% benchmark.

South Carolina/general sessions court circuits meeting benchmark : 80% of pending docket 365 days or less as of February 28, 2015

This document provides statistics on criminal and general sessions courts meeting the benchmark of 80% of pending dockets broken down by circuits and counties.

South Carolina/family court circuits meeting benchmark : 80% of pending docket 365 days or less as of February 28, 2015

This is a diagram broken down by circuits of the percentage of family courts meeting the benchmark of 80% of disposing of cases within a year.

Nonlinear distortion evaluation of reconfigurable RF circuits in wireless communication systems

A compact highly linear microstrip dual - mode optically switchable filter and a reconfigurable power amplifier are presented. The key characteristics of the dual - mode switchable filter are investigated and described. A second order filter design procedure is outlined to facilitate the realisation of Butterworth and Chebyshev functions. The proposed filter was built and tested with an optical switch, which comprised of a silicon dice acti vated using near infrared light. The measured and simulated results are in good agreement. The measured insertion loss in the ON state was 3.0 dB the isolation in the OFF state was 45 dB at the centre frequency. An evaluation of filter distortion is presen ted for digitally modulated M - QAM and M - QAM OFDM singals.

Celiac disease detection using a transglutaminase electrochemical immunosensor fabricated on nanohybrid screen-printed carbon electrodes

Celiac disease is a gluten-induced autoimmune enteropathy characterized by the presence of tissue tranglutaminase (tTG) autoantibodies. A disposable electrochemical immunosensor (EI) for the detection of IgA and IgG type anti-tTG autoantibodies in real patient’s samples is presented. Screen-printed carbon electrodes (SPCE) nanostructurized with carbon nanotubes and gold nanoparticles were used as the transducer surface. This transducer exhibits the excellent characteristics of carbon–metal nanoparticle hybrid conjugation and led to the amplification of the immunological interaction. The immunosensing strategy consisted of the immobilization of tTG on the nanostructured electrode surface followed by the electrochemical detection of the autoantibodies present in the samples using an alkaline phosphatase (AP) labelled anti-human IgA or IgG antibody. The analytical signal was based on the anodic redissolution of enzymatically generated silver by cyclic voltammetry. The results obtained were corroborated with a commercial ELISA kit indicating that the electrochemical immunosensor is a trustful analytical screening tool.

Electrochemical immunosensor for multiplexed detection of food-borne pathogens using nanocrystal bioconjugates and MWCNT screen-printed electrode

Bacterial food poisoning is an ever-present threat that can be prevented with proper care and handling of food products. A disposable electrochemical immunosensor for the simultaneous measurements of common food pathogenic bacteria namely Escherichia coli O157:H7 (E. coli), campylobacter and salmonella were developed. The immunosensor was fabricated by immobilizing the mixture of anti-E. coli, anticampylobacter and anti-salmonella antibodies with a ratio of 1:1:1 on the surface of the multiwall carbon nanotube-polyallylamine modified screen printed electrode (MWCNT-PAH/SPE). Bacteria suspension became attached to the immobilized antibodies when the immunosensor was incubated in liquid samples. The sandwich immunoassay was performed with three antibodies conjugated with specific nanocrystal ( -E. coli-CdS, -campylobacter-PbS and -salmonella-CuS) which has releasable metal ions for electrochemical measurements. The square wave anodic stripping voltammetry (SWASV) was employed to measure released metal ions from bound antibody nanocrystal conjugates. The calibration curves for three selected bacteria were found in the range of 1 × 103 – 5 × 105 cells mL−1 with the limit of detection (LOD) 400 cells mL−1 for salmonella, 400 cells mL−1 for campylobacter and 800 cells mL−1 for E. coli. The precision and sensitivity of this method show the feasibility of multiplexed determination of bacteria in milk samples.

An embedded 1149.4 extension to support mixed-signal debugging

Debugging electronic circuits is traditionally done with bench equipment directly connected to the circuit under debug. In the digital domain, the difficulties associated with the direct physical access to circuit nodes led to the inclusion of resources providing support to that activity, first at the printed circuit level, and then at the integrated circuit level. The experience acquired with those solutions led to the emergence of dedicated infrastructures for debugging cores at the system-on-chip level. However, all these developments had a small impact in the analog and mixed-signal domain, where debugging still depends, to a large extent, on direct physical access to circuit nodes. As a consequence, when analog and mixed-signal circuits are integrated as cores inside a system-on-chip, the difficulties associated with debugging increase, which cause the time-to-market and the prototype verification costs to also increase. The present work considers the IEEE1149.4 infrastructure as a means to support the debugging of mixed-signal circuits, namely to access the circuit nodes and also an embedded debug mechanism named mixed-signal condition detector, necessary for watch-/breakpoints and real-time analysis operations. One of the main advantages associated with the proposed solution is the seamless migration to the system-on-chip level, as the access is done through electronic means, thus easing debugging operations at different hierarchical levels.

Automated design of microwave discrete tuning differential capacitance circuits in Si-integrated technologies

A genetic algorithm used to design radio-frequency binary-weighted differential switched capacitor arrays (RFDSCAs) is presented in this article. The algorithm provides a set of circuits all having the same maximum performance. This article also describes the design, implementation, and measurements results of a 0.25 lm BiCMOS 3-bit RFDSCA. The experimental results show that the circuit presents the expected performance up to 40 GHz. The similarity between the evolutionary solutions, circuit simulations, and measured results indicates that the genetic synthesis method is a very useful tool for designing optimum performance RFDSCAs.