High-resolution image reconstruction from multiple low-resolution images.

In this paper, we demonstrate a digital signal processing (DSP) algorithm for improving spatial resolution of images captured by CMOS cameras. The basic approach is to reconstruct a high resolution (HR) image from a shift-related low resolution (LR) image sequence. The aliasing relationship of Fourier transforms between discrete and continuous images in the frequency domain is used for mapping LR images to a HR image. The method of projection onto convex sets (POCS) is applied to trace the best estimate of pixel matching from the LR images to the reconstructed HR image. Computer simulations and preliminary experimental results have shown that the algorithm works effectively on the application of post-image-captured processing for CMOS cameras. It can also be applied to HR digital image reconstruction, where shift information of the LR image sequence is known.

ENABLING HARDWARE TECHNOLOGIES FOR AUTONOMY IN TINY ROBOTS: CONTROL, INTEGRATION, ACTUATION

The last two decades have seen many exciting examples of tiny robots from a few cm3 to less than one cm3. Although individually limited, a large group of these robots has the potential to work cooperatively and accomplish complex tasks. Two examples from nature that exhibit this type of cooperation are ant and bee colonies. They have the potential to assist in applications like search and rescue, military scouting, infrastructure and equipment monitoring, nano-manufacture, and possibly medicine. Most of these applications require the high level of autonomy that has been demonstrated by large robotic platforms, such as the iRobot and Honda ASIMO. However, when robot size shrinks down, current approaches to achieve the necessary functions are no longer valid. This work focused on challenges associated with the electronics and fabrication. We addressed three major technical hurdles inherent to current approaches: 1) difficulty of compact integration; 2) need for real-time and power-efficient computations; 3) unavailability of commercial tiny actuators and motion mechanisms. The aim of this work was to provide enabling hardware technologies to achieve autonomy in tiny robots. We proposed a decentralized application-specific integrated circuit (ASIC) where each component is responsible for its own operation and autonomy to the greatest extent possible. The ASIC consists of electronics modules for the fundamental functions required to fulfill the desired autonomy: actuation, control, power supply, and sensing. The actuators and mechanisms could potentially be post-fabricated on the ASIC directly. This design makes for a modular architecture. The following components were shown to work in physical implementations or simulations: 1) a tunable motion controller for ultralow frequency actuation; 2) a nonvolatile memory and programming circuit to achieve automatic and one-time programming; 3) a high-voltage circuit with the highest reported breakdown voltage in standard 0.5 μm CMOS; 4) thermal actuators fabricated using CMOS compatible process; 5) a low-power mixed-signal computational architecture for robotic dynamics simulator; 6) a frequency-boost technique to achieve low jitter in ring oscillators. These contributions will be generally enabling for other systems with strict size and power constraints such as wireless sensor nodes.

Low-power high-performance SAR ADC design with digital calibration techniques

This dissertation presents the design of three high-performance successive-approximation-register (SAR) analog-to-digital converters (ADCs) using distinct digital background calibration techniques under the framework of a generalized code-domain linear equalizer. These digital calibration techniques effectively and efficiently remove the static mismatch errors in the analog-to-digital (A/D) conversion. They enable aggressive scaling of the capacitive digital-to-analog converter (DAC), which also serves as sampling capacitor, to the kT/C limit. As a result, outstanding conversion linearity, high signal-to-noise ratio (SNR), high conversion speed, robustness, superb energy efficiency, and minimal chip-area are accomplished simultaneously. The first design is a 12-bit 22.5/45-MS/s SAR ADC in 0.13-μm CMOS process. It employs a perturbation-based calibration based on the superposition property of linear systems to digitally correct the capacitor mismatch error in the weighted DAC. With 3.0-mW power dissipation at a 1.2-V power supply and a 22.5-MS/s sample rate, it achieves a 71.1-dB signal-to-noise-plus-distortion ratio (SNDR), and a 94.6-dB spurious free dynamic range (SFDR). At Nyquist frequency, the conversion figure of merit (FoM) is 50.8 fJ/conversion step, the best FoM up to date (2010) for 12-bit ADCs. The SAR ADC core occupies 0.06 mm2, while the estimated area the calibration circuits is 0.03 mm2. The second proposed digital calibration technique is a bit-wise-correlation-based digital calibration. It utilizes the statistical independence of an injected pseudo-random signal and the input signal to correct the DAC mismatch in SAR ADCs. This idea is experimentally verified in a 12-bit 37-MS/s SAR ADC fabricated in 65-nm CMOS implemented by Pingli Huang. This prototype chip achieves a 70.23-dB peak SNDR and an 81.02-dB peak SFDR, while occupying 0.12-mm2 silicon area and dissipating 9.14 mW from a 1.2-V supply with the synthesized digital calibration circuits included. The third work is an 8-bit, 600-MS/s, 10-way time-interleaved SAR ADC array fabricated in 0.13-μm CMOS process. This work employs an adaptive digital equalization approach to calibrate both intra-channel nonlinearities and inter-channel mismatch errors. The prototype chip achieves 47.4-dB SNDR, 63.6-dB SFDR, less than 0.30-LSB differential nonlinearity (DNL), and less than 0.23-LSB integral nonlinearity (INL). The ADC array occupies an active area of 1.35 mm2 and dissipates 30.3 mW, including synthesized digital calibration circuits and an on-chip dual-loop delay-locked loop (DLL) for clock generation and synchronization.

An 8x8 thermopile based uncooled infrared sensor

International audience

Investigation of the hazards of substrate current injection: transient external latchup and substrate noise coupling

Substrate current injection is the origin of external latchup and substrate noise coupling. The trigger current for external latchup depends on the duration of the trigger event. A physics-based model is provided to model the effects of aggressor to victim spacing and orientation on transient triggering of external latchup. The latchup susceptibility of standard cell based designs is also investigated. Guard rings are used to reduce latchup susceptibility and to reduce the substrate noise coupled to sensitive analog circuits. In this work, the effectiveness of different guard ring topologies for the reduction of substrate noise coupling is also investigated.

Holistic Design In High-Speed Optical Interconnects

Integrated circuit scaling has enabled a huge growth in processing capability, which necessitates a corresponding increase in inter-chip communication bandwidth. As bandwidth requirements for chip-to-chip interconnection scale, deficiencies of electrical channels become more apparent. Optical links present a viable alternative due to their low frequency-dependent loss and higher bandwidth density in the form of wavelength division multiplexing. As integrated photonics and bonding technologies are maturing, commercialization of hybrid-integrated optical links are becoming a reality. Increasing silicon integration leads to better performance in optical links but necessitates a corresponding co-design strategy in both electronics and photonics. In this light, holistic design of high-speed optical links with an in-depth understanding of photonics and state-of-the-art electronics brings their performance to unprecedented levels. This thesis presents developments in high-speed optical links by co-designing and co-integrating the primary elements of an optical link: receiver, transmitter, and clocking.

In the first part of this thesis a 3D-integrated CMOS/Silicon-photonic receiver will be presented. The electronic chip features a novel design that employs a low-bandwidth TIA front-end, double-sampling and equalization through dynamic offset modulation. Measured results show -14.9dBm of sensitivity and energy efficiency of 170fJ/b at 25Gb/s. The same receiver front-end is also used to implement source-synchronous 4-channel WDM-based parallel optical receiver. Quadrature ILO-based clocking is employed for synchronization and a novel frequency-tracking method that exploits the dynamics of IL in a quadrature ring oscillator to increase the effective locking range. An adaptive body-biasing circuit is designed to maintain the per-bit-energy consumption constant across wide data-rates. The prototype measurements indicate a record-low power consumption of 153fJ/b at 32Gb/s. The receiver sensitivity is measured to be -8.8dBm at 32Gb/s.

Next, on the optical transmitter side, three new techniques will be presented. First one is a differential ring modulator that breaks the optical bandwidth/quality factor trade-off known to limit the speed of high-Q ring modulators. This structure maintains a constant energy in the ring to avoid pattern-dependent power droop. As a first proof of concept, a prototype has been fabricated and measured up to 10Gb/s. The second technique is thermal stabilization of micro-ring resonator modulators through direct measurement of temperature using a monolithic PTAT temperature sensor. The measured temperature is used in a feedback loop to adjust the thermal tuner of the ring. A prototype is fabricated and a closed-loop feedback system is demonstrated to operate at 20Gb/s in the presence of temperature fluctuations. The third technique is a switched-capacitor based pre-emphasis technique designed to extend the inherently low bandwidth of carrier injection micro-ring modulators. A measured prototype of the optical transmitter achieves energy efficiency of 342fJ/bit at 10Gb/s and the wavelength stabilization circuit based on the monolithic PTAT sensor consumes 0.29mW.

Lastly, a first-order frequency synthesizer that is suitable for high-speed on-chip clock generation will be discussed. The proposed design features an architecture combining an LC quadrature VCO, two sample-and-holds, a PI, digital coarse-tuning, and rotational frequency detection for fine-tuning. In addition to an electrical reference clock, as an extra feature, the prototype chip is capable of receiving a low jitter optical reference clock generated by a high-repetition-rate mode-locked laser. The output clock at 8GHz has an integrated RMS jitter of 490fs, peak-to-peak periodic jitter of 2.06ps, and total RMS jitter of 680fs. The reference spurs are measured to be –64.3dB below the carrier frequency. At 8GHz the system consumes 2.49mW from a 1V supply.

Materials design for ambipolar devices: tuning orbital energetics in oligothiophene-naphthalimides semiconductors

Ambipolar organic field-effect transistors (OFETs), which can efficiently transport both holes and electrons, using a single type of electrode, are currently of great interest due to their possible applications in complementary metal oxide semiconductor (CMOS)-like circuits, sensors, and in light-emitting transistors. Several theoretical and experimental studies have argued that most organic semiconductors should be able to transport both types of carrier, although typically unipolar behavior is observed. One factor that can compromise ambipolar transport in organic semiconductors is poor solid state overlap between the HOMO (p-type) or LUMO (n-type) orbitals of neighboring molecules in the semiconductor thin film. In the search of low-bandgap ambipolar materials, where the absence of skeletal distortions allows closer intermolecular π-π stacking and enhanced intramolecular π-conjugation, a new family of oligothiophene-naphthalimide assemblies have been synthesized and characterized, in which both donor and acceptor moieties are directly conjugated through rigid linkers. In previous works we found that oligothiophene-napthalimide assemblies connected through amidine linkers (NDI derivates) exhibit skeletal distortions (50-60º) arising from steric hindrance between the carbonyl group of the arylene core and the sulphur atom of the neighbored thiophene ring (see Figure 1). In the present work we report novel oligo- and polythiophene–naphthalimide analogues NAI-3T, NAI-5T and poly-NAI-8C-3T, in which the connections of the amidine linkage have been inverted in order to prevent steric interactions. Thus, the nitrogen atoms are directly connected to the naphthalene moiety in NAI derivatives while they were attached directly to the thiophene moiety in the previously investigated NDI-3T and NDI-5T. In Figure 1 is depicted the calculated molecular structure of NAI-3T together with that of NDI-3T showing how the steric interactions are not present in the novel NAI derivative. The planar skeletons in these new family induce higher degree of crystallinity and the carrier charge transport can be switched from n-type to ambipolar behaviour. The highest FET performance is achieved for vapor-deposited films of NAI-3T with mobilities of 1.95x10-4cm2V-1s-1 and 2.00x10-4cm2V-1s-1 for electrons and holes, respectively. Finally, these planar semiconductors are compared with their NDI derivates analogues, which exhibit only n-type mobility, in order to understand the origin of the ambipolarity in this new series of molecular semiconductors.

Electro-optical characterization of IC compatible microcantilevers

The aim of this work is to simulate and optically characterize the piezoelectric performance of complementary metal oxide semiconductor (CMOS) compatible microcantilevers based on aluminium nitride (AlN) and manufactured at room temperature. This study should facilitate the integration of piezoelectric micro-electro-mechanical systems (MEMS) such as microcantilevers, in CMOS technology. Besides compatibility with standard integrated circuit manufacturing procedures, low temperature processing also translates into higher throughput and, as a consequence, lower manufacturing costs. Thus, the use of the piezoelectric properties of AlN manufactured by reactive sputtering at room temperature is an important step towards the integration of this type of devices within future CMOS technology standards. To assess the reliability of our fabrication process, we have manufactured arrays of free-standing microcantilever beams of variable dimension and studied their piezoelectric performance. The characterization of the first out-of-plane modes of AlN-actuated piezoelectric microcantilevers has been carried out using two optical techniques: laser Doppler vibrometry (LDV) and white light interferometry (WLI). In order to actuate the cantilevers, a periodic chirp signal in certain frequency ranges was applied between the device electrodes. The nature of the different vibration modes detected has been studied and compared with that obtained by a finite element model based simulation (COMSOL Multiphysics), showing flexural as well as torsional modes. The correspondence between theoretical and experimental data is reasonably good, probing the viability of this high throughput and CMOS compatible fabrication process. To complete the study, X-ray diffraction as well as d33 piezoelectric coefficient measurements were also carried out.

Silicon Photonic Device for Wavelength Sensing and Monitoring

Over the last decade advances and innovations from Silicon Photonics technology were observed in the telecommunications and computing industries. This technology which employs Silicon as an optical medium, relies on current CMOS micro-electronics fabrication processes to enable medium scale integration of many nano-photonic devices to produce photonic integrated circuitry. However, other fields of research such as optical sensor processing can benefit from silicon photonics technology, specially in sensors where the physical measurement is wavelength encoded. In this research work, we present a design and application of a thermally tuned silicon photonic device as an optical sensor interrogator. The main device is a micro-ring resonator filter of 10 $\mu m$ of diameter. A photonic design toolkit was developed based on open source software from the research community. With those tools it was possible to estimate the resonance and spectral characteristics of the filter. From the obtained design parameters, a 7.8 x 3.8 mm optical chip was fabricated using standard micro-photonics techniques. In order to tune a ring resonance, Nichrome micro-heaters were fabricated on top of the device. Some fabricated devices were systematically characterized and their tuning response were determined. From measurements, a ring resonator with a free-spectral-range of 18.4 nm and with a bandwidth of 0.14 nm was obtained. Using just 5 mA it was possible to tune the device resonance up to 3 nm. In order to apply our device as a sensor interrogator in this research, a model of wavelength estimation using time interval between peaks measurement technique was developed and simulations were carried out to assess its performance. To test the technique, an experiment using a Fiber Bragg grating optical sensor was set, and estimations of the wavelength shift of this sensor due to axial strains yield an error within 22 pm compared to measurements from spectrum analyzer. Results from this study implies that signals from FBG sensors can be processed with good accuracy using a micro-ring device with the advantage of ts compact size, scalability and versatility. Additionally, the system also has additional applications such as processing optical wavelength shifts from integrated photonic sensors and to be able to track resonances from laser sources.

Design and characterization of wideband Hall current sensors in BCD technology for smart power and metering applications

Power electronic circuits are moving towards higher switching frequencies, exploiting the capabilities of novel devices to shrink the dimension of passive components. This trend demands sensors capable enough to operate at such high frequencies. This thesis aims to demonstrate through experimental characterization, the broadband capability of a fully integrated CMOS X-Hall current sensor in current mode interfaced with a transimpedance amplifier (TIA), chip CH09, realized in CMOS technology for power electronics applications such as power converters. The system exploits a common-mode control system to operate the dual supply system, 5-V for the X-Hall probe and 1.2-V for the readout. The developed prototype achieves a maximum acquisition bandwidth of 12 MHz, a power consumption of 11.46 mW, resolution of 39 mArms, a sensitivity of 8 % /T, and a FoM of 569-MHz/A2mW, significantly higher than current state-of-the-art. Further enhancements were proposed to CH09 as a new chip CH100, aiming for accuracy levels prerequisite for a real-time power electronic application. The TIA was optimized for a wider bandwidth of 26.7 MHz with nearly 30% reduction of the integrated input referred noise of 26.69 nArms at the probe-AFE interface in the frequency band of DC-30 MHz, and a 10% improvement in the dynamic range. The expected input range is 5-A. The chip incorporates a dual sensing chain for differential sensing to overcome common mode interferences. A novel offset cancellation technique is proposed that would require switching of polarity of bias currents. Thermal gain drift was improved by a factor of 8 and will be digitally calibrated utilizing a new built-in temperature sensor with a post calibration measurement accuracy greater than 1%. The estimated power consumption of the entire system is 55.6 mW. Both prototypes have been implemented through a 90-nm microelectronic process from STMicroelectronics and occupy a silicon area of 2.4 mm2.

Chemiluminescence – based bioanalytical devices for astrobiological, food safety and clinical applications

At the intersection of biology, chemistry, and engineering, biosensors are a multidisciplinary innovation that provide a cost-effective alternative to traditional laboratory techniques. Due to their advantages, biosensors are used in medical diagnostics, environmental monitoring, food safety and many other fields. The first part of the thesis is concerned with learning the state of the art of paper-based immunosensors with bioluminescent (BL) and chemiluminescent (CL) detection. The use of biospecific assays combined with CL detection and paper-based technology offers an optimal approach to creating analytical tools for on-site applications and we have focused on the specific areas that need to be considered more in order to ensure a future practical implementation of these methods in routine analyses. The subsequent part of the thesis addresses the development of an autonomous lab-on-chip platform for performing chemiluminescent-based bioassays in space environment, exploiting a CubeSat platform for astrobiological investigations. An origami-inspired microfluidic paper-based analytical device has been developed with the purpose of assesses its performance in space and to evaluate its functionality and the resilience of the (bio)molecules when exposed to a radiation-rich environment. Subsequently, we designed a paper-based assay to detect traces of ovalbumin in food samples, creating a user-friendly immunosensing platform. To this purpose, we developed an origami device that exploits a competitive immunoassay coupled with chemiluminescence detection and magnetic microbeads used to immobilize ovalbumin on paper. Finally, with the aim of exploring the use of biomimetic materials, an hydrogel-based chemiluminescence biosensor for the detection of H2O2 and glucose was developed. A guanosine hydrogel was prepared and loaded with luminol and hemin, miming a DNAzyme activity. Subsequently, the hydrogel was modified by incorporating glucose oxidase enzyme to enable glucose biosensing. The emitted photons were detected using a portable device equipped with a smartphone's CMOS (complementary metal oxide semiconductor) camera for CL emission detection.