Geochemical composition of sulfide and oxide minerals from ODP Sites 193-1188 and 193-1189, PACMANUS field

Ocean Drilling Program (ODP) Leg 193 recovered core from the active PACMANUS hydrothermal field (eastern Manus Basin, Papua New Guinea) that provided an excellent opportunity to study mineralization related to a seafloor hydrothermal system hosted by felsic volcanic rocks. The purpose of this work is to provide a data set of mineral chemistry of the sulfide-oxide mineralization and associated gold occurrence in samples drilled at Sites 1188 and 1189. PACMANUS consists of five active vent sites, namely Rogers Ruins, Roman Ruins, Satanic Mills, Tsukushi, and Snowcap. In this work two sites were studied: Snowcap and Roman Ruins. Snowcap is situated in a water depth of 1670 meters below sea level [mbsl], covers a knoll of dacite-rhyodacite lava, and is characterized by low-temperature diffuse venting. Roman Ruin lies in a water depth of 1693-1710 mbsl, is 150 m across, and contains numerous large, active and inactive, columnar chimneys. Sulfide mineralogy at the Roman Ruins site is dominated by pyrite with lesser amounts of chalcopyrite, sphalerite, pyrrhotite, marcasite, and galena. Sulfide minerals are relatively rare at Snow Cap. These are dominated by pyrite with minor chalcopyrite and sphalerite and traces of pyrrhotite. Native gold has been found in a single sample from Hole 1189B (Roman Ruins). Oxide minerals are represented by Ti magnetite, magnetite, ilmenite, hercynite (Fe spinel), and less abundant Al-Mg rich chromite (average = 10.6 wt% Al2O3 and 5.8 wt% MgO), Fe-Ti oxides, and a single occurrence of pyrophanite (Mn Ti O3). Oxide mineralization is more developed at Snowcap, whereas sulfide minerals are more extensive and show better development at Roman Ruins. The mineralogy was obtained mainly by a detailed optical microscopy study. Oxide mineral identifications were confirmed by X-ray diffraction, and mineral chemistry was determined by electron probe microanalyses.

The development of planar high-K/III-V p-channel MOSFETs for post-silicon CMOS

Conventional Si complementary-metal-oxide-semiconductor (CMOS) scaling is fast approaching its limits. The extension of the logic device roadmap for future enhancements in transistor performance requires non-Si materials and new device architectures. III-V materials, due to their superior electron transport properties, are well poised to replace Si as the channel material beyond the 10nm technology node to mitigate the performance loss of Si transistors from further reductions in supply voltage to minimise power dissipation in logic circuits. However several key challenges, including a high quality dielectric/III-V gate stack, a low-resistance source/drain (S/D) technology, heterointegration onto a Si platform and a viable III-V p-metal-oxide-semiconductor field-effect-transistor (MOSFET), need to be addressed before III-Vs can be employed in CMOS. This Thesis specifically addressed the development and demonstration of planar III-V p-MOSFETs, to complement the n-MOSFET, thereby enabling an all III-V CMOS technology to be realised. This work explored the application of InGaAs and InGaSb material systems as the channel, in conjunction with Al2O3/metal gate stacks, for p-MOSFET development based on the buried-channel flatband device architecture. The body of work undertaken comprised material development, process module development and integration into a robust fabrication flow for the demonstration of p-channel devices. The parameter space in the design of the device layer structure, based around the III-V channel/barrier material options of In_x≥0.53Ga_1-xAs/In_0.52Al_0.48As and In_x≥0.1Ga_1-xSb/AlSb, was systematically examined to improve hole channel transport. A mobility of 433 cm²/Vs, the highest room temperature hole mobility of any InGaAs quantum-well channel reported to date, was obtained for the In_0.85Ga_0.15As (2.1% strain) structure. S/D ohmic contacts were developed based on thermally annealed Au/Zn/Au metallisation and validated using transmission line model test structures. The effects of metallisation thickness, diffusion barriers and de-oxidation conditions were examined. Contacts to InGaSb-channel structures were found to be sensitive to de-oxidation conditions. A fabrication process, based on a lithographically-aligned double ohmic patterning approach, was realised for deep submicron gate-to-source/drain gap (L_side) scaling to minimise the access resistance, thereby mitigating the effects of parasitic S/D series resistance on transistor performance. The developed process yielded gaps as small as 20nm. For high-k integration on GaSb, ex-situ ammonium sulphide ((NH₄)₂S) treatments, in the range 1%-22%, for 10min at 295K were systematically explored for improving the electrical properties of the Al₂O₃/GaSb interface. Electrical and physical characterisation indicated the 1% treatment to be most effective with interface trap densities in the range of 4 - 10×10¹²cm^-2eV^-1 in the lower half of the bandgap. An extended study, comprising additional immersion times at each sulphide concentration, was further undertaken to determine the surface roughness and the etching nature of the treatments on GaSb. A number of p-MOSFETs based on III-V-channels with the most promising hole transport and integration of the developed process modules were successfully demonstrated in this work. Although the non-inverted InGaAs-channel devices showed good current modulation and switch-off characteristics, several aspects of performance were non-ideal; depletion-mode operation, modest drive current (I_d,sat=1.14mA/mm), double peaked transconductance (g_m=1.06mS/mm), high subthreshold swing (SS=301mV/dec) and high on-resistance (R_on=845kΩ.μm). Despite demonstrating substantial improvement in the on-state metrics of I_d,sat (11×), g_m (5.5×) and R_on (5.6×), inverted devices did not switch-off. Scaling gate-to-source/drain gap (L_side) from 1μm down to 70nm improved I_d,sat (72.4mA/mm) by a factor of 3.6 and gm (25.8mS/mm) by a factor of 4.1 in inverted InGaAs-channel devices. Well-controlled current modulation and good saturation behaviour was observed for InGaSb-channel devices. In the on-state In_0.3Ga_0.7Sb-channel (I_d,sat=49.4mA/mm, g_m=12.3mS/mm, R_on=31.7kΩ.μm) and In_0.4Ga_0.6Sb-channel (I_d,sat=38mA/mm, g_m=11.9mS/mm, R_on=73.5kΩ.μm) devices outperformed the InGaAs-channel devices. However the devices could not be switched off. These findings indicate that III-V p-MOSFETs based on InGaSb as opposed to InGaAs channels are more suited as the p-channel option for post-Si CMOS.

Deposition of Intrinsic a-Si:H by ECR-CVD to Passivate the Crystalline Silicon Heterointerface in HIT Solar Cells

We have deposited intrinsic amorphous silicon (a-Si:H) using the electron cyclotron resonance (ECR) chemical vapor deposition technique in order to analyze the a-Si:H/c-Si heterointerface and assess the possible application in heterojunction with intrinsic thin layer (HIT) solar cells. Physical characterization of the deposited films shows that the hydrogen content is in the 15-30% range, depending on deposition temperature. The optical bandgap value is always comprised within the range 1.9- 2.2 eV. Minority carrier lifetime measurements performed on the heterostructures reach high values up to 1.3 ms, indicating a well-passivated a-Si:H/c-Si heterointerface for deposition temperatures as low as 100°C. In addition, we prove that the metal-oxide- semiconductor conductance method to obtain interface trap distribution can be applied to the a-Si:H/c-Si heterointerface, since the intrinsic a-Si:H layer behaves as an insulator at low or negative bias. Values for the minimum of D_it as low as 8 × 10^10 cm^2 · eV^-1 were obtained for our samples, pointing to good surface passivation properties of ECR-deposited a-Si:H for HIT solar cell applications.

Advanced Analytical Microscopy at the Nanoscale: Applications in Wide Bandgap and Solid Oxide Fuel Cell Materials

The atomic-level structure and chemistry of materials ultimately dictate their observed macroscopic properties and behavior. As such, an intimate understanding of these characteristics allows for better materials engineering and improvements in the resulting devices. In our work, two material systems were investigated using advanced electron and ion microscopy techniques, relating the measured nanoscale traits to overall device performance. First, transmission electron microscopy and electron energy loss spectroscopy (TEM-EELS) were used to analyze interfacial states at the semiconductor/oxide interface in wide bandgap SiC microelectronics. This interface contains defects that significantly diminish SiC device performance, and their fundamental nature remains generally unresolved. The impacts of various microfabrication techniques were explored, examining both current commercial and next-generation processing strategies. In further investigations, machine learning techniques were applied to the EELS data, revealing previously hidden Si, C, and O bonding states at the interface, which help explain the origins of mobility enhancement in SiC devices. Finally, the impacts of SiC bias temperature stressing on the interfacial region were explored. In the second system, focused ion beam/scanning electron microscopy (FIB/SEM) was used to reconstruct 3D models of solid oxide fuel cell (SOFC) cathodes. Since the specific degradation mechanisms of SOFC cathodes are poorly understood, FIB/SEM and TEM were used to analyze and quantify changes in the microstructure during performance degradation. Novel strategies for microstructure calculation from FIB-nanotomography data were developed and applied to LSM-YSZ and LSCF-GDC composite cathodes, aged with environmental contaminants to promote degradation. In LSM-YSZ, migration of both La and Mn cations to the grain boundaries of YSZ was observed using TEM-EELS. Few substantial changes however, were observed in the overall microstructure of the cells, correlating with a lack of performance degradation induced by the H2O. Using similar strategies, a series of LSCF-GDC cathodes were analyzed, aged in H2O, CO2, and Cr-vapor environments. FIB/SEM observation revealed considerable formation of secondary phases within these cathodes, and quantifiable modifications of the microstructure. In particular, Cr-poisoning was observed to cause substantial byproduct formation, which was correlated with drastic reductions in cell performance.

Isolating the photovoltaic junction: atomic layer deposited TiO2-RuO2 alloy Schottky contacts for silicon photoanodes

We synthesized nanoscale TiO2-RuO2 alloys by atomic layer deposition (ALD) that possess a high work function and are highly conductive. As such, they function as good Schottky contacts to extract photogenerated holes from n-type silicon while simultaneously interfacing with water oxidation catalysts. The ratio of TiO2 to RuO2 can be precisely controlled by the number of ALD cycles for each precursor. Increasing the composition above 16% Ru sets the electronic conductivity and the metal work function. No significant Ohmic loss for hole transport is measured as film thickness increases from 3 to 45 nm for alloy compositions >= 16% Ru. Silicon photoanodes with a 2 nm SiO2 layer that are coated by these alloy Schottky contacts having compositions in the range of 13-46% Ru exhibit average photovoltages of 525 mV, with a maximum photovoltage of 570 mV achieved. Depositing TiO2-RuO2 alloys on nSi sets a high effective work function for the Schottky junction with the semiconductor substrate, thus generating a large photovoltage that is isolated from the properties of an overlying oxygen evolution catalyst or protection layer.

Design principles for maximizing photovoltage in metal-oxide-protected water-splitting photoanodes

Metal oxide protection layers for photoanodes may enable the development of large-scale solar fuel and solar chemical synthesis, but the poor photovoltages often reported so far will severely limit their performance. Here we report a novel observation of photovoltage loss associated with a charge extraction barrier imposed by the protection layer, and, by eliminating it, achieve photovoltages as high as 630mV, the maximum reported so far for water-splitting silicon photoanodes. The loss mechanism is systematically probed in metal-insulator-semiconductor Schottky junction cells compared to buried junction p(+) n cells, revealing the need to maintain a characteristic hole density at the semiconductor/insulator interface. A leaky-capacitor model related to the dielectric properties of the protective oxide explains this loss, achieving excellent agreement with the data. From these findings, we formulate design principles for simultaneous optimization of built-in field, interface quality, and hole extraction to maximize the photovoltage of oxide-protected water-splitting anodes.

Engineering interfacial silicon dioxide for improved metal-insulator-semiconductor silicon photoanode water splitting performance

Silicon photoanodes protected by atomic layer deposited (ALD) TiO2 show promise as components of water splitting devices that may enable the large-scale production of solar fuels and chemicals. Minimizing the resistance of the oxide corrosion protection layer is essential for fabricating efficient devices with good fill factor. Recent literature reports have shown that the interfacial SiO2 layer, interposed between the protective ALD-TiO2 and the Si anode, acts as a tunnel oxide that limits hole conduction from the photoabsorbing substrate to the surface oxygen evolution catalyst. Herein, we report a significant reduction of bilayer resistance, achieved by forming stable, ultrathin (<1.3 nm) SiO2 layers, allowing fabrication of water splitting photoanodes with hole conductances near the maximum achievable with the given catalyst and Si substrate. Three methods for controlling the SiO2 interlayer thickness on the Si(100) surface for ALD-TiO2 protected anodes were employed: (1) TiO2 deposition directly on an HF-etched Si(100) surface, (2) TiO2 deposition after SiO2 atomic layer deposition on an HF-etched Si(100) surface, and (3) oxygen scavenging, post-TiO2 deposition to decompose the SiO2 layer using a Ti overlayer. Each of these methods provides a progressively superior means of reliably thinning the interfacial SiO2 layer, enabling the fabrication of efficient and stable water oxidation silicon anodes.

Infrared and infrared emission spectroscopy of gallium oxide α-GaO(OH) nanostructures

Infrared spectroscopy has been used to study nano to micro sized gallium oxyhydroxide α-GaO(OH), prepared using a low temperature hydrothermal route. Rod-like α-GaO(OH) crystals with average length of ~2.5 μm and width of 1.5 μm were prepared when the initial molar ratio of Ga to OH was 1:3. β-Ga2O3 nano and micro-rods were prepared through the calcination of α-GaO(OH) The initial morphology of α-GaO(OH) is retained in the β-Ga2O3 nanorods. The combination of infrared and infrared emission spectroscopy complimented with dynamic thermal analysis were used to characterise the α-GaO(OH) nanotubes and the formation of β-Ga2O3 nanorods. Bands at around 2903 and 2836 cm-1 are assigned to the -OH stretching vibration of α-GaO(OH) nanorods. Infrared bands at around 952 and 1026 cm-1 are assigned to the Ga-OH deformation modes of α-GaO(OH). A significant number of bands are observed in the 620 to 725 cm-1 region and are assigned to GaO stretching vibrations.