A fully integrated 660 MHz low-swing energy-recycling DC-DC converter

A fully integrated 0.18 μm DC-DC buck converter using a low-swing "stacked driver" configuration is reported in this paper. A high switching frequency of 660 MHz reduces filter components to fit on chip, but this suffers from high switching losses. These losses are reduced using: 1) low-swing drivers; 2) supply stacking; and 3) introducing a charge transfer path to deliver excess charge from the positive metal-oxide semiconductor drive chain to the load, thereby recycling the charge. The working prototype circuit converts 2.2 to 0.75-1.0 V at 40-55 mA. Design and simulation of an improved circuit is also included that further improves the efficiency by enhancing the charge recycling path, providing automated zero voltage switching (ZVS) operation, and synchronizing the half-swing gating signals. © 2009 IEEE.

Laminar to turbulent flow transition measurements using an array of SOI-CMOS MEMS wall shear stress sensors

The successful utilization of an array of silicon on insulator complementary metal oxide semiconductor (SOICMOS) micro thermal shear stress sensors for flow measurements at macro-scale is demonstrated. The sensors use CMOS aluminum metallization as the sensing material and are embedded in low thermal conductivity silicon oxide membranes. They have been fabricated using a commercial 1 μm SOI-CMOS process and a post-CMOS DRIE back etch. The sensors with two different sizes were evaluated. The small sensors (18.5 ×18.5 μm2 sensing area on 266 × 266 μm2 oxide membrane) have an ultra low power (100 °C temperature rise at 6mW) and a small time constant of only 5.46 μs which corresponds to a cut-off frequency of 122 kHz. The large sensors (130 × 130 μm2 sensing area on 500 × 500 μm2 membrane) have a time constant of 9.82 μs (cut-off frequency of 67.9 kHz). The sensors' performance has proven to be robust under transonic and supersonic flow conditions. Also, they have successfully identified laminar, separated, transitional and turbulent boundary layers in a low speed flow. © 2008 IEEE.

Improved infrared thermal imaging of a CMOS MEMS device

We report a technique which can be used to improve the accuracy of infrared (IR) surface temperature measurements made on MEMS (Micro-Electro-Mechanical- Systems) devices. The technique was used to thermally characterize a SOI (Silicon-On-Insulator) CMOS (Complementary Metal Oxide Semiconductor) MEMS thermal flow sensor. Conventional IR temperature measurements made on the sensor were shown to give significant surface temperature errors, due to the optical transparency of the SiO 2 membrane layers and low emissivity/high reflectivity of the metal. By making IR measurements on radiative carbon micro-particles placed in isothermal contact with the device, the accuracy of the surface temperature measurement was significantly improved. © 2010 EDA Publishing/THERMINIC.

Thermal characterization of SOI CMOS micro hot-plate gas sensors

This work reports on thermal characterization of SOI (silicon on insulator) CMOS (complementary metal oxide semiconductor) MEMS (micro electro mechanical system) gas sensors using a thermoreflectance (TR) thermography system. The sensors were fabricated in a CMOS foundry and the micro hot-plate structures were created by back-etching the CMOS processed wafers in a MEMS foundry using DRIE (deep reactive ion etch) process. The calibration and experimental details of the thermoreflectance based thermal imaging setup, used for these micro hot-plate gas sensor structures, are presented. Experimentally determined temperature of a micro hot-plate sensor, using TR thermography and built-in silicon resistive temperature sensor, is compared with that estimated using numerical simulations. The results confirm that TR based thermal imaging technique can be used to determine surface temperature of CMOS MEMS devices with a high accuracy. © 2010 EDA Publishing/THERMINIC.

ANALYTICAL DEVICE FOR TEST FLUIDS, COMPRISES A CONDUCTIVE POLYMER COMPOSITION

A sensor for chemical species or biological species or radiation presenting to test fluid a polymer composition comprises polymer and conductive filler metal, alloy or reduced metal oxide and having a first level of electrical conductance when quiescent and being convertible to a second level of conductance by change of stress applied by stretching or compression or electric field, in which the polymer composition is characterised by at least one of the features in the form of particles at least 90% w/w held on a 100 mesh sieve; and/or comprising a permeable body extending across a channel of fluid flow; and/or affording in-and-out diffusion of test fluid and/or mechanically coupled to a workpiece of polymer swellable by a constituent of test fluid.

Low on-resistance SOI dual-trench-gate MOSFET

A low specific on-resistance (R-{{\rm on}, {\rm sp}}) integrable silicon-on-insulator (SOI) MOSFET is proposed, and its mechanism is investigated by simulation. The SOI MOSFET features double trenches and dual gates (DTDG SOI): an oxide trench in the drift region, a buried gate inset in the oxide trench, and another trench gate (TG) extended to a buried oxide layer. First, the dual gates form dual conduction channels, and the extended gate widens the vertical conduction area; both of which sharply reduce R-{{\rm on}, {\rm sp}}. Second, the oxide trench folds the drift region in the vertical direction, resulting in a reduced device pitch and R-{{\rm on}, {\rm sp}}. Third, the oxide trench causes multidirectional depletion. This not only enhances the reduced surface field effect and thus reshapes the electric field distribution but also increases the drift doping concentration, leading to a reduced R-{{\rm on}, {\rm sp}} and an improved breakdown voltage (BV). Compared with a conventional SOI lateral Double-diffused metal oxide semiconductor (LDMOS), the DTDG MOSFET increases BV from 39 to 92 V at the same cell pitch or decreases R-{{\rm on}, { \rm sp}} by 77% at the same BV by simulation. Finally, the TG extended synchronously acts as an isolation trench between the high/low-voltage regions in a high-voltage integrated circuit, saving the chip area and simplifying the isolation process. © 2006 IEEE.

Highly efficient spin transport in epitaxial graphene on SiC

Spin information processing is a possible new paradigm for post-CMOS (complementary metal-oxide semiconductor) electronics and efficient spin propagation over long distances is fundamental to this vision. However, despite several decades of intense research, a suitable platform is still wanting. We report here on highly efficient spin transport in two-terminal polarizer/analyser devices based on high-mobility epitaxial graphene grown on silicon carbide. Taking advantage of high-impedance injecting/detecting tunnel junctions, we show spin transport efficiencies up to 75%, spin signals in the mega-ohm range and spin diffusion lengths exceeding 100μm. This enables spintronics in complex structures: devices and network architectures relying on spin information processing, well beyond present spintronics applications, can now be foreseen. © 2012 Macmillan Publishers Limited. All rights reserved.

200-V lateral superjunction LIGBT on partial SOI

This letter presents a novel lateral superjunction lateral insulated-gate bipolar transistor (LIGBT) in partial silicon-on-insulator (SOI) technology in 0.18-μm partial-SOI (PSOI) high-voltage (HV) process. For an n-type superjunction LIGBT, the p-layer in the superjunction drift region not only helps in achieving uniform electric field distribution but also contributes to the on-state current. The superjunction LIGBT successfully achieves a breakdown voltage (BV) of 210 V with an R dson of 765 mΩ ̇ mm 2. It exhibits half the value of specific on-state resistance R dson and three times higher saturation current (I dsat) for the same BV, compared to a comparable lateral superjunction laterally diffused metal-oxide-semiconductor fabricated in the same technology. It also performs well in higher temperature dc operation with 38.8% increase in R dson at 175°C, compared to the room temperature without any degradation in latch-up performance. To realize this device, it only requires one additional mask layer into X-FAB 0.18-μm PSOI HV process. © 2012 IEEE.

Device and circuit-level performance of carbon nanotube field-effect transistor with benchmarking against a nano-MOSFET

The performance of a semiconducting carbon nanotube (CNT) is assessed and tabulated for parameters against those of a metal-oxide-semiconductor field-effect transistor (MOSFET). Both CNT and MOSFET models considered agree well with the trends in the available experimental data. The results obtained show that nanotubes can significantly reduce the drain-induced barrier lowering effect and subthreshold swing in silicon channel replacement while sustaining smaller channel area at higher current density. Performance metrics of both devices such as current drive strength, current on-off ratio (Ion/Ioff), energy-delay product, and power-delay product for logic gates, namely NAND and NOR, are presented. Design rules used for carbon nanotube field-effect transistors (CNTFETs) are compatible with the 45-nm MOSFET technology. The parasitics associated with interconnects are also incorporated in the model. Interconnects can affect the propagation delay in a CNTFET. Smaller length interconnects result in higher cutoff frequency. © 2012 Tan et al.

A high performance oxygen storage material for chemical looping processes with CO2 capture

Chemical looping combustion (CLC) is a novel combustion technology that involves cyclic reduction and oxidation of oxygen storage materials to provide oxygen for the combustion of fuels to CO2 and H2O, whilst giving a pure stream of CO2 suitable for sequestration or utilisation. Here, we report a method for preparing of oxygen storage materials from layered double hydroxides (LDHs) precursors and demonstrate their applications in the CLC process. The LDHs precursor enables homogeneous mixing of elements at the molecular level, giving a high degree of dispersion and high-loading of active metal oxide in the support after calcination. Using a Cu-Al LDH precursor as a prototype, we demonstrate that rational design of oxygen storage materials by material chemistry significantly improved the reactivity and stability in the high temperature redox cycles. We discovered that the presence of sodium-containing species were effective in inhibiting the formation of copper aluminates (CuAl2O4 or CuAlO 2) and stabilising the copper phase in an amorphous support over multiple redox cycles. A representative nanostructured Cu-based oxygen storage material derived from the LDH precursor showed stable gaseous O2 release capacity (∼5 wt%), stable oxygen storage capacity (∼12 wt%), and stable reaction rates during reversible phase changes between CuO-Cu 2O-Cu at high temperatures (800-1000 °C). We anticipate that the strategy can be extended to manufacture a variety of metal oxide composites for applications in novel high temperature looping cycles for clean energy production and CO2 capture. © The Royal Society of Chemistry 2013.

Interaction between Fe-based oxygen carriers and n-heptane during chemical looping combustion

Chemical looping combustion (CLC) uses a metal oxide (the oxygen carrier) to provide oxygen for the combustion of a fuel and gives an inherent separation of pure CO2 with minimal energy penalty. In solid-fuel CLC, volatile matter will interact with oxygen carriers. Here, the interaction between iron-based oxygen carriers and a volatile hydrocarbon (n-heptane) was investigated in both a laboratory-scale fluidised bed and a thermogravimetric analyser (TGA). Experiments were undertaken to characterise the thermal decomposition of the n-heptane occurring in the presence and in the absence of the oxygen carrier. In a bed of inert particles, carbon deposition increased with temperature and acetylene appeared as a possible precursor. For a bed of carrier consisting of pure Fe2O3, carbon deposition occurred once the Fe2O3 was fully reduced to Fe. When the Fe2O3 was doped with 10 mol % Al2O3 (Fe90Al), deposition started when the carrier was reduced to a mixture of Fe and FeAl2O4, the latter being very unreactive. Furthermore, when pure Fe2O3 was fully reduced to Fe, agglomeration of the fluidised bed occurred. However, Fe90Al did not give agglomeration even after extended reduction. The results suggest that Fe90Al is promising for the CLC of solid fuels. © 2012 The Combustion Institute. Published by Elsevier Inc. All rights reserved.

The mechanism of high temperature aqueous corrosion of steel

A new model is presented which describes the growth of the duplex layers of Fe3O4 on mild steel in high temperature, deoxygenated, neutral or alkaline aqueous solutions. It is shown that the layers grow by the ingress of water along oxide micropores to the metal-oxide interface and by the rate-limiting outward diffusion of Fe ions along oxide grain boundaries. The new model accounts for the observed temperature-dependence and pH-dependence of the corrosion, the morphology of inner and outer layer crystallites, the segregation of alloying elements, and the location of hydrogen evolution. The model can also be generalized to other steels and alloys. © 1989.

Locally oxidized silicon surface-plasmon Schottky detector for telecom regime.

We experimentally demonstrate an on-chip nanoscale silicon surface-plasmon Schottky photodetector based on internal photoemission process and operating at telecom wavelengths. The device is fabricated using a self-aligned approach of local-oxidation of silicon (LOCOS) on silicon on insulator substrate, which provides compatibility with standard complementary metal-oxide semiconductor technology and enables the realization of the photodetector and low-loss bus photonic waveguide at the same fabrication step. Additionally, LOCOS technique allows avoiding lateral misalignment between the silicon surface and the metal layer to form a nanoscale Schottky contact. The fabricated devices showed enhanced detection capability for shorter wavelengths that is attributed to increased probability of the internal photoemission process. We found the responsivity of the nanodetector to be 0.25 and 13.3 mA/W for incident optical wavelengths of 1.55 and 1.31 μm, respectively. The presented device can be integrated with other nanophotonic and nanoplasmonic structures for the realization of monolithic opto-electronic circuitry on-chip.

Locally oxidized silicon surface-plasmon Schottky detector for telecom regime

We experimentally demonstrate an on-chip nanoscale silicon surface-plasmon Schottky photodetector based on internal photoemission process and operating at telecom wavelengths. The device is fabricated using a self-aligned approach of local-oxidation of silicon (LOCOS) on silicon on insulator substrate, which provides compatibility with standard complementary metal-oxide semiconductor technology and enables the realization of the photodetector and low-loss bus photonic waveguide at the same fabrication step. Additionally, LOCOS technique allows avoiding lateral misalignment between the silicon surface and the metal layer to form a nanoscale Schottky contact. The fabricated devices showed enhanced detection capability for shorter wavelengths that is attributed to increased probability of the internal photoemission process. We found the responsivity of the nanodetector to be 0.25 and 13.3 mA/W for incident optical wavelengths of 1.55 and 1.31 μm, respectively. The presented device can be integrated with other nanophotonic and nanoplasmonic structures for the realization of monolithic opto-electronic circuitry on-chip. © 2011 American Chemical Society.

Experimental demonstration of locally oxidized hybrid silicon-plasmonic waveguide

We experimentally demonstrate a self-aligned approach for the fabrication of nanoscale hybrid silicon-plasmonic waveguide fabricated by local oxidation of silicon (LOCOS). Implementation of the LOCOS technique provides compatibility with standard complementary metal-oxide-semiconductor technology and allows avoiding lateral misalignment between the silicon waveguide and the upper metallic layer. We directly measured the propagation and the coupling loss of the fabricated hybrid waveguide using a near-field scanning optical microscope. The demonstrated structure provides nanoscale confinement of light together with a reasonable propagation length of ∼100 μm. As such, it is expected to become an important building block in future on-chip optoelectronic circuitry. © 2010 American Institute of Physics.