A Reduced Device-Count Hybrid Multilevel Inverter Topology with single DC Source and Improved Fault Tolerance

A new hybrid multilevel power converter topology is presented in this paper. The proposed power converter topology uses only one DC source and floating capacitors charged to asymmetrical voltage levels, are used for generating different voltage levels. The SVPWM based control strategy used in this converter maintains the capacitor voltages at the required levels in the entire modulation range including the over-modulation region. For the voltage levels: nine and above, the number of components required in the proposed topology is significantly lower, compared to the conventional multilevel inverter topologies. The number of capacitors required in this topology reduces drastically compared to the conventional flying capacitor topology, when the number of levels in the inverter output increases. This topology has better fault tolerance, as it is capable of operating with reduced number of levels, in the entire modulation range, in the event of any failure in the H-bridges. The transient as well as the steady state performance of the nine-level version of the proposed topology is experimentally verified in the entire modulation range including the over-modulation region.

Current rectification by a single ZnS nanorod probed using a scanning tunneling microscopic technique

We report on the rectification properties from a single ZnS nanorod measured using the UHV-SPM technique. The rectification behavior is evidenced from the current-voltage characteristics measured on a single ZnS nanorod. We propose a tunneling mechanism where the direct tunneling mechanism is dominant at lower applied bias voltages followed by resonant tunneling through discrete energy levels of the nanorod. A further increase in the bias voltage changes the tunneling mechanism to the Fowler-Nordheim tunneling regime enabling rectification behavior. Realizing rectification from a single ZnS nanorod may provide a means of realizing a single nanorod based miniaturized device.

Time-Based All-Digital Technique for Analog Built-in Self-Test

A scheme for built-in self-test of analog signals with minimal area overhead for measuring on-chip voltages in an all-digital manner is presented. The method is well suited for a distributed architecture, where the routing of analog signals over long paths is minimized. A clock is routed serially to the sampling heads placed at the nodes of analog test voltages. This sampling head present at each test node, which consists of a pair of delay cells and a pair of flip-flops, locally converts the test voltage to a skew between a pair of subsampled signals, thus giving rise to as many subsampled signal pairs as the number of nodes. To measure a certain analog voltage, the corresponding subsampled signal pair is fed to a delay measurement unit to measure the skew between this pair. The concept is validated by designing a test chip in a UMC 130-nm CMOS process. Sub-millivolt accuracy for static signals is demonstrated for a measurement time of a few seconds, and an effective number of bits of 5.29 is demonstrated for low-bandwidth signals in the absence of sample-and-hold circuitry.

A Seventeen-level Inverter With a Single DC-link For Motor Drives

In the present paper, a novel topology for generating a 17-level inverter using three-level flying capacitor inverter and cascaded H-bridge modules with floating capacitors. The proposed circuit is analyzed and various aspects of it are presented in the paper. This circuit is experimentally verified and the results are shown. The stability of the capacitor balancing algorithm has been verified during sudden acceleration. This circuit has many pole voltage redundancies. This circuit has an advantage of balancing all the capacitor voltages instantaneously by switching through the redundancies. Another advantage of this topology is its ability to generate all the 17 pole voltages from a single DC link which enables back to back converter operation. Also, the proposed inverter can be operated at all load power factors and modulation indices. Another advantage is, if one of the H-bridges fail, the inverter can still be operated at full load with reduced number of levels.

Electrostatic modulation of periodic potentials in a two-dimensional electron gas: from antidot lattice to quantum dot lattice

We use a dual gated device structure to introduce a gate-tuneable periodic potential in a GaAs/AlGaAs two dimensional electron gas (2DEG). Using only a suitable choice of gate voltages we can controllably alter the potential landscape of the bare 2DEG, inducing either a periodic array of antidots or quantum dots. Antidots are artificial scattering centers, and therefore allow for a study of electron dynamics. In particular, we show that the thermovoltage of an antidot lattice is particularly sensitive to the relative positions of the Fermi level and the antidot potential. A quantum dot lattice, on the other hand, provides the opportunity to study correlated electron physics. We find that its current-voltage characteristics display a voltage threshold, as well as a power law scaling, indicative of collective Coulomb blockade in a disordered background.

Analytical Closed-Form Expressions for Harmonic Distortion Corresponding to Novel Switching Sequences for Neutral-Point-Clamped Inverters

Analytical closed-form expressions for harmonic distortion factors corresponding to various pulsewidth modulation (PWM) techniques for a two-level inverter have been reported in the literature. This paper derives such analytical closed-form expressions, pertaining to centered space-vector PWM (CSVPWM) and eight different advanced bus-clamping PWM (ABCPWM) schemes, for a three-level neutral-point-clamped (NPC) inverter. These ABCPWM schemes switch each phase at twice the nominal switching frequency in certain intervals of the line cycle while clamping each phase to one of the dc terminals over certain other intervals. The harmonic spectra of the output voltages, corresponding to the eight ABCPWM schemes, are studied and compared experimentally with that of CSVPWM over the entire modulation range. The measured values of weighted total harmonic distortion (WTHD) of the line voltage V-WTHD are used to validate the analytical closed-form expressions derived. The analytical expressions, pertaining to two of the ABCPWM methods, are also validated by measuring the total harmonic distortion (THD) in the line current I-THD on a 2.2-kW constant volts-per-hertz induction motor drive.

Electrical switching, SET-RESET, and Raman scattering studies on Ge15Te80-xIn5Agx glasses

Bulk Ge15Te85-xIn5Agx glasses are shown to exhibit electrical switching with switching/threshold voltages in the range of 70-120V for a sample thickness of 0.3 mm. Further, the samples exhibit threshold or memory behavior depending on the ON state current. The compositional studies confirm the presence of an intermediate phase in the range 8 <= x <= 16, revealed earlier by thermal studies. Further, SET-RESET studies have been performed by these glasses using a triangular pulse of 6 mA amplitude (for SET) and 21 mA amplitude (for RESET). Raman studies of the samples after the SET and RESET operations reveal that the SET state is a crystalline phase which is obtained by thermal annealing and the RESET state is the glassy state, similar to the as-quenched samples. It is interesting to note that the samples in the intermediate phase, especially compositions at x = 10, 12, and 14 withstand more set-reset cycles. This indicates compositions in the intermediate phase are better suited for phase change memory applications. (C) 2014 AIP Publishing LLC.

Hysteresis current controller for a general n-level inverter fed drive with online current error boundary computation and nearly constant switching frequency

A space vector-based hysteresis current controller for any general n-level three phase inverter fed induction motor drive is proposed in this study. It offers fast dynamics, inherent overload protection and low harmonic distortion for the phase voltages and currents. The controller performs online current error boundary calculations and a nearly constant switching frequency is obtained throughout the linear modulation range. The proposed scheme uses only the adjacent voltage vectors of the present sector, similar to space vector pulse-width modulation and exhibits fast dynamic behaviour under different transient conditions. The steps involved in the boundary calculation include the estimation of phase voltages from the current ripple, computation of switching time and voltage error vectors. Experimental results are given to show the performance of the drive at various speeds, effect of sudden change of the load, acceleration, speed reversal and validate the proposed advantages.

A Harmonic Suppression Scheme for Open-End Winding Split-Phase IM Drive Using Capacitive Filters for the Full Speed Range

Voltage source inverter (VSI)-fed six-phase induction motor (IM) drives have high 6n +/- 1, n = odd-order harmonic currents. This is because these currents, driven by the corresponding harmonic voltages in the inverter output, are limited only by the stator leakage impedance, as these harmonics are absent in the back electromotive force of the motor. To suppress the harmonic currents, either bulky inductive harmonic filters or complex pulsewidth modulation (PWM) techniques have to be used. This paper proposes a harmonic elimination scheme using switched capacitor filters for a VSI-fed split-phase IM drive. Two 3-phase inverters fed from capacitors are used on the open-end side of the motor to suppress 6n +/- 1, n = odd-order harmonics. A PWM scheme that can suppress the harmonics as well as balance the capacitor voltage is also proposed. The capacitor fed inverters are switched so that the fundamental voltage is not affected, and the fundamental power is always drawn from the main inverters. The proposed scheme is verified with a detailed experimental study. The effectiveness of the scheme is demonstrated by comparing the results with those obtained by disabling the capacitor fed inverters.

Electrothermally tunable MEMS filters

MEMS resonators have potential application in the area of frequency selective devices (e.g., gyroscopes, mass sensors, etc.). In this paper, design of electro thermally tunable resonators is presented. SOIMUMPs process is used to fabricate resonators with springs (beams) and a central mass. When voltage is applied, due to joule heating, temperature of the conducting beams goes up. This results in increase of electrical resistance due to mobility degradation. Due to increase in the temperature, springs start softening and therefore the fundamental frequency decreases. So for a given structure, one can modify the original fundamental frequency by changing the applied voltage. Coupled thermal effects result in non-uniform heating. It is observed from measurements and simulations that some parts of the beam become very hot and therefore soften more. Consequently, at higher voltages, the structure (equivalent to a single resonator) behaves like coupled resonators and exhibits peak splitting. In this mode, the given resonator can be used as a band rejection filter. This process is reversible and repeatable. For the designed structure, it is experimentally shown that by varying the voltage from 1 to 16V, the resonant frequency could be changed by 28%.

Optical, photo-acoustic and electrical switching studies of amorphous GeS2 thin films

This paper reports optical, photo-acoustic and electrical switching investigations of GeS2 amorphous thin films of different thicknesses, deposited on glass substrates in vacuum. The Tauc parameter (B (1/2)) and Urbach energy (E (U)) have been determined from the transmittance spectra, to understand the changes in structural disorder; it is found that B (1/2) increases whereas E (U) decreases as the thickness of the films increases. Based on the results, it is suggested that bond re-arrangement, i.e. transformation from homopolar bonds to heteropolar bonds, takes place with increase in thickness. The thermal diffusivity values of GeS2 thin films also show the presence of a chemically ordered network in the GeS2 thin films. Further, it is found that these films exhibit memory-type electrical switching. The observed variation in the switching voltages has been understood on the basis of increase in chemical order.

Switching and Release Time Analysis of Electrostatically Actuated Capacitive RF MEMS Switches

This paper explains the reason behind pull-in time being more than pull-up time of many Radio Frequency Micro-Electro-Mechanical Systems (RF MEMS) switches at actuation voltages comparable to the pull-in voltage. Analytical expressions for pull-in and pull-up time are also presented. Experimental data as well as finite element simulations of electrostatically actuated beams used in RF-MEMS switches show that the pull-in time is generally more than the pull-up time. Pull-in time being more than pull-up time is somewhat counter-intuitive because there is a much larger electrostatic force during pull-in than the restoring mechanical force during the release. We investigated this issue analytically and numerically using a 1D model for various applied voltages and attribute this to energetics, the rate at which the forces change with time, and softening of the overall effective stiffness of the electromechanical system. 3D finite element analysis is also done to support the 1D model-based analyses.

A VARIABLE SWITCHING FREQUENCY PWM TECHNIQUE FOR INVERTER-FED INDUCTION MOTOR TO ACHIEVE SPREAD SPECTRUM

Voltage Source Inverter (VSI) fed induction motors are widely used in variable speed applications. For inverters using fixed switching frequency PWM, the output harmonic spectra are located at a few discrete frequencies. The ac motordrives powered by these inverters cause acoustic noise. This paper proposes a new variable switching frequency pwm technique and compares its performance with constant switching frequency pwm technique. It is shown that the proposed technique leads to spread spectra of voltages and currents. Also this technique ensures that no lower order harmonics are present and the current THD is comparable to that of fixed switching frequency PWM and is even better for higher modulation indices.

Continuity equation based nonquasi-static charge model for independent double gate MOSFET

Using the numerical device simulation we show that the relationship between the surface potentials along the channel in any double gate (DG) MOSFET remains invariant in QS (quasistatic) and NQS (nonquasi-static) condition for the same terminal voltages. This concept along with the recently proposed `piecewise charge linearization' technique is then used to develop the intrinsic NQS charge model for a Independent DG (IDG) MOSFET by solving the governing continuity equation. It is also demonstrated that unlike the usual MOSFET transcapacitances, the inter-gate transcapacitance of a IDG-MOSFET initially increases with the frequency and then saturates, which might find novel analog circuit application. The proposed NQS model shows good agreement with numerical device simulations and appears to be useful for efficient circuit simulation.

Enhancement in threshold voltage with thickness in memory switch fabricated using GeSe1.5S0.5 thin films

Investigations on the electrical switching, structural, optical and photoacoustic analysis have been undertaken on chalcogenide GeSe1.5S0.5 thin films of various thicknesses prepared by vacuum evaporation technique. The decrease of band gap energy with increase in film thickness has been explained using the `density of states model'. The structural units of the films are characterized using Raman spectroscopy and the deconvoluted Raman peaks obtained from Gaussian fit around 188 cm(-1), 204 cm(-1) and 214 cm(-1) favors Ge-chalcogen tetrahedral units forming corner and edge sharing tetrahedra. All the thin films samples have been exhibited memory-type electrical switching behavior. An enhancement in the threshold voltages of GeSe1.5S0.5 thin films have been observed with increase in film thickness. The thickness dependence of switching voltages provide an insight into the switching mechanism and it is explained by the Joule heating effect. (C) 2014 Elsevier B.V. All rights reserved.