916 resultados para DC voltage droop control


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High voltage power supplies for radar applications are investigated which are subjected to pulsed load with stringent specifications. In the proposed solution, power conversion is done in two stages. A low power-high frequency converter modulates the input voltage of a high power-low frequency converter. This method satisfies all the performance specifications and takes care of the critical aspects of HV transformer.

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A torque control scheme, based on a direct torque control (DTC) algorithm using a 12-sided polygonal voltage space vector, is proposed for a variable speed control of an open-end induction motor drive. The conventional DTC scheme uses a stator flux vector for the sector identification and then the switching vector to control stator flux and torque. However, the proposed DTC scheme selects switching vectors based on the sector information of the estimated fundamental stator voltage vector and its relative position with respect to the stator flux vector. The fundamental stator voltage estimation is based on the steady-state model of IM and the synchronous frequency of operation is derived from the computed stator flux using a low-pass filter technique. The proposed DTC scheme utilizes the exact positions of the fundamental stator voltage vector and stator flux vector to select the optimal switching vector for fast control of torque with small variation of stator flux within the hysteresis band. The present DTC scheme allows full load torque control with fast transient response to very low speeds of operation, with reduced switching frequency variation. Extensive experimental results are presented to show the fast torque control for speed of operation from zero to rated.

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Power semiconductor devices have finite turn on and turn off delays that may not be perfectly matched. In a leg of a voltage source converter, the simultaneous turn on of one device and the turn off of the complementary device will cause a DC bus shoot through, if the turn off delay is larger than the turn on delay time. To avoid this situation it is common practice to blank the two complementary devices in a leg for a small duration of time while switching, which is called dead time. This paper proposes a logic circuit for digital implementation required to control the complementary devices of a leg independently and at the same time preventing cross conduction of devices in a leg, and while providing accurate and stable dead time. This implementation is based on the concept of finite state machines. This circuit can also block improper PWM pulses to semiconductor switches and filters small pulses notches below a threshold time width as the narrow pulses do not provide any significant contribution to average pole voltage, but leads to increased switching loss. This proposed dead time logic has been implemented in a CPLD and is implemented in a protection and delay card for 3- power converters.

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Wind power, as an alternative to fossil fuels, is plentiful, renewable, widely distributed, clean, produces no greenhouse gas emissions during operation, and uses little land. In operation, the overall cost per unit of energy produced is similar to the cost for new coal and natural gas installations. However, the stochastic behaviour of wind speeds leads to significant disharmony between wind energy production and electricity demand. Wind generation suffers from an intermittent characteristics due to the own diurnal and seasonal patterns of the wind behaviour. Both reactive power and voltage control are important under varying operating conditions of wind farm. To optimize reactive power flow and to keep voltages in limit, an optimization method is proposed in this paper. The objective proposed is minimization of the voltage deviations of the load buses (Vdesired). The approach considers the reactive power limits of wind generators and co-ordinates the transformer taps. This algorithm has been tested under practically varying conditions simulated on a test system. The results are obtained on a system of 50-bus real life equivalent power network. The result shows the efficiency of the proposed method.

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The paper presents a new controller inspired by the human experience based, voluntary body action control (dubbed motor control) learning mechanism. The controller is called Experience Mapping based Prediction Controller (EMPC). EMPC is designed with auto-learning features without the need for the plant model. The core of the controller is formed around the motor action prediction-control mechanism of humans based on past experiential learning with the ability to adapt to environmental changes intelligently. EMPC is utilized for high precision position control of DC motors. The simulation results are presented to show that accurate position control is achieved using EMPC for step and dynamic demands. The performance of EMPC is compared with conventional PD controller and MRAC based position controller under different system conditions. Position Control using EMPC is practically implemented and the results are presented.

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A new scheme for nine-level voltage space-vector generation for medium-voltage induction motor (IM) drives with open-end stator winding is presented in this paper. The proposed nine-level power converter topology consists of two conventional three-phase two-level voltage source inverters powered by isolated dc sources and six floating-capacitor-connected H-bridges. The H-bridge capacitor voltages are effectively maintained at the required asymmetrical levels by employing a space vector modulation (SVPWM) based control strategy. An interesting feature of this topology is its ability to function in five-or three-level mode, in the entire modulation range, at full-power rating, in the event of any failure in the H-bridges. This feature significantly improves the reliability of the proposed drive system. Each leg of the three-phase two-level inverters used in this topology switches only for a half cycle of the reference voltage waveform. Hence, the effective switching frequency is reduced by half, resulting in switching loss reduction in high-voltage devices. The transient as well as the steady-state performance of the proposed nine-level inverter-fed IM drive system is experimentally verified in the entire modulation range including the overmodulation region.

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This paper presents the design of a start up power circuit for a control power supply (CPS) which feeds power to the sub-systems of High Power Converters (HPC). The sub-systems such as gate drive card, annunciation card, protection and delay card etc; needs to be provided power for the operation of a HPC. The control power supply (CPS) is designed to operate over a wide range of input voltage from 90Vac to 270Vac. The CPS output supplies power at a desired voltage of Vout =24V to the auxiliary sub-systems of the HPC. During the starting, the power supply to the control circuitry of CPS in turn, is obtained using a separate start-up power supply. This paper discusses the various design issues of the start-up power circuit to ensure that start-up and shut down of the CPS occurs reliably. The CPS also maintains the power factor close to unity and low total harmonic distortion in input current. The paper also provides design details of gate drive circuits employed for the CPS as well as the design of on-board power supply for the CPS. Index terms: control power supply, start-up power supply, DSFC, pre-regulator

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A three-level common-mode voltage eliminated inverter with single dc supply using flying capacitor inverter and cascaded H-bridge has been proposed in this paper. The three phase space vector polygon formed by this configuration and the polygon formed by the common-mode eliminated states have been discussed. The entire system is simulated in Simulink and the results are experimentally verified. This system has an advantage that if one of devices in the H-bridge fails, the system can still be operated as a normal three-level inverter at full power. This inverter has many other advantages like use of single dc supply, making it possible for a back-to-back grid-tied converter application, improved reliability, etc.

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A new hybrid multilevel power converter topology is presented in this paper. The proposed power converter topology uses only one DC source and floating capacitors charged to asymmetrical voltage levels, are used for generating different voltage levels. The SVPWM based control strategy used in this converter maintains the capacitor voltages at the required levels in the entire modulation range including the over-modulation region. For the voltage levels: nine and above, the number of components required in the proposed topology is significantly lower, compared to the conventional multilevel inverter topologies. The number of capacitors required in this topology reduces drastically compared to the conventional flying capacitor topology, when the number of levels in the inverter output increases. This topology has better fault tolerance, as it is capable of operating with reduced number of levels, in the entire modulation range, in the event of any failure in the H-bridges. The transient as well as the steady state performance of the nine-level version of the proposed topology is experimentally verified in the entire modulation range including the over-modulation region.

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Grid simulators are used to test the control performance of grid-connected inverters under a wide range of grid disturbance conditions. In the present work, a three phase back-to-back connected inverter sharing a common dc bus has been programmed as a grid simulator. Three phase balanced disturbance voltages applied to three-phase balanced loads has been considered in the present work. The developed grid simulator can generate three phase balanced voltage sags, voltage swells, frequency deviations and phase jumps. The grid simulator uses a novel disturbance generation algorithm. The algorithm allows the user to reference the disturbance to any of the three phases at any desired phase angle. Further, the exit of the disturbance condition can be referenced to the desired phase angle of any phase by adjusting the duration of the disturbance. The grid simulator hardware has been tested with different loads – a linear purely resistive load, a non-linear diode-bridge load and a grid-connected inverter load.

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This paper proposes a technique to suppress low-order harmonics for an open-end winding induction motor drive for a full modulation range. One side of the machine is connected to a main inverter with a dc power supply, whereas the other inverter is connected to a capacitor from the other side. Harmonic suppression (with complete elimination of fifth- and seventh-order harmonics) is achieved by realizing dodecagonal space vectors using a combined pulsewidth modulation (PWM) control for the two inverters. The floating capacitor voltage is inherently controlled during the PWM operation. The proposed PWM technique is shown to be valid for the entire modulation range, including overmodulation and six-step mode of operation of the main inverter. Experimental results have been presented to validate the proposed technique.

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In this paper, a multilevel dodecagonal voltage space vector structure with nineteen concentric dodecagons is proposed for the first time. This space vector structure is achieved by cascading two sets of asymmetric three-level inverters with isolated H-bridges on either side of an open-end winding induction motor. The dodecagonal structure is made possible by proper selection of dc link voltages and switching states of the inverters. The proposed scheme retains all the advantages of multilevel topologies as well as the advantages of dodecagonal voltage space vector structure. In addition to that, a generic and simple method for calculation of pulsewidth modulation timings using only sampled reference values (v(alpha) and v(beta)) is proposed. This enables the scheme to be used for any closed-loop application such as vector control. In addition, a new method of switching technique is proposed, which ensures minimum switching while eliminating the fifth-and seventh-order harmonics and suppressing the eleventh and thirteenth harmonics, eliminating the need for bulky filters. The motor phase voltage is a 24-stepped wave-form for the entire modulation range thereby reducing the number of switchings of the individual inverter modules. Experimental results for steady-state operation, transient operation, including start-up have been presented and the results of fast Fourier transform analysis is also presented for validating the proposed concept.

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Arc voltage fluctuations in a direct current (DC) non-transferred arc plasma generator are experimentally studied, in generating a jet in the laminar, transitional and turbulent regimes. The study is with a view toward elucidating the mechanism of the fluctuations and their relationship with the generating parameters, arc root movement and flow regimes. Results indicate that the existence of a 300 Hz alternating current (AC) component in the power supply ripples does not cause the transition of the laminar plasma jet into a turbulent state. There exists a high frequency fluctuation at 4 kHz in the turbulent jet regime. It may be related to the rapid movement of the anode attachment point of the arc.

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El pipián ( Cucurbita pepo.) tiene su origen en el continente americano, por lo que la diversidad genética presente en el continente ha permitido muchas denominaciones populares. El trabajo de investigación se llevó a cabo en la Reserva de Recursos Genéticos de Apacunca, en la comunidad de Asquespalapa, el objetivo fue encontrar opciones de bajo costo y no dañinas a la salud humana y ambiente, para el control de la Cenicilla del Pipián ( Erysiphe cichoracearum), Los tratamientos fueron arreglados en un diseño de bloque completo al azar (B.C.A) con tres réplicas. El ensayo fue establecido en una Area de 100m2. Cada parcela experimental estuvo constituida por 4 surcos de 6 metros de largo con distancia entre plantas de 1 metro. El área total de cada parcela experimental fue de 18 metros cuadrados. La parcela útil estuvo constituida por las 8 plantas centrales de cada parcela experimental. La variedad utilizada para el estudio fue la Criolla. Los tratamientos probados consistieron en tres caldos minerales preventivos y un testigo, se realizó un análisis de varianza con un 95 % de confianza y separación de medias según Tukey LSD (∞= 0.05) y análisis de beneficio costo. Los resultados indican que el caldo vizosa mostró únicamente entre un 5 y 10% de afectación en cuanto a la incidencia y severidad de la enfermedad, en segunda categoría encontramos al caldo bordelés con un 15 y 20 %, de afectación. En cuanto a la relación beneficio costo se determinó que el caldo Vizosa es un producto rentable ad amas de mantener la parcela libre de patógenos da un resultado económico en cuanto a la producción y compensación a la hora de vender en el mercado.