Influence of sputter power on structural and electrical properties of TiO2 films for Al/TiO2/Si gate capacitors

Titanium dioxide (TiO2) thin films were deposited onto p-Si substrates held at room temperature by reactive Direct Current (DC) magnetron sputtering at various sputter powers in the range 80-200W. The as-deposited TiO2 films were annealed at a temperature of 1023K. The post-annealed films were characterized for crystallographic structure, chemical binding configuration, surface morphology and optical absorption. The electrical and dielectric properties of Al/TiO2/p-Si structure were determined from the capacitance-voltage and current-voltage characteristics. X-ray diffraction studies confirmed that the as-deposited films were amorphous in nature. After post-annealing at 1023K, the films formed at lower powers exhibited anatase phase, where as those deposited at sputter powers >160W showed the mixed anatase and rutile phases of TiO2. The surface morphology of the films varied significantly with the increase of sputter power. The electrical and dielectric properties on the air-annealed Al/TiO2/p-Si structures were studied. The effect of sputter power on the electrical and dielectric characteristics of the structure of Al/TiO2/p-Si (metal-insulator-semiconductor) was systematically investigated. Copyright (c) 2014 John Wiley & Sons, Ltd.

Experimental Investigation on Switching Characteristics of High-Current Insulated Gate Bipolar Transistors at Low Currents

Insulated gate bipolar transistors (IGBTs) are used in high-power voltage-source converters rated up to hundreds of kilowatts or even a few megawatts. Knowledge of device switching characteristics is required for reliable design and operation of the converters. Switching characteristics are studied widely at high current levels, and corresponding data are available in datasheets. But the devices in a converter also switch low currents close to the zero crossings of the line currents. Further, the switching behaviour under these conditions could significantly influence the output waveform quality including zero crossover distortion. Hence, the switching characteristics of high-current IGBTs (300-A and 75-A IGBT modules) at low load current magnitudes are investigated experimentally in this paper. The collector current, gate-emitter voltage and collector-emitter voltage are measured at various low values of current (less than 10% of the device rated current). A specially designed in-house constructed coaxial current transformer (CCT) is used for device current measurement without increasing the loop inductance in the power circuit. Experimental results show that the device voltage rise time increases significantly during turn-off transitions at low currents.

A Short-Channel Common Double-Gate MOSFET Model Adapted to Gate Oxide Thickness Asymmetry

Existing compact models for common double-gate (CDG) MOSFETs are based on the fundamental assumption of having symmetric gate oxide thickness. In this paper, we demonstrate that using the unique quasi-linear relationship between the surface potentials, it is possible to develop compact model for CDG-MOSFETs without such approximation while preserving the mathematical complexity at the same level of the existing models. In the proposed model, the surface potential relationship is used to include the drain-induced barrier lowering, channel length modulation, velocity saturation, and quantum mechanical effect in the long-channel model and good agreement is observed with the technology computer aided design simulation results.

How Does Effectual Logic Impact Survival of High-tech Startups in an Emerging Economy? - Evidence from 99tests.com Case Study

During the early stages of operation, high-tech startups need to overcome the liability of newness and manage high degree of uncertainty. Several high-tech startups fail due to inability to deal with skeptical customers, underdeveloped markets and limited resources in selling an offering that has no precedent. This paper leverages the principles of effectuation (a logic of entrepreneurial decision making under uncertainty) to explain the journey from creation to survival of high-tech startups in an emerging economy. Based on the 99tests.com case study, this paper suggests that early stage high-tech startups in emerging economies can increase their probability of survival by adopting the principles of effectuation.

Small signal Nonquasi-Static Model for Common Double-Gate MOSFETs Adapted to Gate Oxide Thickness Asymmetry

We present a physics-based closed form small signal Nonquasi-static (NQS) model for a long channel Common Double Gate MOSFET (CDG) by taking into account the asymmetry that may prevail between the gate oxide thickness. We use the unique quasi-linear relationship between the surface potentials along the channel to solve the governing continuity equation (CE) in order to develop the analytical expressions for the Y parameters. The Bessel function based solution of the CE is simplified in form of polynomials so that it could be easily implemented in any circuit simulator. The model shows good agreement with the TCAD simulation at-least till 4 times of the cut-off frequency for different device geometries and bias conditions.

Experimental Investigation on Switching Characteristics of High-Current Insulated Gate Bipolar Transistors at Low Currents

Insulated gate bipolar transistors (IGBTs) are used in high-power voltage-source converters rated up to hundreds of kilowatts or even a few megawatts. Knowledge of device switching characteristics is required for reliable design and operation of the converters. Switching characteristics are studied widely at high current levels, and corresponding data are available in datasheets. But the devices in a converter also switch low currents close to the zero crossings of the line currents. Further, the switching behaviour under these conditions could significantly influence the output waveform quality including zero crossover distortion. Hence, the switching characteristics of high-current IGBTs (300-A and 75-A IGBT modules) at low load current magnitudes are investigated experimentally in this paper. The collector current, gate-emitter voltage and collector-emitter voltage are measured at various low values of current (less than 10% of the device rated current). A specially designed in-house constructed coaxial current transformer (CCT) is used for device current measurement without increasing the loop inductance in the power circuit. Experimental results show that the device voltage rise time increases significantly during turn-off transitions at low currents.

Growth of TiO2 Films by RF Magnetron Sputtering for MOS Gate Dielectrics: Influence of Substrate Temperature

Titanium dioxide thin films were deposited by RF reactive magnetron sputtering technique on p-type silicon(100) substrates held at temperatures in the range 303-673 K. The influence of substrate temperature on the core level binding energies, chemical bonding configuration, crystallographic structure and dielectric properties was investigated. X-ray photoelectron spectroscopy studies and Fourier transform infrared transmittance data confirmed the formation of stoichiometric films with anatase phase at a substrate temperature of 673 K. The films formed at 303 K were nanocrystalline with amorphous matrix while those deposited at 673 K were transformed in to crystalline phase and growth of grains in pyramidal like structure as confirmed by X-ray diffraction and atomic force microscopy respectively. Metal-oxide-semiconductor capacitors were fabricated with the configuration of Al/TiO2/Si structures. The current voltage, capacitance voltage and conductance voltage characteristics were studied to understand the electrical conduction and dielectric properties of the MOS devices. The leakage current density (at gate voltage of 2 V) decreased from 2.2 x 10(-6) to 1.7 x 10(-7) A/cm(2), the interface trap density decreased from 1.2 x 10(13) to 2.1 x 10(12) cm(-2) eV(-1) and the dielectric constant increased from 14 to 36 with increase of substrate temperature from 303 to 673 K.

Experimental characterisation and performance evaluation of a coaxial current transformer for measurement of insulated gate bipolar transistor switching current

Measurement of device current during switching characterisation of an insulated gate bipolar transistor (IGBT) requires a current sensor with low insertion impedance and high bandwidth. This study presents an experimental procedure for evaluating the performance of a coaxial current transformer (CCT), designed for the above purpose. A prototype CCT, which can be mounted directly on a power terminal of a 1200 V/50 A half-bridge IGBT module, is characterised experimentally. The measured characteristics include insertion impedance, gain and phase of the CCT at different frequencies. The bounds of linearity within which the CCT can operate without saturation are determined theoretically, and are also verified experimentally. The experimental study on linearity of the CCT requires a high-amplitude current source. A proportional-resonant (PR) controller-based current-controlled half-bridge inverter is developed for this purpose. A systematic procedure for selection of PR controller parameters is also reported in this study. This set-up is helpful to determine the limit of linearity and also to measure the frequency response of the CCT at realistic amplitudes of current in the low-frequency range.

Low temperature solution processed high-kappa ZrO2 gate dielectrics for nanoelectonics

The high-kappa gate dielectrics, specifically amorphous films offer salient features such as exceptional mechanical flexibility, smooth surfaces and better uniformity associated with low leakage current density. In this work, similar to 35 nm thick amorphous ZrO2 films were deposited on silicon substrate at low temperature (300 degrees C, 1 h) from facile spin-coating method and characterized by various analytical techniques. The X-ray diffraction and X-ray photoelectron spectroscopy reveal the formation of amorphous phase ZrO2, while ellipsometry analysis together with the Atomic Force Microscope suggest the formation of dense film with surface roughness of 1.5 angstrom, respectively. The fabricated films were integrated in metal-oxide-semiconductor (MOS) structures to check the electrical capabilities. The oxide capacitance (C-ox), flat band capacitance (C-FB), flat band voltage (V-FB), dielectric constant (kappa) and oxide trapped charges (Q(ot)) extracted from high frequency (1 MHz) C-V curve are 186 pF, 104 pF, 0.37V, 15 and 2 x 10(-11) C, respectively. The small flat band voltage 0.37V, narrow hysteresis and very little frequency dispersion between 10 kHz-1 MHz suggest an excellent a-ZrO2/Si interface with very less trapped charges in the oxide. The films exhibit a low leakage current density 4.7 x 10(-9)A/cm(2) at 1V. In addition, the charge transport mechanism across the MOSC is analyzed and found to have a strong bias dependence. The space charge limited conduction mechanism is dominant in the high electric field region (1.3-5 V) due to the presence of traps, while the trap-supported tunneling is prevailed in the intermediate region (0.35-1.3 V). Low temperature solution processed ZrO2 thin films obtained are of high quality and find their importance as a potential dielectric layer on Si and polymer based flexible electronics. (C) 2016 Published by Elsevier B.V.

Scanning gate microscopy of current-annealed single layer graphene

We have used scanning gate microscopy to explore the local conductivity of a current-annealed graphene flake. A map of the local neutrality point (NP) after annealing at low current density exhibits micron-sized inhomogeneities. Broadening of the local e-h transition is also correlated with the inhomogeneity of the NP. Annealing at higher current density reduces the NP inhomogeneity, but we still observe some asymmetry in the e-h conduction. We attribute this to a hole-doped domain close to one of the metal contacts combined with underlying striations in the local NP. © 2010 American Institute of Physics.

A comparative study of plasma-enhanced chemical vapor gate dielectrics for solution-processed polymer thin-film transistor circuit integration

This paper considers plasma-enhanced chemical vapor deposited (PECVD) silicon nitride (SiNx) and silicon oxide (SiOx) as gate dielectrics for organic thin-film transistors (OTFTs), with solution-processed poly[5, 5′ -bis(3-dodecyl-2-thienyl)-2, 2′ -bithiophene] (PQT-12) as the active semiconductor layer. We examine transistors with SiNx films of varying composition deposited at 300 °C as well as 150 °C for plastic compatibility. The transistors show over 100% (two times) improvement in field-effect mobility as the silicon content in SiNx increases, with mobility (μFE) up to 0.14 cm2 /V s and on/off current ratio (ION / IOFF) of 108. With PECVD SiOx gate dielectric, preliminary devices exhibit a μFE of 0.4 cm2 /V s and ION / IOFF of 108. PQT-12 OTFTs with PECVD SiNx and SiOx gate dielectrics on flexible plastic substrates are also presented. These results demonstrate the viability of using PECVD SiN x and SiOx as gate dielectrics for OTFT circuit integration, where the low temperature and large area deposition capabilities of PECVD films are highly amenable to integration of OTFT circuits targeted for flexible and lightweight applications. © 2008 American Institute of Physics.

Self-aligned split gate electrodes fabricated on suspended carbon nanotubes

We describe the fabrication of self-aligned split gate electrodes on suspended multiwalled carbon nanotube structures. A suspended multiwalled carbon nanotube structure was used as an evaporation mask for the deposition of metal electrodes resulting in the formation of discontinuous wire deposition. The metal deposits on the nanotubes are removed with lift-off due to the poor adhesion of metal to the nanotube surface. Using Al sacrificial layers, it was possible to fabricate self-aligned contact electrodes and control electrodes nanometers from the suspended carbon nanotubes with a single lithography step. It was also shown that the fabrication technique may also be used to form nano-gaped contact electrodes. The technique should prove useful for the fabrication of nano-electromechanical systems.

Self-aligned split gate electrodes fabricated on suspended carbon nanotubes

We describe the fabrication of self-aligned split gate electrodes on suspended multiwalled carbon nanotube structures. A suspended multiwalled carbon nanotube structure was used as an evaporation mask for the deposition of metal electrodes resulting in the formation of discontinuous wire deposition. The metal deposits on the nanotubes are removed with lift-off due to the poor adhesion of metal to the nanotube surface. Using Al sacrificial layers, it was possible to fabricate self-aligned contact electrodes and control electrodes nanometers from the suspended carbon nanotubes with a single lithography step. It was also shown that the fabrication technique may also be used to form nano-gaped contact electrodes. The technique should prove useful for the fabrication of nano-electromechanical systems. © 2003 Materials Research Society.