724 resultados para intel processor
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A traditional photonic-force microscope (PFM) results in huge sets of data, which requires tedious numerical analysis. In this paper, we propose instead an analog signal processor to attain real-time capabilities while retaining the richness of the traditional PFM data. Our system is devoted to intracellular measurements and is fully interactive through the use of a haptic joystick. Using our specialized analog hardware along with a dedicated algorithm, we can extract the full 3D stiffness matrix of the optical trap in real time, including the off-diagonal cross-terms. Our system is also capable of simultaneously recording data for subsequent offline analysis. This allows us to check that a good correlation exists between the classical analysis of stiffness and our real-time measurements. We monitor the PFM beads using an optical microscope. The force-feedback mechanism of the haptic joystick helps us in interactively guiding the bead inside living cells and collecting information from its (possibly anisotropic) environment. The instantaneous stiffness measurements are also displayed in real time on a graphical user interface. The whole system has been built and is operational; here we present early results that confirm the consistency of the real-time measurements with offline computations.
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Actualment, els hàbits tecnològics dels usuaris són cada vegada més diferents a causa de la innovació. Entre aquests nous hàbits, el telèfon intel-ligent està tenint una repercussió molt gran. A més dels avantatges que dóna a l’usuari, està oferint a les empreses una nova manera de comunicar-se amb els consumidors mitjançant diferents tipus de publicitat, com són la publicitat en cercadors i contextual. Aquesta investigació, tracta d’oferir a les empreses i persones interessades en la publicitat per a smartphones, una lectura de l’efectivitat que pot tenir quan està integrada en les pàgines de resultats dels cercadors, anomenada enllaços patrocinats o SEM
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Actualment un típic embedded system (ex. telèfon mòbil) requereix alta qualitat per portar a terme tasques com codificar/descodificar a temps real; han de consumir poc energia per funcionar hores o dies utilitzant bateries lleugeres; han de ser el suficientment flexibles per integrar múltiples aplicacions i estàndards en un sol aparell; han de ser dissenyats i verificats en un període de temps curt tot i l’augment de la complexitat. Els dissenyadors lluiten contra aquestes adversitats, que demanen noves innovacions en arquitectures i metodologies de disseny. Coarse-grained reconfigurable architectures (CGRAs) estan emergent com a candidats potencials per superar totes aquestes dificultats. Diferents tipus d’arquitectures han estat presentades en els últims anys. L’alta granularitat redueix molt el retard, l’àrea, el consum i el temps de configuració comparant amb les FPGAs. D’altra banda, en comparació amb els tradicionals processadors coarse-grained programables, els alts recursos computacionals els permet d’assolir un alt nivell de paral•lelisme i eficiència. No obstant, els CGRAs existents no estant sent aplicats principalment per les grans dificultats en la programació per arquitectures complexes. ADRES és una nova CGRA dissenyada per I’Interuniversity Micro-Electronics Center (IMEC). Combina un processador very-long instruction word (VLIW) i un coarse-grained array per tenir dues opcions diferents en un mateix dispositiu físic. Entre els seus avantatges destaquen l’alta qualitat, poca redundància en les comunicacions i la facilitat de programació. Finalment ADRES és un patró enlloc d’una arquitectura concreta. Amb l’ajuda del compilador DRESC (Dynamically Reconfigurable Embedded System Compile), és possible trobar millors arquitectures o arquitectures específiques segons l’aplicació. Aquest treball presenta la implementació d’un codificador MPEG-4 per l’ADRES. Mostra l’evolució del codi per obtenir una bona implementació per una arquitectura donada. També es presenten les característiques principals d’ADRES i el seu compilador (DRESC). Els objectius són de reduir al màxim el nombre de cicles (temps) per implementar el codificador de MPEG-4 i veure les diferents dificultats de treballar en l’entorn ADRES. Els resultats mostren que els cícles es redueixen en un 67% comparant el codi inicial i final en el mode VLIW i un 84% comparant el codi inicial en VLIW i el final en mode CGA.
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Per a moltes persones, la manera de mirar, a Catalunya, la realitat sociolingüística i, en conseqüència, també la política lingüística que se'n desprèn- deriva fonamentalment encara de les idees i aspiracions que s'estengueren a partir de la dècada dels 60. Encara en plena dictadura, alguns intel.lectuals i activistes van anar elaborant un discurs reivindicatiu que, tot passant per les controvèrsies ideològico-terminològiques del 'bilingüisme' versus la 'diglòssia' i de l'ensenyament en la llengua de l'Estat versus la 'llengua materna', va anar cristal.lizant en el procés dit de 'normalització lingüística' en què ara ens trobem immersos. És des d'aquesta perspectiva de fons que, amb un concepte de 'bilingüisme' dimonitzat -per la seva suposada automàtica evolució cap a la 'substitució'- i amb l'ensenyament en 'llengua materna' més aviat sacralitzat, s'han anat construint les bases d'una organització lingüística pública que paradoxalment pot arribar ser, però, problemàtica i contraproduent sinó es va adaptant als canvis que el nostre context político-econòmico-tecnològic va experimentant.
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Per a moltes persones, la manera de mirar, a Catalunya, la realitat sociolingüística i, en conseqüència, també la política lingüística que se'n desprèn- deriva fonamentalment encara de les idees i aspiracions que s'estengueren a partir de la dècada dels 60. Encara en plena dictadura, alguns intel.lectuals i activistes van anar elaborant un discurs reivindicatiu que, tot passant per les controvèrsies ideològico-terminològiques del 'bilingüisme' versus la 'diglòssia' i de l'ensenyament en la llengua de l'Estat versus la 'llengua materna', va anar cristal.lizant en el procés dit de 'normalització lingüística' en què ara ens trobem immersos. És des d'aquesta perspectiva de fons que, amb un concepte de 'bilingüisme' dimonitzat -per la seva suposada automàtica evolució cap a la 'substitució'- i amb l'ensenyament en 'llengua materna' més aviat sacralitzat, s'han anat construint les bases d'una organització lingüística pública que paradoxalment pot arribar ser, però, problemàtica i contraproduent sinó es va adaptant als canvis que el nostre context político-econòmico-tecnològic va experimentant.
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The motivation for this research initiated from the abrupt rise and fall of minicomputers which were initially used both for industrial automation and business applications due to their significantly lower cost than their predecessors, the mainframes. Later industrial automation developed its own vertically integrated hardware and software to address the application needs of uninterrupted operations, real-time control and resilience to harsh environmental conditions. This has led to the creation of an independent industry, namely industrial automation used in PLC, DCS, SCADA and robot control systems. This industry employs today over 200'000 people in a profitable slow clockspeed context in contrast to the two mainstream computing industries of information technology (IT) focused on business applications and telecommunications focused on communications networks and hand-held devices. Already in 1990s it was foreseen that IT and communication would merge into one Information and communication industry (ICT). The fundamental question of the thesis is: Could industrial automation leverage a common technology platform with the newly formed ICT industry? Computer systems dominated by complex instruction set computers (CISC) were challenged during 1990s with higher performance reduced instruction set computers (RISC). RISC started to evolve parallel to the constant advancement of Moore's law. These developments created the high performance and low energy consumption System-on-Chip architecture (SoC). Unlike to the CISC processors RISC processor architecture is a separate industry from the RISC chip manufacturing industry. It also has several hardware independent software platforms consisting of integrated operating system, development environment, user interface and application market which enables customers to have more choices due to hardware independent real time capable software applications. An architecture disruption merged and the smartphone and tablet market were formed with new rules and new key players in the ICT industry. Today there are more RISC computer systems running Linux (or other Unix variants) than any other computer system. The astonishing rise of SoC based technologies and related software platforms in smartphones created in unit terms the largest installed base ever seen in the history of computers and is now being further extended by tablets. An underlying additional element of this transition is the increasing role of open source technologies both in software and hardware. This has driven the microprocessor based personal computer industry with few dominating closed operating system platforms into a steep decline. A significant factor in this process has been the separation of processor architecture and processor chip production and operating systems and application development platforms merger into integrated software platforms with proprietary application markets. Furthermore the pay-by-click marketing has changed the way applications development is compensated: Three essays on major trends in a slow clockspeed industry: The case of industrial automation 2014 freeware, ad based or licensed - all at a lower price and used by a wider customer base than ever before. Moreover, the concept of software maintenance contract is very remote in the app world. However, as a slow clockspeed industry, industrial automation has remained intact during the disruptions based on SoC and related software platforms in the ICT industries. Industrial automation incumbents continue to supply systems based on vertically integrated systems consisting of proprietary software and proprietary mainly microprocessor based hardware. They enjoy admirable profitability levels on a very narrow customer base due to strong technology-enabled customer lock-in and customers' high risk leverage as their production is dependent on fault-free operation of the industrial automation systems. When will this balance of power be disrupted? The thesis suggests how industrial automation could join the mainstream ICT industry and create an information, communication and automation (ICAT) industry. Lately the Internet of Things (loT) and weightless networks, a new standard leveraging frequency channels earlier occupied by TV broadcasting, have gradually started to change the rigid world of Machine to Machine (M2M) interaction. It is foreseeable that enough momentum will be created that the industrial automation market will in due course face an architecture disruption empowered by these new trends. This thesis examines the current state of industrial automation subject to the competition between the incumbents firstly through a research on cost competitiveness efforts in captive outsourcing of engineering, research and development and secondly researching process re- engineering in the case of complex system global software support. Thirdly we investigate the industry actors', namely customers, incumbents and newcomers, views on the future direction of industrial automation and conclude with our assessments of the possible routes industrial automation could advance taking into account the looming rise of the Internet of Things (loT) and weightless networks. Industrial automation is an industry dominated by a handful of global players each of them focusing on maintaining their own proprietary solutions. The rise of de facto standards like IBM PC, Unix and Linux and SoC leveraged by IBM, Compaq, Dell, HP, ARM, Apple, Google, Samsung and others have created new markets of personal computers, smartphone and tablets and will eventually also impact industrial automation through game changing commoditization and related control point and business model changes. This trend will inevitably continue, but the transition to a commoditized industrial automation will not happen in the near future.
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Background: Research in epistasis or gene-gene interaction detection for human complex traits has grown over the last few years. It has been marked by promising methodological developments, improved translation efforts of statistical epistasis to biological epistasis and attempts to integrate different omics information sources into the epistasis screening to enhance power. The quest for gene-gene interactions poses severe multiple-testing problems. In this context, the maxT algorithm is one technique to control the false-positive rate. However, the memory needed by this algorithm rises linearly with the amount of hypothesis tests. Gene-gene interaction studies will require a memory proportional to the squared number of SNPs. A genome-wide epistasis search would therefore require terabytes of memory. Hence, cache problems are likely to occur, increasing the computation time. In this work we present a new version of maxT, requiring an amount of memory independent from the number of genetic effects to be investigated. This algorithm was implemented in C++ in our epistasis screening software MBMDR-3.0.3. We evaluate the new implementation in terms of memory efficiency and speed using simulated data. The software is illustrated on real-life data for Crohn’s disease. Results: In the case of a binary (affected/unaffected) trait, the parallel workflow of MBMDR-3.0.3 analyzes all gene-gene interactions with a dataset of 100,000 SNPs typed on 1000 individuals within 4 days and 9 hours, using 999 permutations of the trait to assess statistical significance, on a cluster composed of 10 blades, containing each four Quad-Core AMD Opteron(tm) Processor 2352 2.1 GHz. In the case of a continuous trait, a similar run takes 9 days. Our program found 14 SNP-SNP interactions with a multiple-testing corrected p-value of less than 0.05 on real-life Crohn’s disease (CD) data. Conclusions: Our software is the first implementation of the MB-MDR methodology able to solve large-scale SNP-SNP interactions problems within a few days, without using much memory, while adequately controlling the type I error rates. A new implementation to reach genome-wide epistasis screening is under construction. In the context of Crohn’s disease, MBMDR-3.0.3 could identify epistasis involving regions that are well known in the field and could be explained from a biological point of view. This demonstrates the power of our software to find relevant phenotype-genotype higher-order associations.
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This paper presents SiMR, a simulator of the Rudimentary Machine designed to be used in a first course of computer architecture of Software Engineering and Computer Engineering programmes. The Rudimentary Machine contains all the basic elements in a RISC computer, and SiMR allows editing, assembling and executing programmes for this processor. SiMR is used at the Universitat Oberta de Catalunya as one of the most important resources in the Virtual Computing Architecture and Organisation Laboratory, since students work at home with the simulator and reports containing their work are automatically generated to be evaluated by lecturers. The results obtained from a survey show that most of the students consider SiMR as a highly necessary or even an indispensable resource to learn the basic concepts about computer architecture.
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The well-known structure of an array combiner along with a maximum likelihood sequence estimator (MLSE) receiveris the basis for the derivation of a space-time processor presentinggood properties in terms of co-channel and intersymbol interferencerejection. The use of spatial diversity at the receiver front-endtogether with a scalar MLSE implies a joint design of the spatialcombiner and the impulse response for the sequence detector. Thisis faced using the MMSE criterion under the constraint that thedesired user signal power is not cancelled, yielding an impulse responsefor the sequence detector that is matched to the channel andcombiner response. The procedure maximizes the signal-to-noiseratio at the input of the detector and exhibits excellent performancein realistic multipath channels.
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Tietokonejärjestelmän osien ja ohjelmistojen suorituskykymittauksista saadaan tietoa,jota voidaan käyttää suorituskyvyn parantamiseen ja laitteistohankintojen päätöksen tukena. Tässä työssä tutustutaan suorituskyvyn mittaamiseen ja mittausohjelmiin eli ns. benchmark-ohjelmistoihin. Työssä etsittiin ja arvioitiin eri tyyppisiä vapaasti saatavilla olevia benchmark-ohjelmia, jotka soveltuvat Linux-laskentaklusterin suorituskyvynanalysointiin. Benchmarkit ryhmiteltiin ja arvioitiin testaamalla niiden ominaisuuksia Linux-klusterissa. Työssä käsitellään myös mittausten tekemisen ja rinnakkaislaskennan haasteita. Benchmarkkeja löytyi moneen tarkoitukseen ja ne osoittautuivat laadultaan ja laajuudeltaan vaihteleviksi. Niitä on myös koottu ohjelmistopaketeiksi, jotta laitteiston suorituskyvystä saisi laajemman kuvan kuin mitä yhdellä ohjelmalla on mahdollista saada. Olennaista on ymmärtää nopeus, jolla dataa saadaan siirretyä prosessorille keskusmuistista, levyjärjestelmistä ja toisista laskentasolmuista. Tyypillinen benchmark-ohjelma sisältää paljon laskentaa tarvitsevan matemaattisen algoritmin, jota käytetään tieteellisissä ohjelmistoissa. Benchmarkista riippuen tulosten ymmärtäminen ja hyödyntäminen voi olla haasteellista.
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Monimutkaisen tietokonejärjestelmän suorituskykyoptimointi edellyttää järjestelmän ajonaikaisen käyttäytymisen ymmärtämistä. Ohjelmiston koon ja monimutkaisuuden kasvun myötä suorituskykyoptimointi tulee yhä tärkeämmäksi osaksi tuotekehitysprosessia. Tehokkaampien prosessorien käytön myötä myös energiankulutus ja lämmöntuotto ovat nousseet yhä suuremmiksi ongelmiksi, erityisesti pienissä, kannettavissa laitteissa. Lämpö- ja energiaongelmien rajoittamiseksi on kehitetty suorituskyvyn skaalausmenetelmiä, jotka edelleen lisäävät järjestelmän kompleksisuutta ja suorituskykyoptimoinnin tarvetta. Tässä työssä kehitettiin visualisointi- ja analysointityökalu ajonaikaisen käyttäytymisen ymmärtämisen helpottamiseksi. Lisäksi kehitettiin suorituskyvyn mitta, joka mahdollistaa erilaisten skaalausmenetelmien vertailun ja arvioimisen suoritusympäristöstä riippumatta, perustuen joko suoritustallenteen tai teoreettiseen analyysiin. Työkalu esittää ajonaikaisesti kerätyn tallenteen helposti ymmärrettävällä tavalla. Se näyttää mm. prosessit, prosessorikuorman, skaalausmenetelmien toiminnan sekä energiankulutuksen kolmiulotteista grafiikkaa käyttäen. Työkalu tuottaa myös käyttäjän valitsemasta osasta suorituskuvaa numeerista tietoa, joka sisältää useita oleellisia suorituskykyarvoja ja tilastotietoa. Työkalun sovellettavuutta tarkasteltiin todellisesta laitteesta saatua suoritustallennetta sekä suorituskyvyn skaalauksen simulointia analysoimalla. Skaalausmekanismin parametrien vaikutus simuloidun laitteen suorituskykyyn analysoitiin.
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S'han estudiant les funcions neuropsicològiques en una mostra de 96 pacients amb malaltia de Parkinson (MP) i 42 controls aparellats per gènere, edat, escolaritat i intel.ligència verbal. Els resultats indiquen que els pacients afectats per MP, com a grup, presenten alteracions en les funcions visuoespacials, en la memòria i en les funcions frontals, però que aquests dèficits no estan sempre presents en tots els pacients. L'anàlisi de clusters realitzat ens mostra que les alteracions neuropsicològiques presents en la MP estan distribuides en subgrups. En un dels grups es va observar la presència d'afectació cognitiva generalitzada, mentre que el segon subgrup va mostrar absència de dèficits cognitius i, finalment, el darrer subgrup presentava alteracions específiques en les funcions visuoespacials i frontals. La puntuació verbal mostrava el mateix patró de deteriorament que les funcions frontals i es va trobar una diferència significativa entre els pacients i el grup control en aquesta funció. La presencia de depressió estava present en un 50% dels pacients i estava fortament relacionada amb els dèficits frontals. Els resultats d'aquest estudi mostren la importància d'avaluar les funcions neuropsicobiològiques i del llenguatge en els pacients afectats per MP, amb la finalitat de conèixer el patró de deteriorament, per tal d'afavorir-ne el funcionament i la qualitat de vida.
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Tämä diplomityö tehtiin Convergens Oy:lle. Convergens on elektroniikan suunnittelutoimisto, joka on erikoistunut sulautettuihin järjestelmiin sekä tietoliikennetekniikkaan. Diplomityön tavoitteena oli suunnitella tietokonekortti tietoliikennesovelluksia varten asiakkaalle, jolta vaatimusmäärittelyt tulivat. Työ on rajattu koskemaan laitteen prototyypin suunnittelua. Työssä suunnitellaan pääasiassa WLAN-tukiaseman tietokone. Tukiasema onasennettavissa toimistoihin, varastoihin, kauppoihin sekä myös liikkuvaan ajoneuvoon. Suunnittelussa on otettu nämä asiat huomioon, ja laitteen akun pystyy lataamaan muun muassa auton akulla. Langattomat tekniikat ovat voimakkaasti yleistymässä, ja tämän työn tukiasema tarjoaakin varteenotettavan vaihtoehdon lukuisilla ominaisuuksillaan. Mukana on mm. GPS, Bluetooth sekä Ethernet-valmius. Langattomien tekniikoiden lisäksi myös sulautetut järjestelmät ovat voimakkaasti yleistymässä, ja nykyään mikroprosessoreita löytääkin lähesmistä vain. Tässä projektissa käytetty prosessori on nopeutensa puolesta kilpailukykyinen, ja siitä löytyy useita eri rajapintoja. Jatkossa tietokonekortille on myös tulossa WiMAX-tuki, joka lisää tukiaseman tulevaisuuden arvoa asiakkaalle. Projektiin valittu Freescalen MPC8321E-prosessori on PowerPC-arkkitehtuuriin perustuva ja juuri markkinoille ilmestynyt. Tämä toi mukanaan lisähaasteen, sillä kyseisestä prosessorista ei ollut vielä kaikkea tietoa saatavilla. Mekaniikka toi omat haasteensa mukanaan, sillä se rajoitti piirilevyn koonniin, että ylimääräistä piirilevytilaa ei juurikaan jäänyt. Tämän takia esimerkiksi DDR-muistit olivat haastavia reitittää, sillä muistivetojen on oltava melko samanpituisia keskenään. Käyttöjärjestelmänä projektissa käytetään Linuxia. Suunnittelu alkoi keväällä 2007 ja toimiva prototyyppi oli valmis alkusyksystä. Prototyypin testaus osoitti, että tietokonekortti kykenee täyttämään kaikki asiakkaan vaatimukset. Prototyypin testauksessa löytyneet viat ja optimoinnit on tarkoitus korjata tuotantomalliin, joten se antaa hyvän pohjan jatkosuunnittelua varten.
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En els darrers anys, la criptografia amb corbes el.líptiques ha adquirit una importància creixent, fins a arribar a formar part en la actualitat de diferents estàndards industrials. Tot i que s'han dissenyat variants amb corbes el.líptiques de criptosistemes clàssics, com el RSA, el seu màxim interès rau en la seva aplicació en criptosistemes basats en el Problema del Logaritme Discret, com els de tipus ElGamal. En aquest cas, els criptosistemes el.líptics garanteixen la mateixa seguretat que els construïts sobre el grup multiplicatiu d'un cos finit primer, però amb longituds de clau molt menor. Mostrarem, doncs, les bones propietats d'aquests criptosistemes, així com els requeriments bàsics per a que una corba sigui criptogràficament útil, estretament relacionat amb la seva cardinalitat. Revisarem alguns mètodes que permetin descartar corbes no criptogràficament útils, així com altres que permetin obtenir corbes bones a partir d'una de donada. Finalment, descriurem algunes aplicacions, com són el seu ús en Targes Intel.ligents i sistemes RFID, per concloure amb alguns avenços recents en aquest camp.