477 resultados para CROWBAR SWITCHES


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This paper presents a novel single-phase high-power-factor (HPF) pulsewidth-modulated (PWM) boost rectifier featuring soft commutation of the active switches at zero current (ZC), It incorporates the most desirable properties of conventional PWM and soft-switching resonant techniques.The input current shaping is achieved with average current mode control and continuous inductor current mode.This new PWM converter provides ZC turn on and turn off of the active switches, and it is suitable for high-power applications employing insulated gate bipolar transistors (IGBT's),The principle of operation, the theoretical analysis, a design example, and experimental results from a laboratory prototype rated at 1600 W with 400-Vdc output voltage are presented. The measured efficiency and the power factor were 96.2% and 0.99%, respectively, with an input current total harmonic distortion (THD) equal to 3.94%, for an input voltage with THD equal to 3.8%, at rated load.

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This paper presents an analysis of a novel pulse-width-modulated (PWM) voltage step-down/up Zeta converter, featuring zero-current-switching (ZCS) at the active switches. The applications in de to de and ac to de (rectifier) operation modes are used as examples to illustrate the performance of this new ZCS-PWM Zeta converter. Regarding to the new ZCS-PWM Zeta rectifier proposed, it should be noticed that the average-current mode control is used in order to obtain a structure with high power-factor (HPF) and low total harmonic distortion (THD) at the input current.Two active switches (main and auxiliary transistors), two diodes, two small resonant inductors and one small resonant capacitor compose the novel ZCS-PWM soft-commutation cell, used in these new ZCS-PWM Zeta converters. In this cell, the turn-on of the active switches occurs in zero-current (ZC) and their turn-off in zero-current and zero-voltage (ZCZV). For the diodes, their turn-on process occurs in zero-voltage (ZV) and their reverse-recovery effects over the active switches are negligible. These characteristics make this cell suitable for Insulated-Gate Bipolar Transistors (IGBTs) applications.The main advantages of these new Zeta converters, generated from the new soft-commutation cell proposed, are possibility of obtaining isolation (through their accumulation inductors), and high efficiency, at wide load range. In addition, for the rectifier application, a high power factor and low THD in the input current ran be obtained, in agreement with LEC 1000-3-2 standards.The principle of operation, the theoretical analysis and a design example for the new de to de Zeta converter operating in voltage step-down mode are presented. Experimental results are obtained from a test unit with 500W output power, 110V(dc) output voltage, 220V(dc) input voltage, operating at 50kHz switching frequency. The efficiency measured at rated toad is equal to 97.3%for this new Zeta converter.Finally, the new Zeta rectifier is analyzed, and experimental results from a test unit rated at 500W output power, 110V(dc) output voltage, 220V(rms) input voltage, and operating at 50kHz switching frequency, are presented. The measured efficiency is equal to 96.95%, the power-factor is equal to 0.98, and the input current THD is equal to 19.07%, for this new rectifier operating at rated load.

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This paper introduces novel zero-current-switching (ZCS) pulsewidth-modulated (PWM) preregulators based on a new soft-commutation cell, suitable for insulated gate bipolar transistor applications. The active switches in these proposed rectifiers turn on in zero current and turn off in zero current-zero voltage. In addition, the diodes turn on in zero voltage and their reverse-recovery effects over the active switches are negligible. Moreover, based on the proposed cell, an entire family of de-to-de ZCS-PWM converters can be generated, providing conditions to obtain naturally isolated converters, for example, derived buck-boost, Sepic. and Zeta converters. The novel ac-to-dc ZCS-PWM boost and Zeta preregulators are presented in order to verify the operation of this soft-commutation cell, In order to minimize the harmonic contents of the input current, increasing the ac power factor, the average-current-mode control is used, obtaining preregulators with ac power factor near unity and high efficiency at wide load range. The principle of operation, theoretical analysis, design example, and experimental results from test units for the novel preregulators are presented. The new boost preregulator was designed to nominal values of 1.6 kW output power, 220 V(rms) input voltage, 400 V(dc) output voltage, and operating at 20 kHz. The measured efficiency and power factor of the new ZCS-PWM boost preregulator were 96.7% and 0,99, respectively, with an input current total harmonic distortion (THD) equal to 3.42% for an input voltage with THD equal to 1.61%, at rated load, the new ZCS-PWM Zeta preregulator was designed to voltage step-down operation, and the experimental results were obtained from a laboratory prototype rated at 500 W, 220 V(rm), input voltage, 110 V(dc) output voltage, and operating at 50 kHz. The measured efficiency of the new ZCS-PWM Zeta preregulator is approximately 96.9% and the input power factor is 0.98, with an input current THD equal to 19.07% while the input voltage THD is equal to 1.96%, at rated load.

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This paper presents a 2kW single-phase high power factor boost rectifier with four cells in interleave connection, operating in critical conduction mode, and employing a soft-switching technique, controlled by Field Programmable Gate Array (FPGA). The soft-switching technique Is based on zero-current-switching (ZCS) cells, providing ZC (zero-current) turn-on and ZCZV (zero-current-zero-voltage) turn-off for the active switches, and ZV (zero-voltage) turn-on and ZC (zero-current) turn-off for the boost diodes. The disadvantages related 'to reverse recovery effects of boost diodes operated in continuous conduction mode (additional losses, and electromagnetic interference (EMI) problems) are minimized, due to the operation in critical conduction mode. In addition, due to the Interleaving technique, the rectifer's features include the reduction in the input current ripple, the reduction in the output voltage ripple, the use of low stress devices, low volume for the EMI input filter, high input power factor (PF), and low total harmonic distortion (THD) In the input current, in compliance with the TEC61000-3-2 standards. The digital controller has been developed using a hardware description language (VHDL) and implemented using a XC2S200E-SpartanII-E/Xilinx FPGA device, performing a true critical conduction operation mode for four interleaved cells, and a closed-loop to provide the output voltage regulation, like as a pre-regulator rectifier. Experimental results are presented for a 2kW implemented prototype with four interleaved cells, 400V nominal output voltage and 220V(rms) nominal input voltage, in order to verify the feasibility and performance of the proposed digital control through the use of a FPGA device.

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Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

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This work presents contributions in the detection and identication of faults in multilevel inverters through the study of the converters behavior under these operation conditions. Basically, the approached fault consists of an open-circuit in any switch of a three-level clamped diode inverter. The converter operation is characterized in the pre and post-fault states. A wave form behavior analysis of the pole voltage, phase current and dc-bus current is also done, which highlights characteristics that allow the detection of failure and, even, under favorable conditions, the identication of the faulty device. A compensation strategy of the approached fault (open-switch) is also investigated with the purpose of maintaining the driving system operational when a failure occurs. The proposed topology uses SCRs in parallel with the internal switches of the inverter, which allows, in some occasions, the full utilization of the dc-bus

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We examine two-component Gross-Pitaevskii equations with nonlinear and linear couplings, assuming self-attraction in one species and self-repulsion in the other, while the nonlinear inter-species coupling is also repulsive. For initial states with the condensate placed in the self-attractive component, a sufficiently strong linear coupling switches the collapse into decay (in the free space). Setting the linear-coupling coefficient to be time-periodic (alternating between positive and negative values, with zero mean value) can make localized states quasi-stable for the parameter ranges considered herein, but they slowly decay. The 2D states can then be completely stabilized by a weak trapping potential. In the case of the high-frequency modulation of the coupling constant, averaged equations are derived, which demonstrate good agreement with numerical solutions of the full equations. (C) 2007 Elsevier B.V. All rights reserved.

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Este trabalho apresenta métodos de geração de colunas para dois importantes problemas de atribuição: o Problema Generalizado de Atribuição (PGA) e o Problema de Atribuição de Antenas a Comutadores (PAAC). O PGA é um dos mais representativos problemas de Otimização Combinatória e consiste em otimizar a atribuição de n tarefas a m agentes, de forma que cada tarefa seja atribuída a exatamente um agente e a capacidade de cada agente seja respeitada. O PAAC consiste em atribuir n antenas a m comutadores em uma rede de telefonia celular, de forma a minimizar os custos de cabeamento entre antenas e comutadores e os custos de transferência de chamadas entre comutadores. A abordagem tradicional de geração de colunas é comparada com as propostas neste trabalho, que utilizam a relaxação lagrangeana/surrogate. São apresentados testes computacionais que demonstram a efetividade dos algoritmos propostos.

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No problema de minimização de troca de ferramentas procura-se por uma sequência para processar um conjunto de tarefas de modo que o número requerido de trocas de ferramentas seja o menor possível. Neste trabalho propõe-se um algoritmo para resolver este problema baseado em um ordenamento parcial das tarefas. Uma sequência ótima é obtida expandindo-se as sequências parciais enumeradas. Testes computacionais são apresentados.

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O problema de minimização de troca de ferramentas (MTSP) busca uma sequência de processamento de um conjunto de tarefas, de modo a minimizar o número de trocas de ferramentas requeridas. Este trabalho apresenta uma nova heurística para o MTSP, capaz de produzir bons limitantes superiores para um algoritmo enumerativo. Esta heurística possui duas fases: uma fase construtiva que é baseada em um grafo em que os vértices correspondem a ferramentas e existe um arco k = (i, j) que liga os vértices i e j se e somente se as ferramentas i e j são necessárias para a execução de alguma tarefa k; e uma fase de refinamento baseada na meta-heurística Busca Local Iterativa. Resultados computacionais mostram que a heurística proposta tem um bom desempenho para os problemas testados, contribuindo para uma redução significativa no número de nós gerados de um algoritmo enumerativo.

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This paper presents a multi-cell single-phase high power factor boost rectifier in interleave connection, operating in critical conduction mode, employing a soft-switching technique, and controlled by Field Programmable Gate Array (FPGA). The soft-switching technique is based on zero-current-switching (ZCS) cells, providing ZC (zero-current) turn-on and ZCZV (zero-current-zero-voltage) turn-off for the active switches, and ZV (zero-vohage) turn-on and ZC (zero-current) turn-off for the boost diodes. The disadvantages related to reverse recovery effects of boost diodes operated in continuous conduction mode (additional losses, and electromagnetic interference (EMI) problems) are minimized, due to the operation in critical conduction mode. In addition, due to the interleaving technique, the rectifier's features include the reduction in the input current ripple, the reduction in the output voltage ripple, the use of low stress devices, low volume for the EMI input filter, high input power factor (PF), and low total harmonic distortion (THD) in the input current, in compliance with the IEC61000-3-2 standards. The digital controller has been developed using a hardware description language (VHDL) and implemented using a XC2S200E-SpartanII-E/Xilinx FPGA device, performing a true critical conduction operation mode for all interleaved cells, and a closed-loop to provide the output voltage regulation, like as a preregulator rectifier. Experimental results are presented for a implemented prototype with two and with four interleaved cells, 400V nominal output voltage and 220V(rms) nominal input voltage, in order to verify the feasibility and performance of the proposed digital control through the use of a FPGA device.

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Reproductive castes are compared in species of swarming wasps representing all currently recognized genera of Epiponini (Polistinae). New morphometric data for nine measures of body parts and ovarian data are presented for 13 species. These are integrated with all similarly conducted available studies, giving a total of 30 species. Analysis reveals several syndromes relating reproductive and nonreproductive individuals: no meaningful distinction, physiological differences only, reproductives larger than nonreproductives with intermediate individuals present, reproductives different in shape from nonreproductives with no intermediates, and reproductives smaller in some aspects than nonreproductives. Distribution of these syndromes among species is consistent with phylogenetic relationships derived from other data. Optimizing these syndromes on the cladogram indicates that the basal condition of Epiponini is a casteless society that is not comparable to the primitively social genus Polistes where dominant queens control reproduction. Castes originate several times in Epiponini, with different results in different lineages. The best documented evolutionary sequence passes from casteless societies, to those with reproductives larger, to those with reproductives differing in shape from nonreproductives, to those with reproductives smaller in some measures. This sequence is consistent with Wheeler's theory of the origin of caste through developmental switches, and represents the most thorough test of that theory to date.

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Conselho Nacional de Desenvolvimento Científico e Tecnológico (CNPq)

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This work presents the design and procedure of a DC-to-AC converter using a ZVS Commutation Cell developed by Barbi and Martins (1991) and applied to the family of DC-to-DC PWM converters. Firstly, we show the cell applied to buck converter. The stages of operation and the main current and voltage equations of the resonant devices are presented. Next, we adapt the converter to the regenerative operation mode. Hence, the full bridge converter at low frequency operation is conected on the DC-to-DC stage (at high frequency) output ends (Seixas, 1993). Commutation of zero voltage for all switches, PWM at constant frequency and neither overvoltage nor additional current stress are observed by digital simulation. The design example and experimental results obtained by prototype rated at 275 V, 1 kW and 40 kHz are also presented.

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This paper presents the analysis of a dc-ac converter using a zero-voltage-switching (ZVS) commutation cell. First, we show the cell applied to the buck converter. The stages of operation are presented along with the main current and voltage equations. Next, we adapt the converter to the regenerative-operation mode. Hence, the full-bridge converter at low-frequency operation is connected in the dc-dc output stage (at high frequency). The main switches commute at zero voltage. The converter operated at constant frequency with pulse-width modulation (PWM), and neither overvoltage nor additional current stress was observed by digital simulation. A design example and experimental results obtained by prototype, rated at 275 V and 1 kW, are also presented. © 1997 IEEE.