Onset of germinability, desiccation tolerance and hardseededness in developing seeds of Peltophorum pterocarpum (DC) K. Heyne (Caesalpinioideae)

In the hot and dry conditions in which seeds of the tree legume Peltophorum pterocarpum develop and mature in Vietnam, seed moisture content declined rapidly on the mother plant from 87% at 42 d after flowering (DAF) to 15% at 70 DAF. Dry weight of the pods attained a maximum value at about 42 DAF, but seed mass maturity (i.e. the end of the seed-filling phase) occurred at about 62 DAF, at which time seed moisture content was about 45-48%. The onset of the ability of freshly collected seeds to germinate (in 63-d tests at 28-34degreesC) occurred at 42 DAF, i.e. about 20 d before mass maturity. Full germination (98%) was attained at 70 DAF, i.e. at about 8 d after mass maturity. Thereafter, germination of fresh seeds declined, due to the imposition of a hard seed coat. Tolerance of desiccation to 10% moisture content was first detected at 56 DAF and was complete within the seed population by 84 DAF, i.e. about 22 d after mass maturity. Hardseededness began to be induced when seeds were dried to about 15% moisture content and below, with a negative logarithmic relation between hardseededness and moisture content below this value.

A chimeric N-terminal Escherichia coli C-terminal Rhodobacter sphaeroides FliG rotor protein supports bidirectional E coli flagellar rotation and chemotaxis

Flagellate bacteria such as Escherichia coli and Salmonella enterica serovar Typhimurium typically express 5 to 12 flagellar filaments over their cell surface that rotate in clockwise (CW) and counterclockwise directions. These bacteria modulate their swimming direction towards favorable environments by biasing the direction of flagellar rotation in response to various stimuli. In contrast, Rhodobacter sphaeroides expresses a single subpolar flagellum that rotates only CW and responds tactically by a series of biased stops and starts. Rotor protein FliG transiently links the MotAB stators to the rotor, to power rotation and also has an essential function in flagellar export. In this study, we sought to determine whether the FliG protein confers directionality on flagellar motors by testing the functional properties of R. sphaeroides FliG and a chimeric FliG protein, EcRsFliG (N-terminal and central domains of E. coli FliG fused to an R. sphaeroides FliG C terminus), in an E. coli FliG null background. The EcRsFliG chimera supported flagellar synthesis and bidirectional rotation; bacteria swam and tumbled in a manner qualitatively similar to that of the wild type and showed chemotaxis to amino acids. Thus, the FliG C terminus alone does not confer the unidirectional stop-start character of the R. sphaeroides flagellar motor, and its conformation continues to support tactic, switch-protein interactions in a bidirectional motor, despite its evolutionary history in a bacterium with a unidirectional motor.

Global exponential periodicity of a class of bidirectional associative memory networks with finite distributed delays

In this paper, we study the periodic oscillatory behavior of a class of bidirectional associative memory (BAM) networks with finite distributed delays. A set of criteria are proposed for determining global exponential periodicity of the proposed BAM networks, which assume neither differentiability nor monotonicity of the activation function of each neuron. In addition, our criteria are easily checkable. (c) 2005 Elsevier Inc. All rights reserved.

A comparison between bond graphs switching modelling techniques implemented on a boost dc-dc converter

A Bond Graph is a graphical modelling technique that allows the representation of energy flow between the components of a system. When used to model power electronic systems, it is necessary to incorporate bond graph elements to represent a switch. In this paper, three different methods of modelling switching devices are compared and contrasted: the Modulated Transformer with a binary modulation ratio (MTF), the ideal switch element, and the Switched Power Junction (SPJ) method. These three methods are used to model a dc-dc Boost converter and then run simulations in MATLAB/SIMULINK. To provide a reference to compare results, the converter is also simulated using PSPICE. Both quantitative and qualitative comparisons are made to determine the suitability of each of the three Bond Graph switch models in specific power electronics applications

DC-SIGN increases the affinity of HIV-1 envelope glycoprotein interaction with CD4

Mannose-binding C-type lectin receptors, expressed on Langerhans cells and subepithelial dendritic cells (DCs) of cervico-vaginal tissues, play an important role in HIV-1 capture and subsequent dissemination to lymph nodes. DC-SIGN has been implicated in both productive infection of DCs and the DC-mediated trans infection of CD4(+) T cells that occurs in the absence of replication. However, the molecular events that underlie this efficient transmission have not been fully defined. In this study, we have examined the effect of the extracellular domains of DC-SIGN and Langerin on the stability of the interaction of the HIV-1 envelope glycoprotein with CD4 and also on replication in permissive cells. Surface plasmon resonance analysis showed that DC-SIGN increases the binding affinity of trimeric gp140 envelope glycoproteins to CD4. In contrast, Langerin had no effect on the stability of the gp140:CD4 complex. In vitro infection experiments to compare DC-SIGN enhancement of CD4-dependent and CD4-independent strains demonstrated significantly lower enhancement of the CD4-independent strain. In addition DC-SIGN increased the relative rate of infection of the CD4-dependent strain but had no effect on the CD4-independent strain. DC-SIGN binding to the HIV envelope protein effectively increases exposure of the CD4 binding site, which in turn contributes to enhancement of infection.

Analytical calculation of resonant inductance for zero voltage switching in phase-shifted full-bridge converters

The phase shift full bridge (PSFB) converter allows high efficiency power conversion at high frequencies through zero voltage switching (ZVS); the parasitic drain-to-source capacitance of the MOSFET is discharged by a resonant inductance before the switch is gated resulting in near zero turn-on switching losses. Typically, an extra inductance is added to the leakage inductance of a transformer to form the resonant inductance necessary to charge and discharge the parasitic capacitances of the PSFB converter. However, many PSFB models do not consider the effects of the magnetizing inductance or dead-time in selecting the resonant inductance required to achieve ZVS. The choice of resonant inductance is crucial to the ZVS operation of the PSFB converter. Incorrectly sized resonant inductance will not achieve ZVS or will limit the load regulation ability of the converter. This paper presents a unique and accurate equation for calculating the resonant inductance required to achieve ZVS over a wide load range incorporating the effects of the magnetizing inductance and dead-time. The derived equations are validated against PSPICE simulations of a PSFB converter and extensive hardware experimentations.

Choosing the most suitable analogue redesign method for forward-type digital power converters

This work proposes a method to objectively determine the most suitable analogue redesign method for forward type converters under digital voltage mode control. Particular emphasis is placed on determining the method which allows the highest phase margin at the particular switching and crossover frequencies chosen by the designer. It is shown that at high crossover frequencies with respect to switching frequency, controllers designed using backward integration have the largest phase margin; whereas at low crossover frequencies with respect to switching frequency, controllers designed using bilinear integration have the largest phase margins. An accurate model of the power stage is used for simulation, and experimental results from a Buck converter are collected. The performance of the digital controllers is compared to that of the equivalent analogue controller both in simulation and experiment. Excellent correlation between the simulation and experimental results is presented. This work will allow designers to confidently choose the analogue redesign method which yields the greater phase margin for their application.

The statistical downscaling model-decision centric (SDSM-DC): conceptual basis and applications

Regional climate downscaling has arrived at an important juncture. Some in the research community favour continued refinement and evaluation of downscaling techniques within a broader framework of uncertainty characterisation and reduction. Others are calling for smarter use of downscaling tools, accepting that conventional, scenario-led strategies for adaptation planning have limited utility in practice. This paper sets out the rationale and new functionality of the Decision Centric (DC) version of the Statistical DownScaling Model (SDSM-DC). This tool enables synthesis of plausible daily weather series, exotic variables (such as tidal surge), and climate change scenarios guided, not determined, by climate model output. Two worked examples are presented. The first shows how SDSM-DC can be used to reconstruct and in-fill missing records based on calibrated predictor-predictand relationships. Daily temperature and precipitation series from sites in Africa, Asia and North America are deliberately degraded to show that SDSM-DC can reconstitute lost data. The second demonstrates the application of the new scenario generator for stress testing a specific adaptation decision. SDSM-DC is used to generate daily precipitation scenarios to simulate winter flooding in the Boyne catchment, Ireland. This sensitivity analysis reveals the conditions under which existing precautionary allowances for climate change might be insufficient. We conclude by discussing the wider implications of the proposed approach and research opportunities presented by the new tool.

Systematic selection of analogue redesign method for forward-type digital power converters

This article proposes a systematic approach to determine the most suitable analogue redesign method to be used for forward-type converters under digital voltage mode control. The focus of the method is to achieve the highest phase margin at the particular switching and crossover frequencies chosen by the designer. It is shown that at high crossover frequencies with respect to switching frequency, controllers designed using backward integration have the largest phase margin; whereas at low crossover frequencies with respect to switching frequency, controllers designed using bilinear integration with pre-warping have the largest phase margins. An algorithm has been developed to determine the frequency of the crossing point where the recommended discretisation method changes. An accurate model of the power stage is used for simulation and experimental results from a Buck converter are collected. The performance of the digital controllers is compared to that of the equivalent analogue controller both in simulation and experiment. Excellent closeness between the simulation and experimental results is presented. This work provides a concrete example to allow academics and engineers to systematically choose a discretisation method.

Conversor CC/CA de alta freqüência baseado em inversores ressonantes com comutação seqüencial para excitação de uma tocha indutiva a plasma térmico

This work describes the study, the analysis, the project methodology and the constructive details of a high frequency DC/AC resonant series converter using sequential commutation techniques for the excitation of an inductive coupled thermal plasma torch. The aim of this thesis is to show the new modulation technique potentialities and to present a technological option for the high-frequency electronic power converters development. The resonant converter operates at 50 kW output power under a 400 kHz frequency and it is constituted by inverter cells using ultra-fast IGBT devices. In order to minimize the turn-off losses, the inverter cells operates in a ZVS mode referred by a modified PLL loop that maintains this condition stable, despite the load variations. The sequential pulse gating command strategy used it allows to operate the IGBT devices on its maximum power limits using the derating and destressing current scheme, as well as it propitiates a frequency multiplication of the inverters set. The output converter is connected to a series resonant circuit constituted by the applicator ICTP torch, a compensation capacitor and an impedance matching RF transformer. At the final, are presented the experimental results and the many tests achieved in laboratory as form to validate the proposed new technique

Uma fonte chaveada de 50kW com correção de fator de potência para alimentação de uma tocha de plasma Indutiva utilizando técnicas de controle digital

This work deals with the development of an experimental study on a power supply of high frequency that provides the toch plasmica to be implemented in PLASPETRO project, which consists of two static converters developed by using Insulated Gate Bipolar Transistor (IGBT). The drivers used to control these keys are triggered by Digital Signal Processor (DSP) through optical fibers to reduce problems with electromagnetic interference (EMI). The first stage consists of a pre-regulator in the form of an AC to DC converter with three-phase boost power factor correction which is the main theme of this work, while the second is the source of high frequency itself. A series-resonant inverter consists of four (4) cell inverters operating in a frequency around 115 kHz each one in soft switching mode, alternating itself to supply the load (plasma torch) an alternating current with a frequency of 450 kHz. The first stage has the function of providing the series-resonant inverter a DC voltage, with the value controlled from the power supply provided by the electrical system of the utility, and correct the power factor of the system as a whole. This level of DC bus voltage at the output of the first stage will be used to control the power transferred by the inverter to the load, and it may vary from 550 VDC to a maximum of 800 VDC. To control the voltage level of DC bus driver used a proportional integral (PI) controller and to achieve the unity power factor it was used two other proportional integral currents controllers. Computational simulations were performed to assist in sizing and forecasting performance. All the control and communications needed to stage supervisory were implemented on a DSP

Desempenho de um painel fotovoltaico de baixa tensão, acoplado ao protótipo de um conversor dc/dc topologia Booster

Low voltage solar panels increase the reliability of solar panels due to reduction of in series associations the configurations of photovoltaic cells. The low voltage generation requires DCDC converters devices with high efficiency, enabling raise and regulate the output voltage. This study analyzes the performance of a photovoltaic panel of Solarex, MSX model 77, configured to generate an open circuit voltage of 10.5 V, with load voltage of 8.5 V, with short circuit current of 9 A and a power of 77 W. The solar panel was assembled in the isolated photovoltaic system configuration, with and without energy storage as an interface with a DCDC converter, Booster topology. The converter was designed and fabricated using SMD (Surface Mounted Devices) technology IC (integrated circuit) that regulates its output voltage at 14.2 V, with an efficiency of 87% and providing the load a maximum power of 20.88 W. The system was installed and instrumented for measurement and acquisition of the following data: luminosities, average global radiation (data of INPE Instituto Nacional de Pesquisas Espaciais), solar panel and environment temperatures, solar panel and DC-DC converter output voltages, panel, inverter, and battery charge output currents. The photovoltaic system was initially tested in the laboratory (simulating its functioning in ideal conditions of operation) and then subjected to testing in real field conditions. The panel inclination angle was set at 5.5°, consistent with the latitude of Natal city. Factors such as climatic conditions (simultaneous variations of temperature, solar luminosities and ra diation on the panel), values of load resistance, lower limit of the maximum power required by the load (20.88 W) were predominant factors that panel does not operate with energy efficiency levels greater than 5 to 6%. The average converter efficiency designed in the field test reached 95%

A novel voltage step-down/up ZCS-PWM Zeta converter

This paper presents an analysis of a novel pulse-width-modulated (PWM) voltage step-down/up Zeta converter, featuring zero-current-switching (ZCS) at the active switches. The applications in de to de and ac to de (rectifier) operation modes are used as examples to illustrate the performance of this new ZCS-PWM Zeta converter. Regarding to the new ZCS-PWM Zeta rectifier proposed, it should be noticed that the average-current mode control is used in order to obtain a structure with high power-factor (HPF) and low total harmonic distortion (THD) at the input current.Two active switches (main and auxiliary transistors), two diodes, two small resonant inductors and one small resonant capacitor compose the novel ZCS-PWM soft-commutation cell, used in these new ZCS-PWM Zeta converters. In this cell, the turn-on of the active switches occurs in zero-current (ZC) and their turn-off in zero-current and zero-voltage (ZCZV). For the diodes, their turn-on process occurs in zero-voltage (ZV) and their reverse-recovery effects over the active switches are negligible. These characteristics make this cell suitable for Insulated-Gate Bipolar Transistors (IGBTs) applications.The main advantages of these new Zeta converters, generated from the new soft-commutation cell proposed, are possibility of obtaining isolation (through their accumulation inductors), and high efficiency, at wide load range. In addition, for the rectifier application, a high power factor and low THD in the input current ran be obtained, in agreement with LEC 1000-3-2 standards.The principle of operation, the theoretical analysis and a design example for the new de to de Zeta converter operating in voltage step-down mode are presented. Experimental results are obtained from a test unit with 500W output power, 110V(dc) output voltage, 220V(dc) input voltage, operating at 50kHz switching frequency. The efficiency measured at rated toad is equal to 97.3%for this new Zeta converter.Finally, the new Zeta rectifier is analyzed, and experimental results from a test unit rated at 500W output power, 110V(dc) output voltage, 220V(rms) input voltage, and operating at 50kHz switching frequency, are presented. The measured efficiency is equal to 96.95%, the power-factor is equal to 0.98, and the input current THD is equal to 19.07%, for this new rectifier operating at rated load.