Scalable Unified Transform Architecture for Advanced Video Coding Embedded Systems

A novel high throughput and scalable unified architecture for the computation of the transform operations in video codecs for advanced standards is presented in this paper. This structure can be used as a hardware accelerator in modern embedded systems to efficiently compute all the two-dimensional 4 x 4 and 2 x 2 transforms of the H.264/AVC standard. Moreover, its highly flexible design and hardware efficiency allows it to be easily scaled in terms of performance and hardware cost to meet the specific requirements of any given video coding application. Experimental results obtained using a Xilinx Virtex-5 FPGA demonstrated the superior performance and hardware efficiency levels provided by the proposed structure, which presents a throughput per unit of area relatively higher than other similar recently published designs targeting the H.264/AVC standard. Such results also showed that, when integrated in a multi-core embedded system, this architecture provides speedup factors of about 120x concerning pure software implementations of the transform algorithms, therefore allowing the computation, in real-time, of all the above mentioned transforms for Ultra High Definition Video (UHDV) sequences (4,320 x 7,680 @ 30 fps).

High Performance Multi-Standard Architecture for DCT Computation in H.264/AVC High Profile and HEVC Codecs

A new high performance architecture for the computation of all the DCT operations adopted in the H.264/AVC and HEVC standards is proposed in this paper. Contrasting to other dedicated transform cores, the presented multi-standard transform architecture is supported on a completely configurable, scalable and unified structure, that is able to compute not only the forward and the inverse 8×8 and 4×4 integer DCTs and the 4×4 and 2×2 Hadamard transforms defined in the H.264/AVC standard, but also the 4×4, 8×8, 16×16 and 32×32 integer transforms adopted in HEVC. Experimental results obtained using a Xilinx Virtex-7 FPGA demonstrated the superior performance and hardware efficiency levels provided by the proposed structure, which outperforms its more prominent related designs by at least 1.8 times. When integrated in a multi-core embedded system, this architecture allows the computation, in real-time, of all the transforms mentioned above for resolutions as high as the 8k Ultra High Definition Television (UHDTV) (7680×4320 @ 30fps).

Constructing Cultural Policies in Romania. A possible model for communicating the national value system

The premise of this paper is that a model for communicating the national value system must start from a strategy aimed at the identification, the cultivation and communication of values that give consistency to the value system. The analysis concentrates on the elements of such strategies and on the implications of applying a value communication program on the identity architecture of the community. The paper will also discuss the role of the national value system in the context of the emerging global culture, where the individual has the power to create his/her own hybrid cultural model.

A Compact and Scalable RNS Architecture

Conferência: IEEE 24th International Conference on Application-Specific Systems, Architectures and Processors (ASAP)- Jun 05-07, 2013

Análise estática não linear de um edifício em betão armado

Trabalho Final de Mestrado para obtenção do grau de Mestre em Engenharia Civil

Bridge architecture to interconnect hybrid wired/wireless PROFIBUS networks

The integration of wired and wireless technologies in modern manufacturing plants is now of paramount importance for the competitiveness of any industry. Being PROFIBUS the most widely used technology in use for industrial communications, several solutions have been proposed to provide PROFIBUS networks with wireless communications. One of them, the bridge-based hybrid wired/wireless PROFIBUS network approach, proposes an architecture in which the Intermediate Systems operate at Data Link Layer level, as bridges. In this paper, we propose an architecture for the implementation of such a bridge and the required protocols to handle communication between stations in different domains and the mobility of wireless stations.

An efficient scalable RNS architecture for large dynamic ranges

This paper proposes an efficient scalable Residue Number System (RNS) architecture supporting moduli sets with an arbitrary number of channels, allowing to achieve larger dynamic range and a higher level of parallelism. The proposed architecture allows the forward and reverse RNS conversion, by reusing the arithmetic channel units. The arithmetic operations supported at the channel level include addition, subtraction, and multiplication with accumulation capability. For the reverse conversion two algorithms are considered, one based on the Chinese Remainder Theorem and the other one on Mixed-Radix-Conversion, leading to implementations optimized for delay and required circuit area. With the proposed architecture a complete and compact RNS platform is achieved. Experimental results suggest gains of 17 % in the delay in the arithmetic operations, with an area reduction of 23 % regarding the RNS state of the art. When compared with a binary system the proposed architecture allows to perform the same computation 20 times faster alongside with only 10 % of the circuit area resources.

Unified transform architecture for AVC, AVS, VC-1 and HEVC high-performance codecs

A unified architecture for fast and efficient computation of the set of two-dimensional (2-D) transforms adopted by the most recent state-of-the-art digital video standards is presented in this paper. Contrasting to other designs with similar functionality, the presented architecture is supported on a scalable, modular and completely configurable processing structure. This flexible structure not only allows to easily reconfigure the architecture to support different transform kernels, but it also permits its resizing to efficiently support transforms of different orders (e. g. order-4, order-8, order-16 and order-32). Consequently, not only is it highly suitable to realize high-performance multi-standard transform cores, but it also offers highly efficient implementations of specialized processing structures addressing only a reduced subset of transforms that are used by a specific video standard. The experimental results that were obtained by prototyping several configurations of this processing structure in a Xilinx Virtex-7 FPGA show the superior performance and hardware efficiency levels provided by the proposed unified architecture for the implementation of transform cores for the Advanced Video Coding (AVC), Audio Video coding Standard (AVS), VC-1 and High Efficiency Video Coding (HEVC) standards. In addition, such results also demonstrate the ability of this processing structure to realize multi-standard transform cores supporting all the standards mentioned above and that are capable of processing the 8k Ultra High Definition Television (UHDTV) video format (7,680 x 4,320 at 30 fps) in real time.

DSAAR: distributed software architecture for autonomous robots

Dissertação apresentada na Faculdade de Ciências e Tecnologia da Universidade Nova de Lisboa para obtenção do grau de Mestre em Engenharia Electrotécnica

Remote and mobile experimentation: pushing the boundaries of an ubiquitous learning place

Concepts like E-learning and M-learning are changing the traditional learning place. No longer restricted to well-defined physical places, education on Automation and other Engineering areas is entering the so-called ubiquitous learning place, where even the more practical knowledge (acquired at lab classes) is now moving into, due to emergent concepts such as Remote Experimentation or Mobile Experimentation. While Remote Experimentation is traditionally regarded as the remote access to real-world experiments through a simple web browser running on a PC connected to the Internet, Mobile Experimentation may be seen as the access to those same (or others) experiments, through mobile devices, used in M-learning contexts. These two distinct client types (PCs versus mobile devices) pose specific requirements for the remote lab infrastructure, namely the ability to tune the experiment interface according to the characteristics (e.g. display size) of the accessing device. This paper addresses those requirements, namely by proposing a new architecture for the remote lab infrastructure able to accommodate both Remote and Mobile Experimentation scenarios.

Thermodynamic and kinetic modelling of the redox properties of tetrahaem cytochromes C3

Dissertação apresentada para obtenção do grau de Doutor em Bioquímica,especialidade Bioquímica-Física, pela Universidade Nova de Lisboa, Faculdade de Cincias e Tecnologia

Portuguese plain architecture: history opening a closed sequence

The paper will address George Kubler’s Portuguese Plain Architecture [PPA] (1972) and its effect in Portuguese architectural practice. Kubler’s philosophy of art history implied that closed sequences of objects could be opened by several reasons. Thus, it will be argued that there is an effect upon Portuguese architecture post 1974, that is apparent by the reemergence of some of the form classes treated by Kubler. This was mostly achieved through the popularity of Kubler’s book within architectural practice, scholarship and moreover by the establishment of the term “Plain Architecture” in portuguese architectural vocabulary. Plain Architecture of the seventeenth and eighteenth centuries shared some qualities with the architecture to be built in post‑revolutionary Portugal, most importantly the effect that could be achieved with low budget buildings that were responding to a situation of crisis, and simultaneously exhaled aristocratic sparsity. The connection of PPA with the ideological attributes of early modernism and the political context of the time catalysed the reemergence of a new order of Portuguese Plain that resonates still in contemporary architecture.

Multifunctional converter to interface renewable energy sources and electric vehicles with the power grid in smart grids context

This paper proposes a multifunctional converter to interface renewable energy sources (e.g., solar photovoltaic panels) and electric vehicles (EVs) with the power grid in smart grids context. This multifunctional converter allows deliver energy from the solar photovoltaic panels to an EV or to the power grid, and exchange energy in bidirectional mode between the EV and the power grid. Using this multifunctional converter are not required multiple conversion stages, as occurs with the traditional solutions, where are necessary two power converters to integrate the solar photovoltaic system in the power grid and also two power converters to integrate an off-board EV battery charger in the power grid (dc-dc and dc-ac power converters in both cases). Taking into account that the energy provided (or delivered) from the power grid in each moment is function of the EV operation mode and also of the energy produced from the solar photovoltaic system, it is possible to define operation strategies and control algorithms in order to increase the energy efficiency of the global system and to improve the power quality of the electrical system. The proposed multifunctional converter allows the operation in four distinct cases: (a) Transfer of energy from the solar photovoltaic system to the power grid; (b) Transfer of energy from the solar photovoltaic system and from the EV to the power grid; (c) Transfer of energy from the solar photovoltaic system to the EV or to the power grid; (d) Transfer of energy between the EV and the power grid. Along the paper are described the system architecture and the control algorithms, and are also presented some computational simulation results for the four aforementioned cases. It is also presented a comparative analysis between the traditional and the proposed solution in terms of operation efficiency and estimated cost of implementation.

Local seismic cultures: the use of timber frame structures in the south of Portugal

Given the fact that using timber frame structures has proven to improve the seismic behavior of vernacular architecture, as has been reported in past earthquakes in many countries, its preservation as a traditional earthquake resistant practice is important. This paper firstly intends to evaluate whether the use of timber frames as a traditional seismic resistant technique for vernacular architecture in the South of Portugal, traditionally a seismic region, is still active. Secondly, the city of Vila Real de Santo António was selected as a case study because it also followed a Pombaline development contemporary to the reconstruction of Lisbon. The plan included the provision of timber frame partition walls for some of the buildings and, thus, an overview of the type of constructions originally conceived is provided. Finally, the alterations done in the original constructions and the current state of the city center are described and the effect of these changes on the seismic vulnerability of the city is discussed.

A demonstration case on the derivation of process-level logical architectures for ambient assisted living ecosystems

When representing the requirements for an intended software solution during the development process, a logical architecture is a model that provides an organized vision of how functionalities behave regardless of the technologies to be implemented. If the logical architecture represents an ambient assisted living (AAL) ecosystem, such representation is a complex task due to the existence of interrelated multidomains, which, most of the time, results in incomplete and incoherent user requirements. In this chap- ter, we present the results obtained when applying process-level modeling techniques to the derivation of the logical architecture for a real industrial AAL project. We adopt a V-Model–based approach that expresses the AAL requirements in a process-level perspec- tive, instead of the traditional product-level view. Additionally, we ensure compliance of the derived logical architecture with the National Institute of Standards and Technology (NIST) reference architecture as nonfunctional requirements to support the implementa- tion of the AAL architecture in cloud contexts.