992 resultados para Hardware reconfigurable


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O processo de retificação é considerado um dos últimos na cadeia de produção de peças de precisão. Assim, é essencial ter um sistema de monitoramento confiável para este processo. Neste trabalho é proposto um sistema de medição de vibração, rápido e versátil, baseado na plataforma de prototipagem eletrônica de hardware livre Arduino, com objetivo de monitorar em tempo real o processo de retificação plana, especialmente no que diz respeito à condição da peça retificada. Para este trabalho ensaios experimentais foram realizados numa máquina retificadora plana, empregando um rebolo de óxido de alumínio e uma peça de aço ABNT 1020. Por meio de um sensor piezelétrico de PZT (Pb-Lead Zirconate Titanate) de baixo custo, instalado junto à peça e conectado a uma das portas analógicas do hardware, foi possível medir o sinal de vibração durante o processo de retificação. Verificou-se que, a medida com que o rebolo perdia sua capacidade de corte, em função das consecutivas passadas sobre a peça, ocorria também uma significativa diminuição dos valores médios do sinal de vibração. Tal diminuição do sinal de vibração pode indicar o momento que o rebolo deve ser dressado, permitindo monitorar a qualidade superficial da peça durante o processo de retificação, evitando danos como é o caso da queima superficial. O princípio de operação e as principais características dessa técnica foram investigados, bem como algumas de suas limitações práticas.

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This work focuses basically on the design and analysis of simple and low cost hardware systems efficiency for temperature measurement in agricultural area. The main objective is to prove quantitatively, through statistical data analysis, to what extent a simple hardware designed with inexpensive components can be used safely in the indoor temperature measurement in farm buildings, such as greenhouses, warehouse or silos. To verify the of simple hardware efficiency, its data were compared with data from measurements with a high performance LabVIEW platform. This work proved that a simple hardware based on a microcontroller and the LM35 sensor can perform well. It presented a good accuracy but a relatively low precision that can be improved when performed some consecutive signal sampling and then used its average value. Although there are many papers that explain these components, this work has the distinction of presenting a data analysis in numerical form and using high performance systems to ensure critical data comparison.

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The Rock Hill Hardware Company was organized on June 4, 1893 by A.R. Smith and John Gelzer, A.A. Barron and his sons R.E. and W.L. bought Smith out in 1896 and by 1907 had acquired the whole firm. The Barron family owned and operated it until it closed in 1978. The collection consists of a 1906 ledger, financial records, a photograph, a seed license, World War II ration booklets, and newspaper clippings.

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The emergence of wavelength-division multiplexing (WDM) technology provides the capability for increasing the bandwidth of synchronous optical network (SONET) rings by grooming low-speed traffic streams onto different high-speed wavelength channels. Since the cost of SONET add–drop multiplexers (SADM) at each node dominates the total cost of these networks, how to assign the wavelength, groom the traffic, and bypass the traffic through the intermediate nodes has received a lot of attention from researchers recently. Moreover, the traffic pattern of the optical network changes from time to time. How to develop dynamic reconfiguration algorithms for traffic grooming is an important issue. In this paper, two cases (best fit and full fit) for handling reconfigurable SONET over WDM networks are proposed. For each approach, an integer linear programming model and heuristic algorithms (TS-1 and TS-2, based on the tabu search method) are given. The results demonstrate that the TS-1 algorithm can yield better solutions but has a greater running time than the greedy algorithm for the best fit case. For the full fit case, the tabu search heuristic yields competitive results compared with an earlier simulated annealing based method and it is more stable for the dynamic case.

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We propose an efficient scheduling scheme that optimizes advance-reserved lightpath services in reconfigurable WDM networks. A re-optimization approach is devised to reallocate network resources for dynamic service demands while keeping determined schedule unchanged.

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The emergence of Wavelength Division Multiplexing (WDM) technology provides the capability for increasing the bandwidth of Synchronous Optical Network (SONET) rings by grooming low-speed traffic streams onto different high-speed wavelength channels. Since the cost of SONET add-drop multiplexers (SADM) at each node dominates the total cost of these networks, how to assign the wavelength, groom in the traffic and bypass the traffic through the intermediate nodes has received a lot of attention from researchers recently.

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This paper addresses the functional reliability and the complexity of reconfigurable antennas using graph models. The correlation between complexity and reliability for any given reconfigurable antenna is defined. Two methods are proposed to reduce failures and improve the reliability of reconfigurable antennas. The failures are caused by the reconfiguration technique or by the surrounding environment. These failure reduction methods proposed are tested and examples are given which verify these methods.

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In this work, we present a numerical study of the use of reconfigurable arrays (RCA) for vibro-acoustography (VA) beam formation. A parametric study of the aperture selection, number of channels, number of elements, focal distance, and steering parameters is presented to show the feasibility and evaluate the performance of VA imaging based on RCA. The transducer aperture was based on two concentric arrays driven by two continuous-wave or toneburst signals at slightly different frequencies. The mathematical model considers a homogeneous, isotropic, inviscid medium. The point-spread function of the system is calculated based on angular spectrum methods using the Fresnel approximation for rectangular sources. Simulations considering arrays with 50 x 50 to 200 x 200 elements with number of channels varying in the range of 32 to 128 are evaluated to identify the best configuration for VA. Advantages of two-dimensional and RCA arrays and aspects related to clinical importance of the RCA implementation in VA, such as spatial resolution, image frame rate, and commercial machine implementation, are discussed. It is concluded that RCA transducers can produce spatial resolution similar to confocal transducers and steering is possible in the elevational and azimuthal planes. Optimal settings for number of elements, number of channels, maximum steering, and focal distance are suggested for VA clinical applications. Furthermore, an optimization for beam steering based on the channel assignment is proposed for balancing the contribution of the two waves in the steered focus.

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Field-Programmable Gate Arrays (FPGAs) are becoming increasingly important in embedded and high-performance computing systems. They allow performance levels close to the ones obtained with Application-Specific Integrated Circuits, while still keeping design and implementation flexibility. However, to efficiently program FPGAs, one needs the expertise of hardware developers in order to master hardware description languages (HDLs) such as VHDL or Verilog. Attempts to furnish a high-level compilation flow (e.g., from C programs) still have to address open issues before broader efficient results can be obtained. Bearing in mind an FPGA available resources, it has been developed LALP (Language for Aggressive Loop Pipelining), a novel language to program FPGA-based accelerators, and its compilation framework, including mapping capabilities. The main ideas behind LALP are to provide a higher abstraction level than HDLs, to exploit the intrinsic parallelism of hardware resources, and to allow the programmer to control execution stages whenever the compiler techniques are unable to generate efficient implementations. Those features are particularly useful to implement loop pipelining, a well regarded technique used to accelerate computations in several application domains. This paper describes LALP, and shows how it can be used to achieve high-performance computing solutions.

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[ES]El objetivo de este Trabajo es el de actualizar un entorno de gestión de bases de datos existente a la versión 11.2 del software de bases de datos Oracle y a una plataforma hardware de última generación. Se migran con tiempo de parada cero varias bases de datos dispersas en distintos servidores a un entorno consolidado de dos nodos dispuestos en alta disponibilidad tipo "activo-activo" mediante Oracle RAC y respaldado por un entorno de contingencia totalmente independiente y sincronizado en tiempo real mediante Oracle GoldenGate. Se realiza un estudio del entorno actual y, realizando una estimación de crecimiento, se propone una configuración de hardware y software mínima para implementar con garantías de éxito los requerimientos del entorno de gestión de bases de datos a corto y medio plazo. Una vez adquirido el hardware, se lleva a cabo la instalación, actualización y configuración del Sistema Operativo y el acceso redundado de los servidores a la cabina de almacenamiento. Posteriormente se instala el software de clúster de Oracle, el software de la base de datos y se crea una instancia que albergará los esquemas requeridos de las bases de datos a consolidar. Seguidamente se migran los esquemas al entorno consolidado y se establece la replicación de éstos en tiempo real con la máquina de contingencia usando en ambos casos Oracle GoldenGate. Finalmente se crea y prueba un esquema de copias de seguridad que incluye copias lógicas y físicas de la propia base de datos y de archivos de configuración del clúster a partir de los cuales será posible restaurar el entorno completamente.

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[EN]One of the main issues of the current education system is the lack of student motivation. This aspect together with the permanent change that the Information and Communications Technologies involve represents a major challenge for the teacher: to continuously update contents and to keep awake the student’s interest. A tremendously useful tool in classrooms consists on the integration of projects with participative and collaborative dynamics, where the teacher acts mainly as a guidance to the student activity instead of being a mere knowledge and evaluation transmitter. As a specific example of project based learning, the EDUROVs project consists on building an economic underwater robot using low cost materials, but allowing the integration and programming of many accessories and sensors with minimum budget using opensource hardware and software.

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ALICE, that is an experiment held at CERN using the LHC, is specialized in analyzing lead-ion collisions. ALICE will study the properties of quarkgluon plasma, a state of matter where quarks and gluons, under conditions of very high temperatures and densities, are no longer confined inside hadrons. Such a state of matter probably existed just after the Big Bang, before particles such as protons and neutrons were formed. The SDD detector, one of the ALICE subdetectors, is part of the ITS that is composed by 6 cylindrical layers with the innermost one attached to the beam pipe. The ITS tracks and identifies particles near the interaction point, it also aligns the tracks of the articles detected by more external detectors. The two ITS middle layers contain the whole 260 SDD detectors. A multichannel readout board, called CARLOSrx, receives at the same time the data coming from 12 SDD detectors. In total there are 24 CARLOSrx boards needed to read data coming from all the SDD modules (detector plus front end electronics). CARLOSrx packs data coming from the front end electronics through optical link connections, it stores them in a large data FIFO and then it sends them to the DAQ system. Each CARLOSrx is composed by two boards. One is called CARLOSrx data, that reads data coming from the SDD detectors and configures the FEE; the other one is called CARLOSrx clock, that sends the clock signal to all the FEE. This thesis contains a description of the hardware design and firmware features of both CARLOSrx data and CARLOSrx clock boards, which deal with all the SDD readout chain. A description of the software tools necessary to test and configure the front end electronics will be presented at the end of the thesis.