EMI filter design of a three-phase buck-type rectifier for aircraft applications

An EMI filter for a three-phase buck-type medium power pulse-width modulation rectifier is designed. This filter considers differential mode noise and complies with MIL-STD- 461E for the frequency range of 10kHz to 10MHz. In industrial applications, the frequency range of the standard starts at 150kHz and the designer typically uses a switching frequency of 28kHz because the fifth harmonic is out of the range. This approach is not valid for aircraft applications. In order to design the switching frequency in aircraft applications, the power losses in the semiconductors and the weight of the reactive components should be considered. The proposed design is based on a harmonic analysis of the rectifier input current and an analytical study of the input filter. The classical industrial design does not consider the inductive effect in the filter design because the grid frequency is 50/60Hz. However, in the aircraft applications, the grid frequency is 400Hz and the inductance cannot be neglected. The proposed design considers the inductance and the capacitance effect of the filter in order to obtain unitary power factor at full power. In the optimization process, several filters are designed for different switching frequencies of the converter. In addition, designs from single to five stages are considered. The power losses of the converter plus the EMI filter are estimated at these switching frequencies. Considering overall losses and minimal filter volume, the optimal switching frequency is selected

High efficiency envelope tracking buck converter for RFPA using GaN HEMTs

—In this paper, application of a new technological solution for power switches based on Gallium Nitride and a filter design methodology for high efficiency Envelope Amplifier in RF transmitters are proposed. Comparing to Si MOSFETs, GaN HEMTs can provide higher efficiency of the Envelope Amplifier, due to better Figure Of Merit (lower product of on- resistance and gate charge). Benefits of their application were verified through the experimental results. The goal of the filter design is to generate the envelope reference with the minimum possible distortion and to improve the efficiency of the Amplifier, obtaining the optimum trade-off between conduction and switching losses.

Multiphase Buck Converter with Minimum Time Control Strategy for RF Envelope Modulation

Power amplifier supplied with constant supply voltage has very low efficiency in the transmitter. A DC-DC converter in series with a linear regulator can be used to obtain voltage modulation. Since this converter should be able to change the output voltage very fast, a multiphase buck converter with a minimum time control strategy is proposed. To modulate supply voltage of the envelope amplifier, the multiphase converter works with some particular duty cycle (i/n, i=1, 2 ... n, n is the number of phase) to generate discrete output voltages, and in these duty cycles the output current ripple can be completely cancelled. The transition times for the minimum time are pre-calculated and inserted in a look-up table. The theoretical background, the system model that is necessary in order to calculate the transition times and the experimental results obtained with a 4-phase buck prototype are given

Optimum Design of an Envelope Tracking Buck Converter for RF PA using GaN HEMTs

In this paper, filter design methodology and application of GaN HEMTs for high efficiency Envelope Amplifier in RF transmitters are proposed. The main objectives of the filter design are generation of the envelope reference with the minimum possible distortion and high efficiency of the amplifier obtained by the optimum trade-off between conduction and switching losses. This optimum point was determined using power losses model for synchronous buck with sinusoidal output voltage and experimental results showed good correspondence with the model and verified the proposed methodology. On the other hand, comparing to Si MOSFETs, GaN HEMTs can provide higher efficiency of the envelope amplifier, due to superior conductivity and switching characteristics. Experimental results verified benefits of GaN devices comparing to the appliance of Si switching devices with very good Figure Of Merit, for this particular application

Synchronous Buck converter with Output Impedance Correction Circuit

This work is related to the improvement of the output impedance of the Buck converter by means of introducing an additional power path that virtually increases the output capacitance during transients. It is well known that in VRM applications, with wide load steps, voltage overshoots and undershoots may lead to undesired performance of the load. To solve this problem, high-bandwidth high-switching frequency power converters can be applied to reduce the transient time or a big output capacitor can be applied to reduce the output impedance. The first solution can degrade the efficiency by increasing switching losses of the MOSFETS, and the second solution is penalizing the cost and size of the output filter. The Output Impedance Correction Circuit (OICC), as presented here, is used to inject or extract a current n-1 times larger than the output capacitor current, thus virtually increasing n times the value of the output capacitance during the transients. This feature allows the usage of a low frequency Buck converter with smaller capacitor but satisfying the dynamic requirements.

Sensorless explicit model predictive control for multi-phase buck converters with variable output voltage

The purpose of this paper is to use the predictive control to take advantage of the future information in order to improve the reference tracking. The control attempts to increase the bandwidth of the conventional regulators by using the future information of the reference, which is supposed to be known in advance. A method for designing a controller is also proposed. A comparison in simulation with a conventional regulator is made controlling a four-phase Buck converter. Advantages and disadvantages are analyzed based on simulation results.

Optimal Design of Envelope Amplifier Based on Linear Assisted Buck Converter

Envelope Tracking (ET) and Envelope Elimination and Restoration (EER) are two techniques that have been used as a solution for highly efficient linear RF Power Amplifiers (PA). In both techniques the most important part is a dc-dc converter called envelope amplifier that has to supply the RF PA with variable voltage. Besides high efficiency, its bandwidth is very important as well. Envelope amplifier based on parallel combination of a switching dc-dc converter and a linear regulator is an architecture that is widely used due to its simplicity. In this paper we discuss about theoretical limitations of this architecture regarding its efficiency and we demonstrate two possible way of its implementation. In order to derive the presented conclusions, a theoretical model of envelope amplifier's efficiency has been presented. Additionally, the benefits of the new emerging GaN technology for this application have been shown as well.

Loss model for a high frequency and low load DC/DC synchronous buck converter

This work presents a behavioral-analytical hybrid loss model for a buck converter. The model has been designed for a wide operating frequency range up to 4MHz and a low power range (below 20W). It is focused on the switching losses obtained in the power MOSFETs. Main advantages of the model are the fast calculation time and a good accuracy. It has been validated by simulation and experimentally with one Ga, power transistor and two Si MOSFETs. Results show good agreement between measurements and the model.

Improvement of the Dynamic Performance of a Buck Converter using Controlled Current Source as an Additional Energy Path

This work is related to the improvement of the dynamic performance of the Buck converter by means of introducing an additional power path that virtually increase s the output capacitance during transients, thus improving the output impedance of the converter. It is well known that in VRM applications, with wide load steps, voltage overshoots and undershoots ma y lead to undesired performance of the load. To solve this problem, high-bandwidth high-switching frequency power converter s can be applied to reduce the transient time or a big output capacitor can be applied to reduce the output impedance. The first solution can degrade the efficiency by increasing switching losses of the MOSFETS, and the second solution is penalizing the cost and size of the output filter. The additional energy path, as presented here, is introduced with the Output Impedance Correction Circuit (OICC) based on the Controlled Current Source (CCS). The OICC is using CCS to inject or extract a current n - 1 times larger than the output capacitor current, thus virtually increasing n times the value of the output capacitance during the transients. This feature allows the usage of a low frequency Buck converter with smaller capacitor but satisfying the dynamic requirements.

Hybrid behavioral-analytical loss model for a high frequency and low load DC/DC buck converter

This work presents a behavioral-analytical hybrid loss model for a buck converter. The model has been designed for a wide operating frequency range up to 4MHz and a low power range (below 20W). It is focused on the switching losses obtained in the power MOSFETs. Main advantages of the model are the fast calculation time (below 8.5 seconds) and a good accuracy, which makes this model suitable for the optimization process of the losses in the design of a converter. It has been validated by simulation and experimentally with one GaN power transistor and three Si MOSFETs. Results show good agreement between measurements and the model

Evaluación del potencial fotovoltaico del Campus Sur de la Universidad Politécnica de Madrid

El presente proyecto engloba el estudio del potencial fotovoltaico del Campus Sur de la Universidad Politécnica de Madrid. Este estudio se divide en tres partes. En primer lugar, se calcula la productividad del campus. En segundo lugar, se diseña la disposición de los generadores fotovoltaicos en los terrenos disponibles. Como paso final, se realiza un estudio económico de distintos supuestos. Para realizar los cálculos de productividad, se utiliza IESPRO, un programa desarrollado en Matlab©, junto con una aplicación complementaria desarrollada en el mismo lenguaje. Gracias a estos dos software es posible obtener una estimación muy realista de la energía anual generada. El aprovechamiento del terreno se estudia con la ayuda del software libre Sketchup©. Gracias a esta aplicación, es posible la reconstrucción del Campus Sur en 3D. Dicha reconstrucción incluye edificaciones y vegetación, facilitando la distribución de los generadores fotovoltaicos en todas las zonas, pudiendo evitar zonas con sombreado o no aptas para la instalación, y maximizando la utilización del terreno. El conjunto de los análisis anteriores permiten determinar el rendimiento energético del Campus Sur en sus distintas configuraciones, es decir, únicamente instalando generadores fotovoltaicos en las azoteas de los edificios, o la instalación en todo el terreno disponible, el cual incluye las azoteas y los descampados. Este rendimiento energético, comparado con el consumo anual de todo el campus, permite estimar el coste financiero de llevar a cabo la instalación y su rentabilidad, todo ello detallado en el estudio económico. El estudio económico se basa en dos supuestos, el primero de ellos, únicamente tiene en cuenta la instalación en las azoteas de los edificios. El segundo estudio, incluye los descampados y las azoteas. Con estos dos estudios se puede verificar la viabilidad del proyecto, facilitando datos concretos sobre las ventajas de cada uno de ellos. ABSTRACT. The aim of this work is to study the photovoltaic potential in the South Campus of the Polytechnic University of Madrid. The work has been divided into three parts. The first one is focused on the calculus of the solar harvesting productivity of the South Campus. The second part is centered in the development of the complete photovoltaic system layout design, taking into account the available placement. In the third part, an economic study considering several different scenarios is carried out. In order to calculate the solar productivity, the MATLAB based software tool IESPRO together with a complementary application developed in MATLAB as well, have been used. These programs allow to obtain an accurate estimation of the generated annual energy. The land use is studied with the help of free software SketchUp. With this application, it is possible to rebuild the South Campus in 3D. This reconstruction includes: buildings and vegetation, facilitating the distribution of photovoltaic generators in all areas, to avoid shaded or unsuitable areas for the installation, and maximizing land use. All the above analysis allow determining the energy efficiency of the South Campus for two different configurations, i.e., installing solar photovoltaic arrays only on the roofs of the buildings, or installing solar photovoltaic arrays throughout the land available, including vacant lots and rooftops. The facilities final cost and the cost effectiveness are estimated by comparing the energy efficiency with the South Campus total consumption. This study is based on two different scenarios: the first one considers the solar arrays installation in the buildings roofs, and the second one includes in the layout the vacant lots and rooftops. These studies allow verifying the feasibility of the project, and provide specific information related to the advantages and drawbacks of each scenario.

Minimum time control for multiphase buck converter: analysis and application

The combination of minimum time control and multiphase converter is a favorable option for dc-dc converters in applications where output voltage variation is required, such as RF amplifiers and dynamic voltage scaling in microprocessors, due to their advantage of fast dynamic response. In this paper, an improved minimum time control approach for multiphase buck converter that is based on charge balance technique, aiming at fast output voltage transition is presented. Compared with the traditional method, the proposed control takes into account the phase delay and current ripple in each phase. Therefore, by investigating the behavior of multiphase converter during voltage transition, it resolves the problem of current unbalance after the transient, which can lead to long settling time of the output voltage. The restriction of this control is that the output voltage that the converter can provide is related to the number of the phases, because only the duty cycles at which the multiphase converter has total ripple cancellation are used in this approach. The model of the proposed control is introduced, and the design constraints of the buck converters filter for this control are discussed. In order to prove the concept, a four-phase buck converter is implemented and the experimental results that validate the proposed control method are presented. The application of this control to RF envelope tracking is also presented in this paper.

Application and modeling of GaN FET in 1MHz large signal bandwidth power supply for radio frequency power amplifier

In this paper, implementation and testing of non- commercial GaN HEMT in a simple buck converter for envelope amplifier in ET and EER transmission techn iques has been done. Comparing to the prototypes with commercially available EPC1014 and 1015 GaN HEMTs, experimentally demonstrated power supply provided better thermal management and increased the switching frequency up to 25MHz. 64QAM signal with 1MHz of large signal bandw idth and 10.5dB of Peak to Average Power Ratio was gener ated, using the switching frequency of 20MHz. The obtaine defficiency was 38% including the driving circuit an d the total losses breakdown showed that switching power losses in the HEMT are the dominant ones. In addition to this, some basic physical modeling has been done, in order to provide an insight on the correlation between the electrical characteristics of the GaN HEMT and physical design parameters. This is the first step in the optimization of the HEMT design for this particular application.

Improvement of the Dynamic Performance of a Multiphase Current Controlled Buck Converter using an Auxiliary Synchronous Buck Converter as an Additional Energy Path

This work is related to the output impedance improvement of a Multiphase Buck converter with Peak Current Mode Control (PCMC) by means of introducing an additional power path that virtually increases the output capacitance during transients. Various solutions that can be employed to improve the dynamic behavior of the converter system exist, but nearly all solutions are developed for a Single Phase Buck converter with Voltage Mode Control (VMC), while in the VRM applications, due to the high currents, the system is usually implemented as a Multiphase Buck Converter with Current Mode Control. The additional energy path, as presented here, is introduced with the Output Impedance Correction Circuit (OICC) based on the Controlled Current Source (CCS). The OICC is used to inject or extract a current n-1 times larger than the output capacitor current, thus virtually increasing n times the value of the output capacitance during the transients. Furthermore, this work extends the OICC concept to a Multiphase Buck Converter system while comparing proposed solution with the system that has n times bigger output capacitor. In addition, the OICC is implemented as a Synchronous Buck Converter with PCMC, thus reducing its influence on the system efficiency.

Ripple cancellation technique applied to a synchronous buck converter to achieve very high bandwidth and very high efficiency envelope amplifier

This work presents a single stage converter for a high bandwidth and a high efficiency envelope amplifier. The current ripple cancellation technique is applied to a synchronous buck converter to cancel the output current ripple and to decrease the switching frequency without a reduction in the large signal bandwidth. The converter is modeled and the new design with ripple cancellation circuit is detailed. The advantages of the proposed design are presented and validated experimentally. The transfer function of the output filter of the buck converter with ripple cancellation circuit has been modeled and compared to measurements, showing a good correspondence. Experimental validation is provided at 4MHz of switching frequency for DC and variable output voltage for a sinusoidal and a 64QAM signal. Additional experimental validation of the efficiency improvement is provided, compared to the equivalent design (same bandwidth and output voltage ripple) of the conventional buck converter.