An embedded 1149.4 extension to support mixed-signal debugging

Debugging electronic circuits is traditionally done with bench equipment directly connected to the circuit under debug. In the digital domain, the difficulties associated with the direct physical access to circuit nodes led to the inclusion of resources providing support to that activity, first at the printed circuit level, and then at the integrated circuit level. The experience acquired with those solutions led to the emergence of dedicated infrastructures for debugging cores at the system-on-chip level. However, all these developments had a small impact in the analog and mixed-signal domain, where debugging still depends, to a large extent, on direct physical access to circuit nodes. As a consequence, when analog and mixed-signal circuits are integrated as cores inside a system-on-chip, the difficulties associated with debugging increase, which cause the time-to-market and the prototype verification costs to also increase. The present work considers the IEEE1149.4 infrastructure as a means to support the debugging of mixed-signal circuits, namely to access the circuit nodes and also an embedded debug mechanism named mixed-signal condition detector, necessary for watch-/breakpoints and real-time analysis operations. One of the main advantages associated with the proposed solution is the seamless migration to the system-on-chip level, as the access is done through electronic means, thus easing debugging operations at different hierarchical levels.

Automated design of microwave discrete tuning differential capacitance circuits in Si-integrated technologies

A genetic algorithm used to design radio-frequency binary-weighted differential switched capacitor arrays (RFDSCAs) is presented in this article. The algorithm provides a set of circuits all having the same maximum performance. This article also describes the design, implementation, and measurements results of a 0.25 lm BiCMOS 3-bit RFDSCA. The experimental results show that the circuit presents the expected performance up to 40 GHz. The similarity between the evolutionary solutions, circuit simulations, and measured results indicates that the genetic synthesis method is a very useful tool for designing optimum performance RFDSCAs.

Crossing genetic and swarm intelligence algorithms to generate logic circuits

Genetic Algorithms (GAs) are adaptive heuristic search algorithm based on the evolutionary ideas of natural selection and genetic. The basic concept of GAs is designed to simulate processes in natural system necessary for evolution, specifically those that follow the principles first laid down by Charles Darwin of survival of the fittest. On the other hand, Particle swarm optimization (PSO) is a population based stochastic optimization technique inspired by social behavior of bird flocking or fish schooling. PSO shares many similarities with evolutionary computation techniques such as GAs. The system is initialized with a population of random solutions and searches for optima by updating generations. However, unlike GA, PSO has no evolution operators such as crossover and mutation. In PSO, the potential solutions, called particles, fly through the problem space by following the current optimum particles. PSO is attractive because there are few parameters to adjust. This paper presents hybridization between a GA algorithm and a PSO algorithm (crossing the two algorithms). The resulting algorithm is applied to the synthesis of combinational logic circuits. With this combination is possible to take advantage of the best features of each particular algorithm.

Compact, frequency reconfigurable, printed monopole antenna

This paper proposes a possible implementation of a compact printed monopole antenna, useful to operate in UMTS and WLAN bands. In order to accomplish that, a miniaturization technique based on the application of chip inductors is used in conjunction with frequency reconfiguration capability. The chip inductors change the impedance response of the monopole, allowing to reduce the resonant frequency. In order to be able to operate the antenna in these two different frequencies, an antenna reconfiguration technique based on PIN diodes is applied. This procedure allows the change of the active form of the antenna leading to a shift in the resonant frequency. The prototype measurements show good agreement with the simulation results.

Particle swarm design of digital circuits

Swarm Intelligence (SI) is the property of a system whereby the collective behaviors of (unsophisticated) agents interacting locally with their environment cause coherent functional global patterns to emerge. Particle swarm optimization (PSO) is a form of SI, and a population-based search algorithm that is initialized with a population of random solutions, called particles. These particles are flying through hyperspace and have two essential reasoning capabilities: their memory of their own best position and knowledge of the swarm's best position. In a PSO scheme each particle flies through the search space with a velocity that is adjusted dynamically according with its historical behavior. Therefore, the particles have a tendency to fly towards the best search area along the search process. This work proposes a PSO based algorithm for logic circuit synthesis. The results show the statistical characteristics of this algorithm with respect to number of generations required to achieve the solutions. It is also presented a comparison with other two Evolutionary Algorithms, namely Genetic and Memetic Algorithms.

Automated synthesis procedure of RF discrete tuning differential capacitance circuits

The paper presents a RFDSCA automated synthesis procedure. This algorithm determines several RFDSCA circuits from the top-level system specifications all with the same maximum performance. The genetic synthesis tool optimizes a fitness function proportional to the RFDSCA quality factor and uses the epsiv-concept and maximin sorting scheme to achieve a set of solutions well distributed along a non-dominated front. To confirm the results of the algorithm, three RFDSCAs were simulated in SpectreRF and one of them was implemented and tested. The design used a 0.25 mum BiCMOS process. All the results (synthesized, simulated and measured) are very close, which indicate that the genetic synthesis method is a very useful tool to design optimum performance RFDSCAs.

A fractional calculus perspective in the evolutionary design of combinational circuits

This paper analyses the performance of a genetic algorithm (GA) in the synthesis of digital circuits using two novel approaches. The first concept consists in improving the static fitness function by including a discontinuity evaluation. The measure of variability in the error of the Boolean table has similarities with the function continuity issue in classical calculus. The second concept extends the static fitness by introducing a fractional-order dynamical evaluation.

The simple economics of risk-sharing agreements between the NHS and the pharmaceutical industry

The Janssen-Cilag proposal for a risk-sharing agreement regarding bortezomib received a welcome signal from NICE. The Office of Fair Trading report included risk-sharing agreements as an available tool for the National Health Service. Nonetheless, recent discussions have somewhat neglected the economic fundamentals underlying risk-sharing agreements. We argue here that risk-sharing agreements, although attractive due to the principle of paying by results, also entail risks. Too many patients may be put under treatment even with a low success probability. Prices are likely to be adjusted upward, in anticipation of future risk-sharing agreements between the pharmaceutical company and the third-party payer. An available instrument is a verification cost per patient treated, which allows obtaining the first-best allocation of patients to the new treatment, under the risk sharing agreement. Overall, the welfare effects of risk-sharing agreements are ambiguous, and care must be taken with their use.

Industry energy optimization: A case study in a biodiesel production site

This paper presents a case study of heat exchanger network (HEN) retrofit with the objective to reduce the utilities consumption in a biodiesel production process. Pinch analysis studies allow determining the minimum duty utilities as well the maximum of heat recovery. The existence of heat exchangers for heat recovery already running in the process causes a serious restriction for the implementation of grassroot HEN design based on pinch studies. Maintaining the existing HEN, a set of alternatives with additional heat exchangers was created and analysed using some industrial advice and selection criteria. The final proposed solution allows to increase the actual 18 % of recovery heat of the all heating needs of the process to 23 %, with an estimated annual saving in hot utility of 35 k(sic)/y.

Novel techniques for the design and practical realization of switched-capacitor circuits in deep-submicron CMOS technologies

Dissertação apresentada para obtenção do Grau de Doutor em Engenharia Electrotécnica e de Computadores pela Universidade Nova de Lisboa, Faculdade de Ciências e Tecnologia

Low-voltage low-power CMOS analogue circuits for Gaussian and uniform noise generation

IEEE International Symposium on Circuits and Systems, MAY 25-28, 2003, Bangkok, Thailand. (ISI Web of Science)

Transformador diferencial de variação linear: condicionamento de sinal e desmodulação síncrona

Dissertação para obtenção do grau de Mestre em Engenharia Eletrotécnica Ramo de Automação e eletrónica Industrial

On-line self-healing of circuits implemented on reconfigurable FPGAs

To boost logic density and reduce per unit power consumption SRAM-based FPGAs manufacturers adopted nanometric technologies. However, this technology is highly vulnerable to radiation-induced faults, which affect values stored in memory cells, and to manufacturing imperfections. Fault tolerant implementations, based on Triple Modular Redundancy (TMR) infrastructures, help to keep the correct operation of the circuit. However, TMR is not sufficient to guarantee the safe operation of a circuit. Other issues like module placement, the effects of multi- bit upsets (MBU) or fault accumulation, have also to be addressed. In case of a fault occurrence the correct operation of the affected module must be restored and/or the current state of the circuit coherently re-established. A solution that enables the autonomous restoration of the functional definition of the affected module, avoiding fault accumulation, re-establishing the correct circuit state in real-time, while keeping the normal operation of the circuit, is presented in this paper.

A case study on the eco-efficiency performance of a composite processing industry: evaluation and quantification of potential improvements

In this study, an attempt was made in order to measure and evaluate the eco-efficiency performance of a pultruded composite processing company. For this purpose the recommendations of World Business Council for Sustainable Development (WCSD) and the directives of ISO 14301 standard were followed and applied. The main general indicators of eco-efficiency, as well as the specific indicators, were defined and determined. With basis on indicators’ figures, the value profile, the environmental profile, and the pertinent eco-efficiency ratios were established and analyzed. In order to evaluate potential improvements on company eco-performance, new indicators values and eco-efficiency ratios were estimated taking into account the implementation of new proceedings and procedures, at both upstream and downstream of the production process, namely: i) Adoption of a new heating system for pultrusion die-tool in the manufacturing process, more effective and with minor heat losses; ii) Recycling approach, with partial waste reuse of scrap material derived from manufacturing, cutting and assembly processes of GFRP profiles. These features lead to significant improvements on the sequent assessed eco-efficiency ratios of the present case study, yielding to a more sustainable product and manufacturing process of pultruded GFRP profiles.

Cork stoppers industry: defining appropriate mould colonization

Aims: The main aims of this work were the study of cork slabs moulds colonization and the evaluation of the moulds diversity during cork processing steps, in different cork stoppers factories. Simultaneously, it was envisaged to perform an evaluation of the air quality. Methods and Results: Moulds were isolated and identified from cork slabs and cork samples in four cork stoppers factories. The identification was based on morphological characters and microscopic observation of the reproductive structures. Airborne spore dispersion was assessed using a two stage Andersen sampler. It was observed that Chrysonilia sitophila was always present on cork slabs during the maturing period, but mould diversity appeared to be associated to the different factory configurations and processing steps. Conclusions: Spatial separation of the different steps of the process, including physical separation of the maturation step, is essential to guarantee high air quality and appropriate cork slabs colonization, i.e. C. sitophila dominance. The sorting and cutting of the edges of cork slabs after boiling and before the maturing step is also recommended. Significance and Impact of the Study: This study is very important for the cork stopper industry as it gives clear indications on how to keep high quality manufacturing standards and how to avoid occupational health problems.