PC based integrated protection scheme for railway traction applications

This paper presents the design and development of a comprehensive digital protection scheme for applications in 25 KV a.c railway traction system. The scheme provides distance protection, detection of wrong phase coupling both in the lagging and leading directions, high set instantaneous trip and PT fuse failure. Provision is also made to include fault location and disturbance recording. The digital relaying scheme has been tried on two types of hardware platforms, one with PC/AT based hardware and the other with a custom designed standalone 16-bit microcontroller based card. Compared to the existing scheme, the operating time is around one cycle and the relaying algorithm has been optimised to minimise the number of computations. The prototype has been rigorously tested in the laboratory using a specially designed PC based relay test bench and the results are highly satisfactory.

A two timescale stochastic approximation scheme for simulation-based parametric optimization

A two timescale stochastic approximation scheme which uses coupled iterations is used for simulation-based parametric optimization as an alternative to traditional "infinitesimal perturbation analysis" schemes, It avoids the aggregation of data present in many other schemes. Its convergence is analyzed, and a queueing example is presented.

A high performance scheme for EEG compression using a multichannel model

The amount of data contained in electroencephalogram (EEG) recordings is quite massive and this places constraints on bandwidth and storage. The requirement of online transmission of data needs a scheme that allows higher performance with lower computation. Single channel algorithms, when applied on multichannel EEG data fail to meet this requirement. While there have been many methods proposed for multichannel ECG compression, not much work appears to have been done in the area of multichannel EEG. compression. In this paper, we present an EEG compression algorithm based on a multichannel model, which gives higher performance compared to other algorithms. Simulations have been performed on both normal and pathological EEG data and it is observed that a high compression ratio with very large SNR is obtained in both cases. The reconstructed signals are found to match the original signals very closely, thus confirming that diagnostic information is being preserved during transmission.

In-situ power monitoring scheme and its application in dynamic voltage and threshold scaling for digital CMOS integrated circuits

An in-situ power monitoring technique for Dynamic Voltage and Threshold scaling (DVTS) systems is proposed which measures total power consumed by load circuit using sleep transistor acting as power sensor. Design details of power monitor are examined using simulation framework in UMC 90nm CMOS process. Experimental results of test chip fabricated in AMS 0.35µm CMOS process are presented. The test chip has variable activity between 0.05 and 0.5 and has PMOS VTH control through nWell contact. Maximum resolution obtained from power monitor is 0.25mV. Overhead of power monitor in terms of its power consumption is 0.244 mW (2.2% of total power of load circuit). Lastly, power monitor is used to demonstrate closed loop DVTS system. DVTS algorithm shows 46.3% power savings using in-situ power monitor.

A Complete Characterization of an Optimal Timer Based Selection Scheme

Timer-based mechanisms are often used in several wireless systems to help a given (sink) node select the best helper node among many available nodes. Specifically, a node transmits a packet when its timer expires, and the timer value is a function of its local suitability metric. In practice, the best node gets selected successfully only if no other node's timer expires within a `vulnerability' window after its timer expiry. In this paper, we provide a complete closed-form characterization of the optimal metric-to-timer mapping that maximizes the probability of success for any probability distribution function of the metric. The optimal scheme is scalable, distributed, and much better than the popular inverse metric timer mapping. We also develop an asymptotic characterization of the optimal scheme that is elegant and insightful, and accurate even for a small number of nodes.

Starting scheme for load commutated inverter-fed wound field synchronous machine using an auxiliary low-power voltage source inverter

Conventional thyristor-based load commutated inverter (LCI)-fed wound field synchronous machine operates only above a minimum speed that is necessary to develop enough back emf to ensure commutation. The drive is started and brought up to a speed of around 10-15% by a complex `dc link current pulsing' technique. During this process, the drive have problems such as pulsating torque, insufficient average starting torque, longer starting time, etc. In this regard a simple starting and low-speed operation scheme, by employing an auxiliary low-power voltage source inverter (VSI) between the LCI and the machine terminals, is presented in this study. The drive is started and brought up to a low speed of around 15% using the VSI alone with field oriented control. The complete control is then smoothly and dynamically transferred to the conventional LCI control. After the control transfer, the VSI is turned off and physically disconnected from the main circuit. The advantages of this scheme are smooth starting, complete control of torque and flux at starting and low speeds, less starting time, stable operation, etc. The voltage rating of the required VSI is very low of the order of 10-15%, whereas the current rating is dependent on the starting torque requirement of the load. The experimental results from a 15.8 hp LCI-fed wound field synchronous machine are given to demonstrate the scheme.

An improved Monte Carlo scheme for simulation of synthesis of nanoparticles in reverse micelles

An improved Monte Carlo technique is presented in this work to simulate nanoparticle formation through a micellar route. The technique builds on the simulation technique proposed by Bandyopadhyaya et al. (Langmuir 2000, 16, 7139) which is general and rigorous but at the same time very computation intensive, so much so that nanoparticle formation in low occupancy systems cannot be simulated in reasonable time. In view of this, several strategies, rationalized by simple mathematical analyses, are proposed to accelerate Monte Carlo simulations. These are elimination of infructuous events, removal of excess reactant postreaction, and use of smaller micelle population a large number of times. Infructuous events include collision of an empty micelle with another empty one or with another one containing only one molecule or only a solid particle. These strategies are incorporated in a new simulation technique which divides the entire micelle population in four classes and shifts micelles from one class to other as the simulation proceeds. The simulation results, throughly tested using chi-square and other tests, show that the predictions of the improved technique remain unchanged, but with more than an order of magnitude decrease in computational effort for some of the simulations reported in the literature. A post priori validation scheme for the correctness of the simulation results has been utilized to propose a new simulation strategy to arrive at converged simulation results with near minimum computational effort.

Investigation on the Potential Rise and Currents in Insulated Mast Scheme with Single Tower During Stroke Interception

The insulated mast scheme for the lightning protection system can be found in a few practical designs. Many advantages over conventional protection system are some times envisaged. However, the technical literature on the analysis of such schemes and further quantification of their protection efficacy is rather scarce. As a first step to address this problem, the present work is taken up and the potential rise at the top and ground end currents in insulating mast scheme with single tower is investigated for several tower heights and pertinent values of other parameters. The quantities that are investigated are the potential difference across the insulation and ground end currents for both tower and the ground wires. Quantifications are carried out for the relevant range of stroke current front times. The influence of number of ground wires, their earthing location and to a limited extent, the length of the insulating support have been ascertained. Some relevant discussion on insulation strength is made. These findings are quite novel and aid in quantification of the practical efficacy of the insulated mast scheme. The level of induction to the support tower and possible flashover to the same are not in favour of this scheme.

An Effective Seamless Connectivity Scheme for Ubiquitous Applications

The idea of ubiquity and seamless connectivity in networks is gaining more importance in recent times because of the emergence of mobile devices with added capabilities like multiple interfaces and more processing abilities. The success of ubiquitous applications depends on how effectively the user is provided with seamless connectivity. In a ubiquitous application, seamless connectivity encompasses the smooth migration of a user between networks and providing him/her with context based information automatically at all times. In this work, we propose a seamless connectivity scheme in the true sense of ubiquitous networks by providing smooth migration to a user along with providing information based on his/her contexts automatically without re-registration with the foreign network. The scheme uses Ubi-SubSystems(USS) and Soft-Switches(SS) for maintaining the ubiquitous application resources and the users. The scheme has been tested by considering the ubiquitous touring system with several sets of tourist spots and users.

A five level inverter scheme with common mode volatge elimination by cascading conventional two level and three level NPC inverters for an induction motor drive

Common-mode voltage generated by the PWM inverter causes shaft voltage, bearing current and ground leakage current in induction motor drive system, resulting in an early motor failure. This paper presents a common-mode elimination scheme for a five-level inverter with reduced power circuit complexity. The proposed scheme is realised by cascading conventional two-level and conventional NPC three-level inverters in conjunction with an open-end winding three-phase induction motor drive and the common-mode voltage (CMV) elimination is achieved by using only switching states that result in zero CMV, for the entire modulation range.

An Efficient Scheme for Establishing Pairwise Keys for Wireless Sensor Networks

This paper addresses the problem of secure path key establishment in wireless sensor networks that uses the random key pre-distribution technique. Inspired by the recent proxy-based scheme in the work of Ling and Znati (2005) and Li et al. (2005), we introduce a friend-based scheme for establishing pairwise keys securely. We show that the chances of finding friends in a neighbourhood are considerably more than that of finding proxies, leading to lower communication overhead. Further, we prove that the friend-based scheme performs better than the proxy-based scheme both in terms of resilience against node capture as well as in energy consumption for pairwise key establishment, making our scheme more feasible.