936 resultados para Inverter multilivello ,Modulatori PWM ,Motore-asincrono ,Trifase ,Ponte-IGBT
Resumo:
Special switching sequences involving division of active state time are used in space-vector-based generation of pulse width modulation (PWM) waveforms. This paper proposes a hybrid PWM technique which is a combination of the conventional and special switching sequences. The proposed hybrid PWM technique reduces the peak-to-peak torque ripple at high speeds of an induction motor drive. Supporting simulation and experimental results are presented from a closed-loop controlled motor drive.
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The ac-side terminal voltages of parallel-connected converters are different if the line reactive drops of the individual converters are different. This could result either from differences in per-phase inductances or from differences in the line currents of the converters. In such cases, the modulating signals are different for the converters. Hence, the common-mode (CM) voltages for the converters, injected by conventional space vector pulsewidth modulation (CSVPWM) to increase dc-bus utilization, are different. Consequently, significant low-frequency zero-sequence circulating currents result. This paper proposes a new modulation method for parallel-connected converters with unequal terminal voltages. This method does not cause low-frequency zero-sequence circulating currents and is comparable with CSVPWM in terms of dc-bus utilization and device power loss. Experimental results are presented at a power level of 150 kVA from a circulating-power test setup, where the differences in converter terminal voltages are quite significant.
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Optimal switching angles for minimization of total harmonic distortion of line current (I-THD) in a voltage source inverter are determined traditionally by imposing half-wave symmetry (HWS) and quarter-wave symmetry (QWS) conditions on the pulse width modulated waveform. This paper investigates optimal switching angles with QWS relaxed. Relaxing QWS expands the solution space and presents the possibility of improved solutions. The optimal solutions without QWS are shown here to outperform the optimal solutions with QWS over a range of modulation index (M) between 0.82 and 0.94 for a switching frequency to fundamental frequency ratio of 5. Theoretical and experimental results are presented on a 2.3kW induction motor drive.
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A multilevel inverter for generating 17 voltage levels using a three-level flying capacitor inverter and cascaded H-bridge modules with floating capacitors has been proposed. Various aspects of the proposed inverter like capacitor voltage balancing have been presented in the present paper. Experimental results are presented to study the performance of the proposed converter. The stability of the capacitor balancing algorithm has been verified both during transients and steady-state operation. All the capacitors in this circuit can be balanced instantaneously by using one of the pole voltage combinations. Another advantage of this topology is its ability to generate all the voltages from a single dc-link power supply which enables back-to-back operation of converter. Also, the proposed inverter can be operated at all load power factors and modulation indices. Additional advantage is, if one of the H-bridges fail, the inverter can still be operated at full load with reduced number of levels. This configuration has very low dv/dt and common-mode voltage variation.
Resumo:
Usually the top and bottom IGBT devices in an inverter leg are of the same make (i.e. from same manufacturer). At low power level, these two devices even may be contained in the same module. However at high power levels the top and bottom devices are in separate modules. Sometimes, in the event of device failure, device of particular make may be replaced by one of another make, but of same ratings (on account of non-availability of the original make). This paper investigates the effect of such intermixing of two different makes of high power IGBTs in an inverter leg on the switching characteristics. The switching transitions between IGBT and diode of similar make and those of IGBT and diode of dissimilar make are compared experimentally at various DC link voltages and currents. The comparisons are made in terms of, IGBT peak turn-on di/dt, IGBT peak turn-off di/dt, peak diode reverse recovery current (I-rr), peak IGBT voltage overshoot and switching energy losses.
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This paper proposes a technique to suppress low-order harmonics for an open-end winding induction motor drive for a full modulation range. One side of the machine is connected to a main inverter with a dc power supply, whereas the other inverter is connected to a capacitor from the other side. Harmonic suppression (with complete elimination of fifth- and seventh-order harmonics) is achieved by realizing dodecagonal space vectors using a combined pulsewidth modulation (PWM) control for the two inverters. The floating capacitor voltage is inherently controlled during the PWM operation. The proposed PWM technique is shown to be valid for the entire modulation range, including overmodulation and six-step mode of operation of the main inverter. Experimental results have been presented to validate the proposed technique.
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Semiconductor device junction temperatures are maintained within datasheet specified limits to avoid failure in power converters. Burn-in tests are used to ensure this. In inverters, thermal time constants can be large and burn-in tests are required to be performed over long durations of time. At higher power levels, besides increased production cost, the testing requires sources and loads that can handle high power. In this study, a novel method to test a high power three-phase grid-connected inverter is proposed. The method eliminates the need for high power sources and loads. Only energy corresponding to the losses is consumed. The test is done by circulating rated current within the three legs of the inverter. All the phase legs being loaded, the method can be used to test the inverter in both cases of a common or independent cooling arrangement for the inverter phase legs. Further, the method can be used with different inverter configurations - three- or four-wire and for different pulse width modulation (PWM) techniques. The method has been experimentally validated on a 24 kVA inverter for a four-wire configuration that uses sine-triangle PWM and a three-wire configuration that uses conventional space vector PWM.
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Multilevel inverters with hexagonal voltage space vector structures have improved performance of induction motor drives compared to that of the two level inverters. Further reduction in the torque ripple on the motor shaft is possible by using multilevel dodecagonal (12-sided polygon) voltage space vector structures. The advantages of dodecagonal voltage space vector based PWM techniques are the complete elimination of fifth and seventh harmonics in phase voltages for the full modulation range and the extension of linear modulation range. This paper proposes an inverter circuit topology capable of generating multilevel dodecagonal voltage space vectors with symmetric triangles, by cascading two asymmetric three level inverters with isolated H-Bridges. This is made possible by proper selection of DC link voltages and the selection of resultant switching states for the inverters. In this paper, a simple PWM timing calculation method is proposed. Experimental results have also been presented in this paper to validate the proposed concept.
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The voltage ripple and power loss in the DC-capacitor of a voltage source inverter depend on the harmonic currents flowing through the capacitor. This paper presents a double Fourier series based analysis of the harmonic contents of the DC capacitor current in a three-level neutral-point clamped (NPC) inverter, modulated with sine-triangle pulse-width modulation (SPWM) or conventional space vector pulse-width modulation (CSVPWM) schemes. The analytical results are validated experimentally on a 3-kVA three-level inverter prototype. The capacitor current in an NPC inverter has a periodicity of 120(a similar to) at the fundamental or modulation frequency. Hence, this current contains third-harmonic and triplen-frequency components, apart from switching frequency components. The harmonic components vary with modulation index and power factor for both PWM schemes. The third harmonic current decreases with increase in modulation index and also decreases with increase in power factor in case of both PWM methods. In general, the third harmonic content is higher with SPWM than with CSVPWM at a given operating condition. Also, power loss and voltage ripple in the DC capacitor are estimated for both the schemes using the current harmonic spectrum and equivalent series resistance (ESR) of the capacitor.
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Inverters with high voltage conversion ratio are used in systems with sources such as batteries, photovoltaic (PV) modules or fuel cells. Transformers are often used in such inverters to provide the required voltage conversion ratio and isolation. In this paper, a compact high-frequency (HF) transformer interfaced AC link inverter with lossless snubber is discussed. A high performance synchronized modulation scheme is proposed for this inverter. This modulation addresses the issue of over-voltage spikes due to transformer leakage inductance and it is shown that the circuit can operate safely even when the turn-on delay, such as dead-time, is not used in the HF rectifier section. The problem of spurious turn-on in the HF inverter switches is also mitigated by the proposed modulation method. The circuit performance is validated experimentally with a $900W$ prototype inverter.
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This paper demonstrates light-load instability in a 100-kW open-loop induction motor drive on account of inverter deadtime. An improved small-signal model of an inverter-fed induction motor is proposed. This improved model is derived by linearizing the nonlinear dynamic equations of the motor, which include the inverter deadtime effect. Stability analysis is carried out on the 100-kW415-V three-phase induction motor considering no load. The analysis brings out the region of instability of this motor drive on the voltage versus frequency (V-f) plane. This region of light-load instability is found to expand with increase in inverter deadtime. Subharmonic oscillations of significant amplitude are observed in the steady-state simulated and measured current waveforms, at numerous operating points in the unstable region predicted, confirming the validity of the stability analysis. Furthermore, simulation and experimental results demonstrate that the proposed model is more accurate than an existing small-signal model in predicting the region of instability.
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This paper investigates possible reduction of pulsating torque in open-loop and vector-controlled induction motor drives through deployment of certain advanced bus-clamping pulsewidth modulation (ABCPWM) method. Toward this goal, a simple and machine-independent method is proposed to analyze the torque harmonic spectrum of a voltage source inverter fed induction motor, operated with any real-time pulsewidth modulation (PWM) method. The analytically evaluated torque harmonic spectra, pertaining to conventional space vector PWM (CSVPWM), bus-clamping PWM (BCPWM), and ABCPWM, are validated through simulation and experimental results. Theoretical and experimental studies bring out the superiority of the ABCPWM in terms of torque harmonics over CSVPWM and BCPWM. The magnitude of the dominant torque harmonic with the ABCPWM scheme is shown to be significantly lower than that with CSVPWM, over a wide range of speed. The rms torque ripple (i.e., total rms value of all harmonic torques) is lower with ABCPWM than with BCPWM over the entire range of speed.
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In this study, analysis of extending the linear modulation range of a zero common-mode voltage (CMV) operated n-level inverter by allowing reduced CMV switching is presented. A new hybrid seven-level inverter topology with a single DC supply is also presented in this study and inverter operation for zero and reduced CMV is analysed. Each phase of the inverter is realised by cascading two three-level flying capacitor inverters with a half-bridge module in between. Proposed inverter topology is operated with zero CMV for modulation index <86% and is operated with a CMV magnitude of V-dc/18 to extend the modulation range up to 96%. Experimental results are presented for zero CMV operation and for reduced common voltage operation to extend the linear modulation range. A capacitor voltage balancing algorithm is designed utilising the pole voltage redundancies of the inverter, which works for every sampling instant to correct the capacitor voltage irrespective of load power factor and modulation index. The capacitor voltage balancing algorithm is tested for different modulation indices and for various transient conditions, to validate the proposed topology.
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Constant-volts-per-hertz induction motor drives and vector-controlled induction motor drives utilize pulsewidth modulation (PWM) to control the voltage applied on the motor. The method of PWM influences the pulsations in the torque developed by the motor. A space-vector-based approach to PWM facilitates special switching sequences involving the division of active state time. This paper proposes a space-vector-based hybrid PWM technique, which is a combination of the conventional and special switching sequences. The proposed hybrid PWM technique results in a lower peak-to-peak torque ripple than conventional space vector PWM(CSVPWM) at high speeds of an induction motor drive. Furthermore, the magnitude of the dominant torque harmonic due to the proposed hybrid PWM is significantly lower than that due to CSVPWM at high speeds of the drive. Experimental results from a 3.75-kW sensorless vector-controlled induction motor drive under various load conditions are presented to support analytical and simulation results.
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The objective of this paper is to study the influence of inverter dead-time on steady as well as dynamic operation of an open-loop induction motor drive fed from a voltage source inverter (VSI). Towards this goal, this paper presents a systematic derivation of a dynamic model for an inverter-fed induction motor, incorporating the effect of inverter dead-time, in the synchronously revolving dq reference frame. Simulation results based on this dynamic model bring out the impact of inverter dead-time on both the transient response and steady-state operation of the motor drive. For the purpose of steady-state analysis, the dynamic model of the motor drive is used to derive a steady-state model, which is found to be non-linear. The steady-state model shows that the impact of dead-time can be seen as an additional resistance in the stator circuit, whose value depends on the stator current. Towards precise evaluation of this dead-time equivalent resistance, an analytical expression is proposed for the same in terms of inverter dead-time, switching frequency, modulation index and load impedance. The notion of dead-time equivalent resistance is shown to simplify the solution of the non-linear steady-state model. The analytically evaluated steady-state solutions are validated through numerical simulations and experiments.