948 resultados para Complex Programmable Logic Device (CPLD)


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Negabinary is a component of the positional number system. A complete set of negabinary arithmetic operations are presented, including the basic addition/subtraction logic, the two-step carry-free addition/subtraction algorithm based on negabinary signed-digit (NSD) representation, parallel multiplication, and the fast conversion from NSD to the normal negabinary in the carry-look-ahead mode. All the arithmetic operations can be performed with binary logic. By programming the binary reference bits, addition and subtraction can be realized in parallel with the same binary logic functions. This offers a technique to perform space-variant arithmetic-logic functions with space-invariant instructions. Multiplication can be performed in the tree structure and it is simpler than the modified signed-digit (MSD) counterpart. The parallelism of the algorithms is very suitable for optical implementation. Correspondingly, a general-purpose optical logic system using an electron trapping device is suggested. Various complex logic functions can be performed by programming the illumination of the data arrays without additional temporal latency of the intermediate results. The system can be compact. These properties make the proposed negabinary arithmetic-logic system a strong candidate for future applications in digital optical computing with the development of smart pixel arrays. (C) 1999 Society of Photo-Optical Instrumentation Engineers. [S0091-3286(99)00803-X].

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In this paper, we present the analysis of electroosmotic flow in a branched -turn nanofluidic device, which we developed for detection and sorting of single molecules. The device, where the channel depth is only 150 nm, is designed to optically detect fluorescence from a volume as small as 270 attolitres (al) with a common wide-field fluorescent setup. We use distilled water as the liquid, in which we dilute 110 nm fluorescent beads employed as tracer-particles. Quantitative imaging is used to characterize the pathlines and velocity distribution of the electroosmotic flow in the device. Due to the device's complex geometry, the electroosmotic flow cannot be solved analytically. Therefore we use numerical flow simulation to model our device. Our results show that the deviation between measured and simulated data can be explained by the measured Brownian motion of the tracer-particles, which was not incorporated in the simulation.

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The performance of a semiconducting carbon nanotube (CNT) is assessed and tabulated for parameters against those of a metal-oxide-semiconductor field-effect transistor (MOSFET). Both CNT and MOSFET models considered agree well with the trends in the available experimental data. The results obtained show that nanotubes can significantly reduce the drain-induced barrier lowering effect and subthreshold swing in silicon channel replacement while sustaining smaller channel area at higher current density. Performance metrics of both devices such as current drive strength, current on-off ratio (Ion/Ioff), energy-delay product, and power-delay product for logic gates, namely NAND and NOR, are presented. Design rules used for carbon nanotube field-effect transistors (CNTFETs) are compatible with the 45-nm MOSFET technology. The parasitics associated with interconnects are also incorporated in the model. Interconnects can affect the propagation delay in a CNTFET. Smaller length interconnects result in higher cutoff frequency. © 2012 Tan et al.

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This paper presents the steps and the challenges for implementing analytical, physics-based models for the insulated gate bipolar transistor (IGBT) and the PIN diode in hardware and more specifically in field programmable gate arrays (FPGAs). The models can be utilised in hardware co-simulation of complex power electronic converters and entire power systems in order to reduce the simulation time without compromising the accuracy of results. Such a co-simulation allows reliable prediction of the system's performance as well as accurate investigation of the power devices' behaviour during operation. Ultimately, this will allow application-specific optimisation of the devices' structure, circuit topologies as well as enhancement of the control and/or protection schemes.

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Firms and other organizations use Technology Roadmapping (TRM) extensively as a framework for supporting research and development of future technologies and products that could sustain a competitive advantage. While the importance of technology strategy has received more attention in recent years, few research studies have examined how roadmapping processes are used to explore the potential convergence of products and services that may be developed in the future. The aim of this paper is to introduce an integrated roadmapping process for services, devices and technologies capable of implementing a smart city development R&D project in Korea. The paper applies a QFD (Quality Function Deployment) method to establish interconnections between services and devices, and between devices and technologies. The method is illustrated by a detailed case study, which shows how different types of roadmap can be coordinated with each other to produce a clear representation of the technological changes and uncertainties associated with the strategic planning of complex innovations. © 2012 Elsevier Inc.

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Semiconductor nanowires have recently emerged as a new class of materials with significant potential to reveal new fundamental physics and to propel new applications in quantum electronic and optoelectronic devices. Semiconductor nanowires show exceptional promise as nanostructured materials for exploring physics in reduced dimensions and in complex geometries, as well as in one-dimensional nanowire devices. They are compatible with existing semiconductor technologies and can be tailored into unique axial and radial heterostructures. In this contribution we review the recent efforts of our international collaboration which have resulted in significant advances in the growth of exceptionally high quality IIIV nanowires and nanowire heterostructures, and major developments in understanding the electronic energy landscapes of these nanowires and the dynamics of carriers in these nanowires using photoluminescence, time-resolved photoluminescence and terahertz conductivity spectroscopy. © 2011 Elsevier Ltd. All rights reserved.

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A new simple shear testing device capable of applying multidirectional loading to soil specimens has been developed. The Texas A&M University multidirectional simple shear (TAMU-MDSS) device provides the ability to apply a large range of shear stresses and complex loading paths, such as figure-eight and circular patterns, to a cylindrical soil specimen confined by a wire-reinforced membrane. The load and torque experienced by the sample are directly measured by a multi-axis load cell installed above the specimen. Backpressure saturation of the specimen is made possible by the devicés ability to apply pressure in the chamber and backpressure to the water lines. Excess pore pressure is measured by a pressure transducer during the shearing phase of the testing. This paper describes the development of the TAMU-MDSS system and the capabilities of the device and presents test results on saturated clay soil specimens subjected to monotonic, unidirectional cyclic, and multidirectional loading. Copyright © 2013 by ASTM International.

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Copyright © 2014 John Wiley & Sons, Ltd. Copyright © 2014 John Wiley & Sons, Ltd. Summary A field programmable gate array (FPGA) based model predictive controller for two phases of spacecraft rendezvous is presented. Linear time-varying prediction models are used to accommodate elliptical orbits, and a variable prediction horizon is used to facilitate finite time completion of the longer range manoeuvres, whilst a fixed and receding prediction horizon is used for fine-grained tracking at close range. The resulting constrained optimisation problems are solved using a primal-dual interior point algorithm. The majority of the computational demand is in solving a system of simultaneous linear equations at each iteration of this algorithm. To accelerate these operations, a custom circuit is implemented, using a combination of Mathworks HDL Coder and Xilinx System Generator for DSP, and used as a peripheral to a MicroBlaze soft-core processor on the FPGA, on which the remainder of the system is implemented. Certain logic that can be hard-coded for fixed sized problems is implemented to be configurable online, in order to accommodate the varying problem sizes associated with the variable prediction horizon. The system is demonstrated in closed-loop by linking the FPGA with a simulation of the spacecraft dynamics running in Simulink on a PC, using Ethernet. Timing comparisons indicate that the custom implementation is substantially faster than pure embedded software-based interior point methods running on the same MicroBlaze and could be competitive with a pure custom hardware implementation.

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We describe a reconfigurable binary-decision-diagram logic circuit based on Shannon's expansion of Boolean logic function and its graphical representation on a semiconductor nanowire network. The circuit is reconfigured by using programmable switches that electrically connect and disconnect a small number of branches. This circuit has a compact structure with a small number of devices compared with the conventional look-up table architecture. A variable Boolean logic circuit was fabricated on an etched GaAs nanowire network having hexagonal topology with Schottky wrap gates and SiN-based programmable switches, and its correct logic operation together with dynamic reconfiguration was demonstrated.

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This paper proposes novel universal logic gates using the current quantization characteristics of nanodevices. In nanodevices like the electron waveguide (EW) and single-electron (SE) turnstile, the channel current is a staircase quantized function of its control voltage. We use this unique characteristic to compactly realize Boolean functions. First we present the concept of the periodic-threshold threshold logic gate (PTTG), and we build a compact PTTG using EW and SE turnstiles. We show that an arbitrary three-input Boolean function can be realized with a single PTTG, and an arbitrary four-input Boolean function can be realized by using two PTTGs. We then use one PTTG to build a universal programmable two-input logic gate which can be used to realize all two-input Boolean functions. We also build a programmable three-input logic gate by using one PTTG. Compared with linear threshold logic gates, with the PTTG one can build digital circuits more compactly. The proposed PTTGs are promising for future smart nanoscale digital system use.

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This paper reports that the complex-coupled distributed feedback laser with the sampled grating has been designed and fabricated. The +1st order reflection of the sampled grating is utilized for laser single mode operation, which is 1.5387 mu m in the experiment. The typical threshold current of the device is 30 mA, and the optical output power is about 10 mW at the injection current of 100 mA.

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A novel integratable and high speed InGaAsP multi-quantum well (MQW) complex-coupled distributed feedback (DFB) laser is successfully fabricated on a semi-insulating substrate. The fabricated ridge DFB laser exhibits a threshold current of 26 mA, a slope efficiency of 0.14 W.A(-1) and a side mode suppression ratio of 40 dB together with a 3 dB bandwidth of more than 8 GHz. The device is suitable for 10 Gbit/s optical fiber communication.

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The lasing wavelength of a complex-coupled DFB laser is controlled by a sampled grating. The key concepts of the approach are to utilize the -1st order (negative first order) reflection of a sampled grating for laser single mode operation, and use conventional holographic exposure combined with the usual photolithography to fabricate the sampled grating. The typical threshold current of the sampled grating based DFB laser is 32 mA, and the optical output is about 10 mW at an injected current of 100 mA. The lasing wavelength of the device is 1.5356 mu m, which is the -1st order wavelength of the sampled grating.

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The hybrid integrated photonic switch and not logic gate based on the integration of a GaAs VCSEL (Vertical Cavity Surface Emitting Lasers) and a MISS (Metal-Insulator-Semiconductor Switches) device are reported. The GaAs VCSEL is fabricated by selective etching and selective oxidation. The Ultra-Thin semi-Insulating layer (UTI) of the GaAs MISS is formed by using oxidation of A1As that is grown by MBE. The accurate control of UTI and the processing compatibility between VCSEL and MISS are solved by this procedure. Ifa VCSEL is connected in series with a MISS, the integrated device can be used as a photonic switch, or a light amplifier. A low switching power (10 mu W) and a good on-off ratio (17 dB contrast) have been achieved. If they are connected in parallel, they perform a photonic NOT gate operation.

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A complex-coupled DFB laser with sampled grating has been designed and fabricated. The method uses the + 1 st order reflection of the sampled grating for laser single-mode operation. The typical threshold current of the sampled grating based DFB laser is 25 mA, and the optical output is about 10 mW at the injected current of 100 mA. The lasing wavelength of the device is 1.5385μm, which is the +1 st order wavelength of the sampled grating.